JP2000250779A - Programmable controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a programmable controller capable of monitoring real data in the middle of executing a sequence program by adding a data trace circuit or using a dedicated data trace program when a microprocessor executes a sequence program. SOLUTION: In this programmable controller provided with a program memory 2 storing a sequence program, a data memory 5 storing data necessary to control and a microprocessor 1 for carrying out the execution of the sequence program and the whole control, it is possible to monitor real data in the middle of sequence program execution by adding a data trace circuit 9 that immediately traces data used in the middle of execution of the sequence program.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a programmable controller widely used for controlling industrial systems such as steel, papermaking plants, public systems such as water and sewage, and the automobile industry.

[0002]

2. Description of the Related Art Conventionally, in such a programmable controller (hereinafter abbreviated as PLC), to monitor a program execution state, a sequence program for one scan is executed and then used in a program range to be monitored. The data content of the variable is read out from the data memory of the PLC, and the data content is displayed near the instruction using the variable on the screen of the monitor device displaying the sequence program, or the display color of the corresponding sequence instruction is displayed. And other methods were adopted.

This method can display correct contents when a variable to be monitored is used only once in a sequence program, but cannot display correct contents when the same variable is used repeatedly. There was a problem.

The state of a program monitor of a conventional controller will be described with reference to FIG. The program shown in FIG.
Is stored in the variable C, the variable C is multiplied by the variable D, and the result is stored in the variable C again. At this time, the actual contents of the variables are as shown in FIG. 8 (a).
(B), and when focusing on the variable C, an incorrect monitor display indicating that the contents of the input and output sides of the multiplication are the same is obtained.

[0005]

The conventional apparatus having the above configuration has the following problems.
In order to correctly monitor the data and results used in the sequence program, it is possible to trace data one by one immediately after executing the program to be monitored, but conventionally, except for dedicated sequence execution hardware, There was no such example.

In recent years, with the improvement in the performance of microprocessors, there have been many cases where a sequence program is executed by an interpreter method or a compiler method using a general-purpose microprocessor. When a general-purpose microprocessor was used, there was no example in which data trace was performed immediately after execution of a sequence instruction.

The present invention has been made in view of the above circumstances, and has as its object to provide a programmable controller capable of monitoring actual data during execution of a sequence program.

[0008]

According to one aspect of the present invention, there is provided a program memory for storing a sequence program, a data memory for storing data necessary for control, and a program memory for storing the sequence program. In a programmable controller having a microprocessor for executing execution and overall control, by adding data tracing means for immediately tracing data used during execution of the sequence program,
A programmable controller characterized in that actual data during execution of the sequence program can be monitored.

According to the first aspect of the present invention, the added data tracing means detects a range to be monitored, for example, interprets a sequence program created by a user, determines a data type, etc. Since the calculation result data is automatically stored in the trace buffer, the sequence program can be monitored in real time.

According to a second aspect of the present invention, in the programmable controller according to the first aspect, when the sequence program is executed by an interpreter method, the data used during execution of the sequence program. The data trace means for immediately tracing the data is added so that the contents of the work memory used as a work area when the microprocessor executes the program and the data temporarily used can be traced. A programmable controller characterized in that:

According to the second aspect of the present invention, by adding data tracing means compatible with the interpreter system, the address and contents of the program read from the sequence program memory by the microprocessor when executing the sequence program. Then, the trace range and the contents of the trace are determined, and then the data input / output to / from the data memory are sequentially traced, so that the real-time monitoring of the sequence program becomes possible.

According to a third aspect of the present invention, in the programmable controller according to the first aspect, when the sequence program is executed by a compiler method, the data used during execution of the sequence program. By adding a data tracing means for immediately tracing the data, so that the content of a work memory used as a work area when the microprocessor executes a program and data temporarily used can be traced. A programmable controller characterized by the following.

According to the third aspect of the present invention, by adding data tracing means corresponding to the compiler system, when executing the sequence program by the compiler system, the address and data when accessing the data memory can be stored. Since they are stored in pairs in the trace buffer,
Real-time monitoring of the sequence program becomes possible.

According to a fourth aspect of the present invention, there is provided a program memory for storing a sequence program, a data memory for storing data necessary for control, execution of the sequence program, and overall control. In a programmable controller having a microprocessor for execution, a dedicated program for data tracing for immediately tracing data used during execution of the sequence program is executed to monitor actual data during execution of the sequence program. A programmable controller characterized in that the programmable controller is configured to be able to perform the operations.

According to the invention corresponding to claim 4, when the sequence program is executed, in parallel with the execution of the instruction,
Since the data used for the execution of the instruction is stored in the trace buffer, real-time monitoring of the sequence program is possible.

According to a fifth aspect of the present invention, there is provided a programmable controller according to the fourth aspect, wherein a data trace execution program is called when the sequence program is executed by an interpreter method. The programmable controller is characterized in that it is configured to monitor actual data during execution of a sequence.

According to the invention corresponding to claim 5, when the program is executed in an interpreted manner, by calling the data trace-dedicated instruction execution program, the data and the result used in the instruction execution in parallel with the instruction execution are obtained. Since data tracing is performed, real-time monitoring of the sequence program becomes possible.

According to a sixth aspect of the present invention, there is provided a programmable controller according to the fourth aspect, wherein a program for executing a data trace is executed when the sequence program is executed by a compiler method. A programmable controller characterized by being configured so as to be able to monitor actual data during sequence execution by switching to and executing a data trace program.

According to the invention corresponding to claim 6, when the sequence program in the monitoring target range is executed, the sequence program in the monitoring range is switched to a program compiled for tracing and executed. Since the used data and the operation result are stored in the trace buffer in accordance with the contents of the sequence program, real-time monitoring of the sequence program becomes possible.

According to a seventh aspect of the present invention, there is provided a programmable controller according to the first aspect, wherein when performing data tracing of a sequence program for executing a loop, the depth of the loop execution hierarchy is reduced. A programmable controller characterized in that data tracing can be executed by designating the programmable controller.

According to the seventh aspect of the present invention, since data can be traced by designating the number of times of loop execution to the data tracing means, real-time monitoring of data in the middle of loop execution is possible. Become.

In order to achieve the above object, an invention according to claim 8 is the programmable controller according to claim 1, wherein an instruction for controlling an execution flow such as a jump instruction is present in the sequence program. A programmable controller characterized in that it is configured to trace actual use data including the non-executable part of the sequence program by sequentially tracing the execution address of the instruction and the jump address.

According to the invention corresponding to claim 8, since the jump source address and the jump destination address are traced together with the data used by the data tracing means, even if a jump instruction exists in the range to be monitored, the jump instruction is correctly executed. Time monitoring becomes possible.

According to a ninth aspect of the present invention, when the data trace of the sequence program is performed, the trace data is processed in accordance with the type of the executed instruction. , Wherein the data storage area is minimized.

According to the ninth aspect of the present invention, the data form of the instruction executed by the data tracing means is determined, and unnecessary data is deleted and stored in the trace buffer without waste. It is possible to reduce the amount of communication data.

In order to achieve the above object, a tenth aspect of the present invention is the programmable controller according to the first aspect, wherein trace data for a plurality of scans are continuously stored when data tracing of the sequence program is performed. A programmable controller characterized by being configured as possible.

According to the tenth aspect of the present invention, since the data tracing means can trace data for a plurality of continuous scans, high-speed scan execution can be performed irrespective of the communication cycle with the monitor device. Monitoring becomes possible.

[0028]

Embodiments of the present invention will be described below with reference to the drawings.

<First Embodiment (Corresponding to Claims 1 and 2)> A first embodiment of the present invention will be described with reference to FIG. In FIG. 1, a CPU 1 is a microprocessor, which is a central part of a PLC, and executes a sequence and controls execution.

The program memory 2 is a memory in which a program executed by the CPU 1 is stored, and stores an OS, an interpretation of a sequence program, and an execution program.

The work memory 3 is used as a work area when the CPU 1 executes a program. The sequence program memory (user program memory) 4 is a memory for storing a sequence program created by a user. The data memory 5 is a memory for storing data such as variables used by the user.

The microcomputer bus 6 controls the elements in the PLC by using a CPU.
1 and is a total of an address bus, a data bus, and a control bus. The I / O 7 is an input / output device for connecting the PLC to an external control target.

The communication interface (communication I / F) 8 is P
This is a circuit for connecting the LC and the monitor device 20 via a communication medium.

The data trace circuit 9 is connected to the CPU 1 and various memories via the microcomputer bus 6, and is configured to operate independently while monitoring signals on the microcomputer bus 6.

FIG. 2 is a diagram for explaining the configuration of the data trace means, for example, the data trace circuit 9. The trace control circuit 91 performs operations such as controlling the start and stop timings of the trace and determining the form of data to be traced according to the type of the instruction being executed, and controls the entire data trace circuit 9.

The address comparison circuit 92 compares an attached address register with an address on the microcomputer bus 6 and sends a coincidence signal to the trace control circuit 91. The address registers 93 and 94 are set by the CPU 1, and when the set address appears on the microcomputer bus 6, the address comparison circuit 92 outputs an address matching signal to the trace control circuit 91.

The following three address registers are provided. The trace start address register 93 is a register for setting a trace start address. The trace end address register 94 is a register for setting a trace end address. Address match register 95
Is a register used for general purposes as well as for a loop address.

The trace counter 96 is a counter for counting the number of traced data. When the trace buffer described below becomes full, a trace control circuit 91 is provided.
To cause the CPU 1 to generate an interrupt signal 10. A bit trace memory (bit trace buffer) 97, a word trace memory 98, and an address trace memory 99 are memories used as trace buffers, and store bit data, word data, and address data, respectively.

The data trace circuit 9 can interrupt the CPU 1 via the interrupt signal 10 when necessary. The monitor device 20 monitors the execution state of the sequence program of the PLC, creates a sequence program,
Used for correction. The monitor device 20 has a CRT, other display devices and a keyboard, and other input devices.

After the CPU 1 inputs the state of the external control target via the I / O 7, the sequence program memory 4
And executes the program while accessing the data in the data memory 5 as necessary, and outputs the result to an external control target via the I / O 7.

When real-time monitoring of the sequence program is performed, first, the monitor start address is set in the trace start address register 93 from the CPU 1 and the monitor end address is set in the trace end address register 94.

Thereafter, when the execution of the sequence program is started, when the sequence program in the range to be monitored is executed, the trace control circuit 91 detects the trace start address, and extracts necessary data thereafter from the microcomputer bus 6. Stored in the corresponding trace buffer,
The trace counter 96 is updated.

When the trace end address is detected or when the value of the trace counter 96 reaches a specified value, the trace control circuit 91 notifies the CPU 1 using the interrupt signal 10 to read the trace buffer and terminate the trace. Request.

In this way, the real-time monitoring of the sequence program using the data trace circuit 9 becomes possible.

Next, the operation when the sequence program is executed by the interpreter method will be described. Here, the interpreter is a method of converting and executing a minimum necessary source and program each time, and for example, a method of converting a graphic display into a machine language for each graphic unit.

Here, the operation when the sequence program is executed by the interpreter method will be described with reference to FIG. When trying to execute the A contact instruction in the sequence program memory 4, the CPU 1 first reads out the code of the A contact instruction from the sequence program memory 4. CPU1
Reads a processing program corresponding to this instruction code from the program memory 2 and executes it. Access to the data memory 5 occurs during the processing of this program.

In this case, the reading of the bit X, which is the operand, occurs. When this instruction is to be monitored, the trace control circuit 91 determines that reading from the sequence program memory 4 is an instruction code, fetches the code, decodes the code, and determines the type of data to be traced. decide.

In the case of the A contact, the bit data read from the data memory 5 is to be monitored. Therefore, the trace control circuit 91 monitors the state of the microcomputer bus 6 and, when reading from the data memory occurs, The data is fetched, necessary bits are determined from the instruction code, and stored in the bit trace memory 97. The determination of the start and end addresses of the trace is as described above.

In the data trace circuit 9 corresponding to the interpreter system, the sequence program memory 4
In addition, the access to the data memory 5 is monitored, and the data is appropriately stored in the data buffer in parallel with the execution of the sequence program by the CPU 1, so that the monitoring can be performed in real time.

<Second Embodiment (corresponding to claim 3)> Next, a second embodiment will be specifically described with reference to FIG. As shown in FIG. 4, the execution of the sequence program in the compiler system
A program in which a sequence command is interpreted by the CPU 1 is directly written therein.

Here, the compiler converts all the programs collectively and generates a machine language program, for example, to convert the graphic display collectively into a machine language program.

The setting of the start and end of the trace is performed by using the address of the sequence program memory 4 in the same manner as in the case described above.

However, in the case of the compiler system, it is difficult to determine the contents and data type of the original sequence instruction from the code in the sequence program memory 4. It is assumed that all accesses to No. 5 are written in the trace buffer in pairs of address, data, and read / write. This is shown in FIG.

The set of data is sent to the monitor device 20, and the monitor device 20 compares the data set with the contents of the program being monitored to determine the data type and extract necessary data to be used for monitoring. .

With the above configuration, it is possible to monitor in real time even when executing a sequence program of the compiler system.

<Third Embodiment (corresponding to Claim 4)> Next, a third embodiment will be described in detail. The configuration of the third embodiment is the same as that of the data trace circuit 9 shown in FIG. It is omitted. Therefore, in this case, the data trace is executed not by hardware but by software. Originally, the microprocessor executes the sequence program by software, but when executing the sequence program in the monitor range, it switches to a program dedicated to data tracing that is different from the program for normal sequence program processing. . In a program dedicated to data tracing, when variable data serving as an operand of a sequence program is input / output to / from the data memory 5, the data is programmed to be stored in a trace buffer set in the work memory 3 or the like. .

With this configuration, monitoring can be performed in real time without using special hardware. Of course, this method has a disadvantage that the sequence program processing time is longer than the method using the data trace circuit 9.

<Fourth Embodiment (corresponding to claim 5)> Next, a fourth embodiment will be specifically described. When the sequence program is executed by the interpreter method, a processing program corresponding to the sequence instruction is prepared in the program memory 2 as shown in FIG.

In order to execute monitoring in real time, two types of processing programs are provided. One is a normal sequence processing program, and the other is a program including processing for executing data tracing in parallel with execution of the sequence program.

When the CPU 1 reads and interprets one sequence program from the sequence program memory 4 for one instruction, and calls a corresponding processing program in the program memory 2, information (flag) indicating that the sequence program is to be monitored. And the like, an offset is set to the calling address from the program memory 2 so that the processing program for data tracing is called.

In this way, real-time monitoring becomes possible in a sequence program of the interpreter system.

<Fifth Embodiment (corresponding to claim 6)> Next, a fifth embodiment will be specifically described with reference to FIG. When a sequence program is executed by a compiler method, two types of compile programs for normal processing and data tracing are created when compiling a sequence program created by a user.
The two sequence programs are divided in units of an appropriate size, and the monitor execution is configured to be executed in block units.

When a block to be monitored is entered during execution of a normal sequence program, the program jumps to a routine of a data tracing program to execute data tracing in parallel with instruction processing, and stores data in a trace buffer. To be stored. When the execution of the block to be monitored is completed, the process returns to the block of the normal processing program.

With this configuration, the data trace program knows the required number and shape of data, so that efficient real-time monitoring becomes possible.

<Sixth Embodiment (corresponding to claim 7)> Next, a sixth embodiment will be specifically described. If there is a repetitive execution element such as a loop execution in the sequence program, only the data of that part is repeatedly traced. However, only one type of data can be displayed on the monitor device 20, so that the execution timing Only the data at is needed.

Here, the operation will be described using the data trace circuit 9 of FIG. If there is a repetition execution part in the sequence program in the monitor range, after starting the monitoring, the CPU 1 sets the start address of the repetition part program to the address match register 9 of the data trace circuit 9.
5, and the number of repetitions is set in the loop counter 90. When the sequence program tries to execute this instruction, the address comparison circuit 92 and the trace control circuit 91 detect that the operation is a repetitive operation, and start decrementing the loop counter 90 every time this address is executed.

Then, control is performed such that the data trace is executed only when the number of executions reaches the number specified by the CPU 1. If there are a plurality of repetition processing parts, after executing one repetition processing part,
By setting the start address of the next repetition part in the address match register 95 from U1, processing can be performed in the same manner as described above.

In this way, real-time monitoring is possible even if there are repeated execution parts. <Seventh embodiment (corresponding to claim 8)> Next, a seventh embodiment will be specifically described. If a data trace is executed by a normal method when a jump instruction is present in the sequence program, there is a problem that the display of the data and the display of the program do not match during monitoring.

Therefore, in the data trace circuit 9 of this embodiment, when the trace control circuit 91 detects the execution of the jump instruction, the address of the sequence program memory 4 at that time and the jump destination address are stored in the address trace memory 99. Control.

In this way, the contents of the address trace memory 99 and the contents of the program being monitored are compared on the monitor device 20 side, so that the trace data can be correctly associated with the program being displayed on the monitor.

<Eighth Embodiment (corresponding to claim 9)> Next, an eighth embodiment will be specifically described. As shown in FIGS. 2 and 3, the data trace circuit 9 does not trace the data input / output to / from the data memory 5 according to the word length of the memory, but determines the data type to be used from the type of the sequence instruction. It is configured to store in the trace buffer. That is, when an instruction using bit data as an operand is executed, the data memory 5
Even if word access occurs to
The necessary bit data is extracted by interpreting the instruction code, and only that data is stored in the bit trace memory 97.

With this configuration, the amount of trace data is reduced, the amount of data transmitted to the monitor device 20 is reduced, and high-speed monitoring is enabled.

<Ninth Embodiment (corresponding to claim 10)>
Next, a ninth embodiment will be specifically described. Generally, the scan execution time of the sequence program is very short compared to the data transfer time with the monitor device 20,
It is impossible to transmit the trace data for each scan to the monitor device 20. Further, even if the data for all scans is displayed on the monitor device 20, it is too fast to confirm it. Nevertheless, there is a demand for confirming the results of continuous scan execution.

Therefore, the data trace circuit 9 of the present embodiment enables data trace in the continuous scan execution of the sequence program. This is realized by not sending an interrupt signal to the CPU 1 even after the data trace for one scan is completed, and generating an interrupt after the execution of the desired scan is completed. A special code indicating a boundary is written into the data trace register and the address trace register every time one scan is completed, so that the monitor device can determine the scan boundary.

In this manner, data trace for a plurality of scans can be performed.

[0076]

According to the present invention described above, it is possible to provide a programmable controller having the following functions and effects. That is, in a programmable controller that executes a sequence program by a microprocessor, it is possible to monitor data used at the time of executing the sequence program, so that a sequence instruction and operand data corresponding to the sequence instruction can always be correctly monitored, and This is effective for checking the execution status.

Further, it is possible to provide a programmable controller capable of correctly monitoring data even if a repeated execution portion or a jump exists in the sequence program.

[Brief description of the drawings]

FIG. 1 is a block diagram for explaining a programmable controller of the present invention.

FIG. 2 is a diagram for explaining the data trace circuit of FIG. 1;

FIG. 3 is a diagram for explaining the operation of FIG. 1 and is a diagram for explaining execution of a program in an interpreter system.

FIG. 4 is a diagram for explaining the operation of FIG. 1 and is a diagram for explaining execution of a program by a compiler method.

FIG. 5 is a diagram for explaining the operation of FIG. 1 and is a diagram for explaining a state of data tracing.

FIG. 6 is a diagram for explaining the operation of FIG. 1 and is a diagram for explaining a configuration of a program memory in an interpreter system.

FIG. 7 is a diagram for explaining the operation of FIG. 1 and is a diagram for explaining a configuration of a sequence program memory in a compiler system.

FIG. 8 is a view for explaining a state of a program monitor in a conventional controller.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Microprocessor (CPU) 2 ... Program memory 3 ... Work memory 4 ... Sequence program memory 5 ... Data memory 6 ... Microcomputer bus 7 ... I / O 8 ... Communication interface 9 ... Data trace circuit 90 ... Loop counter 91 ... Trace control Circuit 92 ... Address comparison circuit 93 ... Trace start address register 94 ... Trace end address register 95 ... Address match register 96 ... Trace counter 97 ... Bit trace memory 98 ... Word trace memory 99 ... Address trace memory 10 ... Interrupt signal 20 ... Monitor device

Claims (10)

[Claims] 1. A programmable controller comprising: a program memory storing a sequence program; a data memory storing data necessary for control; and a microprocessor for executing the sequence program and performing overall control. A program controller, wherein a data trace means for immediately tracing data used during execution of the sequence program is added so that actual data during execution of the sequence program can be monitored. 2. The programmable controller according to claim 1, wherein, when the sequence program is executed by an interpreter method, data tracing means for immediately tracing data used during execution of the sequence program is added. A programmable controller characterized in that the content of a work memory used as a work area when the microprocessor executes a program and a trace of data used temporarily can be traced. 3. The programmable controller according to claim 1, wherein, when the sequence program is executed by a compiler method, a data trace unit for immediately tracing data used during execution of the sequence program is added. A programmable controller characterized in that the contents of a work memory used as a work area when the microprocessor executes a program and the data temporarily used can be traced. 4. A programmable controller comprising: a program memory storing a sequence program; a data memory storing data necessary for control; and a microprocessor for executing the sequence program and executing overall control. A programmable program characterized in that it is possible to monitor actual data during execution of the sequence program by executing a dedicated program for data tracing that immediately traces data used during execution of the sequence program. controller. 5. The programmable controller according to claim 4, wherein, when the sequence program is executed by an interpreter method, by calling a data trace execution program, it is possible to monitor actual data during execution of the sequence. Programmable controller characterized in that it is configured as follows. 6. The programmable controller according to claim 4, wherein when the sequence program is executed by a compiler method, a program of a portion for executing data trace is switched to a program for data trace and executed, thereby executing the sequence. A programmable controller characterized in that actual data being executed can be monitored. 7. The programmable controller according to claim 1, wherein when tracing data of a sequence program for performing loop execution, data tracing can be performed by designating a depth of a loop execution hierarchy. A programmable controller. 8. The programmable controller according to claim 1, wherein when an instruction for controlling an execution flow of a jump instruction or the like exists in the sequence program, an execution address of the instruction and a jump destination address are sequentially traced. Thus, the programmable controller is configured to be able to trace the actual use data including the non-executable part of the sequence program. 9. The programmable controller according to claim 1, wherein when performing data tracing of said sequence program, trace data is processed in accordance with a type of an executed instruction so that a data storage area is minimized. Features a programmable controller. 10. The programmable controller according to claim 1, wherein a trace data for a plurality of scans can be continuously stored when data trace of the sequence program is performed.