JP2775830B2 - Instruction frequency measurement method - Google Patents

Description

Detailed Description of the Invention [Table of Contents] Overview Industrial field of application Conventional problems and problems to be solved by the invention Means to solve the problem Action Embodiment Effect of the invention [Overview] Information processing device, more limited Central processing unit (CPU)
An instruction frequency measurement method for measuring which instructions in a program executed in a computer are executed and at what frequency, the instruction frequency measurement method with a small amount of hardware and with little disturbance to the operating environment of the computer system. A sampling pulse generating mechanism for periodically generating a sampling pulse, a mechanism for temporarily suspending execution of a program currently being executed in response to the sampling pulse, and information from a point in time at which the program is interrupted. An information processing apparatus having a mechanism for reading the next instruction to be executed from the main storage unit (MSU) and a mechanism for decoding the read instruction word and measuring the instruction frequency; In response, the timing at which the execution of the currently executing program is temporarily suspended is a specific timing predetermined for each instruction, and Providing a means for setting the specific timing to the same length for all instructions, activating a mechanism for measuring the instruction frequency based on a signal generated by the means, and measuring the instruction execution frequency. The configuration is as follows.

[Industrial applications]

The present invention relates to an instruction frequency measurement method for measuring which instruction in a program executed by an information processing device, more specifically, a central processing unit (CPU), and how often the instruction is executed.

Conventionally, in order to improve the processing capacity of a computer system, a program is actually executed by a central processing unit (CPU) as one of the means to evaluate the performance including software and hardware and extract the points of improvement. When done, measuring which instructions are being executed and how often are being performed.

In this case, an instruction frequency measurement method capable of measuring the instruction execution frequency with as little hardware as possible and more accurately, specifically, with less disturbance of the operating environment of the computer system is required. .

[Problems to be solved by conventional technology and invention]

2A and 2B are diagrams for explaining a conventional instruction frequency measuring method, in which FIG. 2A shows an example of the entire configuration, FIG. 2B shows an example of a program status word, and FIG. An example of a processing circuit is shown, and (d) shows an operation time chart in the sampling method.

Conventional instruction frequency measurement methods are roughly divided into hardware methods and software (or firmware methods).
There are two methods.

(1) Hardware method Although not shown, counters are implemented in hardware by the number of instructions whose execution frequency is to be measured at the same time, and the counter is counted up every time the instruction is executed. At the end of the execution of the program or at an appropriate time, the value of the counter is read and the instruction execution frequency is calculated and obtained.

Therefore, when trying to measure the execution frequency of all types of instructions that can be executed by the central processing unit (CPU), a counter of the number of instructions, for example, about 200 instructions is required,
There was a problem that the amount of hardware became enormous.

Conversely, if the number of the counters is limited to a realistic number, for example, about 10, it is necessary to repeat the measurement about 20 times under the same environment, which not only increases the measurement time but also increases the contents of the program. In some cases, there is a problem that it is difficult to reproduce the same environment itself.

(2) Software method (or firmware method) (see FIG. 2) The software method and the firmware method are basically the same. In other words, in the following description, if "program interrupt" is "interrupt to firmware" and "instruction frequency measurement routine" 22 is "instruction frequency measurement firmware", the description of the software method is that of the firmware method. In the firmware method, the data area for the counter may be provided on a local storage (LS) accessible only by the firmware, instead of being provided on the main storage device (MSU) 2.

There are also two software methods, an instruction trace method and a sampling method.

(A) Instruction tracing method In FIG. 2 (a), every time the central processing unit (CPU) 1 executes one instruction of the program 23, the instruction execution / interrupt control circuit 12 generates a program interrupt and the instruction frequency. Control is passed to the measurement routine 22.

At the time of the interruption, the program status word (PSW) at that time is stored as an old program status word (OLD PSW) 21 at a fixed address on the main storage device (MSU) 2.

The old program status word (hereinafter referred to as OLD PSW) 21 contains the address of the next instruction to be executed (b)
This is shown in the instruction address section (IA) of the program status word (PSW) in the figure.

The instruction frequency measurement routine 22 to which control was transferred by the interrupt 22
From the main storage unit (MSU) 2 to the OLD PSW21 (or
The above “IA” part of the OLD PSW 21 is read out, and based on the “IA” part obtained therefrom, the next instruction word to be executed in the program 23 in the main storage unit (MSU) 2 is determined. read out.

Next, the command is interpreted and the main memory (MS
U) After recording the number of executions prepared for the number of instructions on 2 (1 to n) 24, the corresponding data after 24 is read, '+1' is performed, and the data is stored again in the same area.

In this method, each time one instruction is executed, the instruction frequency measurement routine 22 is interrupted, so that there is a problem that the overhead is large and the normal operating environment of the computer system is significantly disturbed. Therefore, the result may be different from the instruction frequency in a normal operation environment.

(B) Sampling method Originally, the central processing unit (CPU) 1 of the computer system has a timer interrupt mechanism for the purpose of giving priority to real-time processing, for example.

This is because in the sampling pulse generating mechanism 11, if an instruction is being executed at the time of the generation of the sampling pulse based on the periodically generated sampling pulse, the completion of the execution of the instruction and the If not,
Immediately at that time, a mechanism that generates a program interrupt and transfers control to the real-time processing.

Specifically, the sampling pulse output from the sampling pulse generating mechanism 11 is temporarily latched by the latch 121 as shown in FIG. 3C, waits for an instruction execution completion signal, and the instruction being executed is completed. The logical product (AND) circuit 122 obtains the logical product with the instruction execution completion signal indicating that this is the case, the interrupt latch 123 is activated, and the function shifts to the processing of the real-time interrupt routine. (Refer to the operation time chart shown in FIG. 6D) Therefore, the instruction frequency measurement by the sampling method is performed by using the timer interrupt mechanism when the sampling pulse is generated and the instruction being executed is completed. Control is passed to the routine 22.

Since the execution frequency of the instruction is measured by sampling the execution of the program, it does not match the actual instruction execution frequency. However, by prolonging the measurement time, the execution time is extremely close to the actual instruction execution frequency. Since the frequency can be obtained and sampling is performed, there is a feature that disturbance to a normal operation environment is small.

At this time, the processing contents executed by the instruction frequency measurement routine 22 include the following two methods.

(B-1): Method of sampling the instruction next to the last executed instruction As in the method (A), the instruction word to be executed next is read out based on the OLD PSW21, and the instruction is read out. The execution count recorded word (1 to 1) in the main storage device (MSU) 2 corresponding to the word
n) Add '1' to 24.

In this method, even if a branch instruction or an instruction to change the address mode is executed, only the instruction that is actually executed is correctly counted because the OLD PSW 21 is a branch destination and an address mode change destination. However, since the number of times that a sampling pulse is generated during execution of a long-running instruction increases, the instruction immediately following the long-running instruction is measured at a higher frequency than the actual frequency. Therefore, there is a problem that wrong measurement is performed.

(B-2): Method of sampling the last executed instruction The OLD PSW21 contains the instruction immediately before the interrupt, that is, the length information of the last executed instruction ｛(b) Instruction length code (ILC) of the PSW in FIG. Since｝ is included, the value of the instruction length code (“ILC” part) of the immediately preceding instruction is subtracted from the value of the next instruction address (“IA” part) to be executed in the OLD PSW. , The address of the last executed instruction can be obtained.

Therefore, based on this address, the instruction word of the last executed instruction is read out from the program 23 of the main storage unit (MSU) 2 and, similarly to the above (A), the main storage unit ( MSU) Execution count recorded words on 2 (1-n)
Add '1' to the contents of

In this method, the execution time of an instruction is set as a weight because the number of times an instruction having a long execution time is sampled increases. There is an advantage that the weighted instruction frequency can be measured. However, when the above-described branch instruction for changing the instruction address or the instruction for changing the address mode is executed, the OLD PSW 21 is changed to the branch destination and the address mode as described above. Because it is the change destination, the address of the last executed instruction cannot be obtained, and if the instruction frequency is measured by the above method, an incorrect instruction (an instruction that is not actually executed) is counted. There is a fatal problem.

The present invention has been made in view of the above-described conventional drawbacks, and requires a small amount of hardware to measure which instruction in a program executed by a central processing unit (CPU) of an information processing apparatus has been executed. In addition, the instruction frequency measurement method that causes little disturbance to the operating environment of the computer system, that is, a method in which the instruction following the last executed instruction is sampled. It is an object of the present invention to provide an instruction frequency measuring method that is not measured higher than the frequency of the instruction.

[Means for solving the problem]

The above problem is solved by an instruction frequency measuring method configured as follows.

A sampling pulse generating mechanism for periodically generating a sampling pulse, a mechanism for temporarily suspending the execution of a program currently being executed in response to the sampling pulse, and information on a point at which the program is interrupted should be executed next. An information processing apparatus having a mechanism for reading a given instruction from a main storage unit (MSU) and a mechanism for decoding the read instruction word and measuring the instruction frequency. A means for temporarily suspending the execution of the program is set to a specific timing predetermined for each instruction, and the specific timing is set to the same length for all instructions. On the basis of the received signal, a mechanism for measuring the instruction frequency is activated to measure the instruction execution frequency.

[Action]

Generally, there are various types of instructions to be executed by a central processing unit (CPU) of an information processing device, from basic instructions that complete execution in one machine cycle to complicated instructions that take several tens of machine cycles. Further, there are special instructions having extremely long execution times.

The probability that an instruction is being executed at the time when a sampling pulse is generated at a fixed period is proportional to the length of execution time of the instruction because the two events of generation of the sampling pulse and execution of the instruction are independent. Will do.

In the above-mentioned "B-1 system for sampling the instruction next to the last executed instruction", if a certain instruction is being executed at the time when the sampling pulse is generated, the sampling shown in FIG. As is apparent from the circuit of the system and the operation time chart shown in FIG. 9D, the occurrence of the sampling pulse is stored in the temporary latch 121 until the execution of the instruction is completed. ,
A program interrupt is generated.

That is, an interrupt is usually processed in a gap between instructions, and an interrupt factor generated during the execution of one instruction is suspended and processed until the execution of the instruction is completed. Will be.

Therefore, the instruction frequency measurement method using such an interrupt processing mechanism as it is, the sampling method uses the interrupt mechanism in the sampling method, and thus the operation described above is performed.

As a result, an instruction having a longer execution time frequently starts the instruction frequency measurement routine in proportion to the execution time. On the other hand, in the instruction frequency measurement routine according to the "B-1 method of sampling the instruction next to the last executed instruction", the instruction next to the last executed instruction is counted, and as a result, Insignificant instruction frequency, which is weighted by the length of execution time of the immediately unrelated instruction, is measured.

Therefore, in the present invention, the "instruction frequency measuring method for sampling the instruction next to the last executed instruction", that is, the disadvantage of the B-1 method is that the execution time of the immediately preceding instruction irrelevant to the measurement of the instruction frequency. The following instruction that actually performs frequency measurement is weighted by the length of "." (1) The sampling pulse is referred to for all instructions at the time of execution of each instruction. (2) When the sampling pulse is generated at a timing other than the specific timing, the sampling pulse is ignored, and only when the sampling pulse is generated at the specific timing, The sampling pulse is captured, the same timer interrupt as in the past is generated, and control is passed to the instruction frequency measurement routine.

(3) The length of the specific timing need not be limited to one machine cycle, but is set to be the same for all instructions so as not to be affected by the execution time of the instructions.

(4) As an example of the specific timing, for example, the first cycle (or state) of the instruction execution or the last cycle of the execution may be irrelevant to the execution time of each instruction. Since the cycle is also a cycle for determining the occurrence of an interrupt, it is effective to employ the last cycle of the execution as the specific timing.

(5) As an example, when a central processing unit (CPU) with an average instruction execution time of 3 machine cycles and the above-mentioned specific timing of one machine cycle is adopted, two-thirds of the sampling pulses are stochastically wasted. In consideration of this, the cycle of the sampling pulse may be tripled or the measurement time of the command frequency may be tripled.

Since it functions in this manner, the instruction frequency is measured by the sampling method with a small amount of hardware and with little disturbance to the operating environment of the computer system, and the accurate instruction frequency is not affected by the length of the instruction execution time. It has the effect of being able to measure.

〔Example〕

 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a view showing one embodiment of the present invention, and FIG.
(B1) and (b2) show operation time charts, and sampling at a constant period output from the sampling pulse generating mechanism 11 in the entire configuration example shown in FIG. 2 (a). Means for setting the interrupt latch 123 by ANDing a pulse with a signal indicating a specific timing at the time of instruction execution, for example, an instruction execution completion signal, is a means necessary for implementing the present invention. Note that the same reference numerals indicate the same object throughout the drawings.

Hereinafter, the instruction frequency measuring method of the present invention will be described with reference to FIG.

Even if the present invention is implemented, the basic operation of the instruction frequency measurement by the sampling method is not particularly different from that of the conventional method, and is omitted. Here, a specific timing predetermined for each instruction is shown. A description will be made mainly of an operation of generating a timer interrupt with a signal, for example, an instruction execution completion signal, and activating the instruction frequency measurement routine 22.

In this embodiment, as described above, for each instruction, the most effective, for example, a cycle for determining the occurrence of an interrupt as a predetermined specific timing, and when the execution of each instruction is started. Irrespective of the execution time of the instruction,
Although the output instruction execution completion signal is always employed, it is needless to say that the present invention is not limited to this.

When the instruction execution completion signal and the sampling pulse periodically output from the sampling pulse generating mechanism 11 (see FIG. 2A) are logically ANDed by an AND circuit 120, and a match is obtained. The timer interrupt latch 123 is set, and the conventionally used instruction frequency measurement routine 22 is started. {Refer to the operation time chart of FIG. 2 (b2)} Therefore, the specific timing of each instruction, that is, the sampling pulse that does not match the instruction execution completion signal is automatically ignored. << Refer to the operation time chart of FIG. 13 (b1) >> As a result, a part of the sampling pulse is wasted and discarded. Correction processing such as extending the command frequency measurement time by 22 is required.

As described above, the present invention uses the timer interrupt mechanism originally provided in the computer system and saves the currently executing program on the main storage unit (MSU) when the currently executing program is interrupted by the software means by the timer interrupt. Refer to the OLD PSW, and in the "sample the next instruction after the last executed instruction" instruction frequency measurement method, it is actually measured by the execution time of the last executed instruction unrelated to the instruction frequency measurement. To prevent the frequency of instructions from being weighted, the timer interrupt is generated by capturing a specific timing at the time of execution of each instruction, for example, a sampling pulse that matches an instruction execution completion signal which is also an interrupt generation cycle. The feature is that the instruction frequency measurement routine is started.

〔The invention's effect〕

As described above in detail, the instruction frequency measurement method of the present invention measures which instruction in a program executed by a central processing unit (CPU) of an information processing apparatus has been executed and how frequently. A sampling pulse generating mechanism for periodically generating a sampling pulse, a mechanism for temporarily suspending the execution of a program currently being executed in response to the sampling pulse, and information on a point at which the program is interrupted.
An information processing apparatus having a mechanism for reading an instruction to be executed next from a main storage unit (MSU) and a mechanism for decoding the read instruction word and measuring the instruction frequency is provided. A means for temporarily suspending the execution of the program currently being executed is set to a specific timing predetermined for each instruction, and the specific timing is set to the same length for all instructions,
On the basis of the signal generated by the means, the mechanism for measuring the instruction frequency is activated to measure the instruction execution frequency, so that the amount of hardware is small and the operation environment of the computer system is reduced. There is an effect that an instruction frequency can be accurately measured without being affected by the length of the instruction execution time by performing the instruction frequency measurement by a sampling method with less disturbance of the instruction.

[Brief description of the drawings]

 FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a diagram for explaining a conventional instruction frequency measuring method. In the drawing, 1 is a central processing unit (CPU), 11 is a sampling pulse generating mechanism, 12 is an instruction execution / interrupt control circuit, 120 and 122 are logical product (AND) circuits, 121 and 123 are latches, 2 is a main storage unit (MSU), 21 indicates an old program status word (OLD PSW), 22 indicates an instruction frequency measurement routine, 23 indicates a program, 24 indicates an execution count recording word (1 to n), indicates a sampling pulse, and indicates an instruction execution completion signal.

Claims (1)

(57) [Claims] A sampling pulse generating mechanism for periodically generating a sampling pulse; a mechanism for temporarily suspending execution of a program currently being executed in response to the sampling pulse; A mechanism (21, 12) for reading an instruction to be executed next from the main storage unit (MSU) (2) from information at the time of interruption of the program; Measurement mechanism (1
2, 22, 24), the timing at which the execution of the currently executing program is temporarily suspended in response to the sampling pulse () is set to a specific timing () predetermined for each instruction. And a means (120) for setting the specific timing () to the same length for all instructions, and a mechanism for measuring the instruction frequency based on a signal generated by the means (120). An instruction frequency measurement method characterized by activating (12,22,24) and measuring the instruction execution frequency.