JPH02254815A - Input/output circuit - Google Patents

Abstract

PURPOSE:To reduce a delay time of an output signal caused by an output circuit by using a transfer gate provided on the way of an output signal line so as to switch the impedance of the output signal line at the impedance between a high impedance and a low impedance in response to an input output control signal. CONSTITUTION:When the title circuit is used as an output circuit, a transfer gate 1 is opened by using an input and output control signal outputted to a control signal line G. Thus, an output signal of an internal logic cell part outputted to an output signal line 5 is subject to waveform shaping by inverter circuits 10, 11 of an output circuit part and outputted to the outside of a chip via a signal pad 3. On the other hand, when the title circuit is used as an input circuit, the transfer gate 1 is closed by the input output control signal outputted to the control signal line 6. Thus, the output signal line 50 reaches a high impedance state and it is equivalent that the output signal line 5 is not electrically connected. Thus, the delay time is adjusted for each output terminal.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to input/output circuits for electric circuits, and in particular to various control boards, LSIs, ICs, etc. that input and output signals using a common terminal. This relates to the input/output circuit portion of the.

<Conventional technology> Generally, when a specific terminal is to be used for both signal input and output, input and output signal lines are connected to a common terminal to prevent signal interference and element destruction. It is necessary to switch between and connect as necessary.

Conventionally, a circuit as shown in FIG. 2 has been used for this purpose. In this circuit, an input signal line 4 and an output signal line 5 are connected to the signal pad 3 via an output signal control section 100. Here, the output signal control section 100 is an inverter circuit 1
05, P-channel MO5FETIOI and N-channel MO3FET10 for switching the impedance of the NAND circuit 103, NOR circuit 104 and output signal line
It is composed of 2. In this circuit, the output signal output to the output signal line 5 is divided and input to the NAND circuit 103 and the NOR circuit 104 together with the control signal on the control signal line 6, and the NA between the control signal and the output signal is
After ND and NOR operations, P channel MO5F
It is input to ETIOI and N-channel MO5FET102, respectively. This output MOSFET pair 101
．． 102 switches the state of the output signal line 50 between a high impedance state and a low impedance state according to the signal level of the control signal line 6. When the output signal line 50 is in a low impedance state, the signal level of the output signal line 50 changes depending on the state of the output signal line 5, so the signal pad 3 functions as an output terminal.

On the other hand, when the output signal line 50 is in a high impedance state, when viewed from the signal pad 3 side, the output signal line 5 is not connected and is electrically equivalent. Therefore, in this case, the signal pad 3 functions as an input terminal.

<Problem to be solved by the invention> As mentioned above, in the conventional circuit, the output signal control section 1
The state of the output signal @50 is determined as a result of the arithmetic processing of the control signal and the output signal at 00. Therefore, the number of circuit elements constituting the output signal control section 100 has to increase. In addition, the control signal and the output signal are connected to the NAND circuit 10.
3 and NOR circuit 104 for arithmetic processing,
Since the output delay time depends on the characteristics of the arithmetic circuit, high-speed operation is difficult, and it is necessary to change the delay time for each input/output terminal to suppress the instantaneous current depending on the purpose of the terminal. It also had the disadvantage of being difficult.

The present invention has been made in view of the above points, and an object of the present invention is to provide an input/output bidirectional circuit that uses a small number of circuit elements, has an output delay time that does not depend on logic operation circuits, and is capable of high-speed operation. There is.

Means for Solving the Problems> In order to achieve the above object, the present invention provides an input/output circuit equipped with an input/output bidirectional terminal connected to both an input signal line and an output signal line. The output signal line leading to the opposite terminal is provided with a transfer gate for switching the state of the output signal line between a high impedance state and a low impedance state in accordance with an input/output control signal.

<Function> The impedance of the output signal line leading to the input/output bidirectional terminal is 2.24
, output signal @. I'm on my way, Ayu.

The argate switches between high and low states in response to input/output control signals.

<Embodiment> Hereinafter, an example of an input/output circuit according to the present invention will be described in detail with reference to FIG.

An input signal line 40 and an output signal line 50 are both connected to the signal pad 3 . The input circuit section includes an input protection circuit 7 for protecting the internal circuit from abnormal signal input and a two-stage inverter circuit 8.9.

On the other hand, the output circuit part is a two-stage inverter circuit 10.1
1 and transfer gate 1 to form a circuit extending to signal pad 3. Further, a control signal line 6 for switching the function of the circuit between an input function and an output function is connected to the inverter circuit 2. Both the input signal and the output signal of the inverter circuit 2 are connected to both ends of the transfer gate 1, respectively, to switch the state of the transfer gate 1.

When this circuit is used as an output circuit, the transfer gate 1 is opened by the input/output control signal output to the control signal line 6. As a result, the output signal of the internal logic cell portion that is output to the output signal line 5 is waveform-shaped by the inverter circuit 10.11 of the output circuit portion, and is then transmitted from the output signal line 50 via the signal pad 3 via the transfer gate 1. output outside the chip. On the other hand, when using this circuit as an input circuit, the control signal line 6 is
The transfer gate 1 is closed by the outputted input/output control signal. This puts the output signal line 50 in a high impedance state, and when viewed from the signal pad 3, it is electrically equivalent to the output signal line 5 not being connected. Therefore, a signal input from outside the chip to the input signal line 40 is input from the input signal line 4 to the internal logic cell section via the input protection circuit 7 and inverter circuit 8.9 of the input circuit section. As described above, the signal pad 3 can be used as an input/output bidirectional terminal.

Further, by changing the channel length of the field effect transistor forming the transfer gate 1, the output impedance can be adjusted.

<Effects of the Invention> According to the present invention, the delay time caused by the output circuit portion of the output signal can be significantly reduced because there is no need to perform logic operations with the input/output side/control signal as in the conventional case. be able to.

In addition, the delay time in the output circuit section can be controlled by changing the channel length of the field effect transistor that makes up the transfer gate, so the delay time can be adjusted for each output terminal, and the instantaneous current can suppress the increase in

Furthermore, the number of elements required for input/output control is reduced, making it suitable for high integration.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an example of an input/output circuit according to the present invention,
FIG. 2 is a circuit diagram showing an example of a conventional input/output circuit. 1... Transfer gate, 2... Inverter circuit, 3... Signal pad, 4... Input signal line, 5...
・Output signal line,

Claims (1)

[Claims] 1. In an input/output circuit equipped with an input/output bidirectional terminal connected to both an input signal line and an output signal line, the output signal line leading to the input/output bidirectional terminal is connected to the output signal line in accordance with an input/output control signal. An input/output circuit comprising a transfer gate for switching the state of a signal line between a high impedance state and a low impedance state.