JPH02253693A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPH02253693A
JPH02253693A JP1073825A JP7382589A JPH02253693A JP H02253693 A JPH02253693 A JP H02253693A JP 1073825 A JP1073825 A JP 1073825A JP 7382589 A JP7382589 A JP 7382589A JP H02253693 A JPH02253693 A JP H02253693A
Authority
JP
Japan
Prior art keywords
holes
plating resist
thin film
forming
recesses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1073825A
Other languages
Japanese (ja)
Other versions
JP2706306B2 (en
Inventor
Chie Ohashi
大橋 千恵
Motoo Asai
元雄 浅井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP1073825A priority Critical patent/JP2706306B2/en
Publication of JPH02253693A publication Critical patent/JPH02253693A/en
Application granted granted Critical
Publication of JP2706306B2 publication Critical patent/JP2706306B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE:To eliminate remnants of plating resist and facilitate manufacture of a printed wiring board which has through-holes or via-holes having high contact reliability by a method wherein the parts of a photosensitive thin film covering the parts corresponding to piercing holes or recesses are cut off to form apertures beforehand. CONSTITUTION:After a photosensitive thin film for forming a plating resist film is formed on an insulting board surface, the parts of the photosensitive film corresponding to piercing holes or recesses for forming through-holes or via-holes are cut off to form apertures beforehand. As developer is made to penetrate into all over the insides of the piercing holes or recesses from the beginning of a development, resin films in the piercing holes or recesses can be dissolved and removed securely an quickly. With this constitution, remnants of the plating resist can be effectively eliminated and a printed wiring board which has patterns having high contact reliability, especially the small diameter through-holes or via-holes, can be manufactured.

Description

【発明の詳細な説明】 〔産業上の利用分野] 本発明は、プリント配線板の製造方法に関し、特に貫通
孔などに対応する個所に予め開孔を設けてなる感光性樹
脂薄膜を現像処理することによってめっきレジストを形
成し、その後めっきするという方法の採用により、信頼
性に優れたスルーホールやバイアホールを有するプリン
ト配線板を製造する方法について提案する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a printed wiring board, and in particular, a method for developing a photosensitive resin thin film in which holes are formed in advance at locations corresponding to through holes, etc. This paper proposes a method for manufacturing printed wiring boards having through holes and via holes with excellent reliability by forming a plating resist and then plating.

〔従来の技術〕[Conventional technology]

従来、プリント配線板の製造において、まず絶縁基板上
に電解めっきあるいは無電解めっきにより、導体回路を
形成する場合、まず前記絶縁基板上に、めっきレジスト
形成用感光性薄膜を形成し、導体回路を形成する個所以
外を露光し、次いで現像処理を施十ことにより導体回路
を形成する部分の前記感光性薄膜を熔解除去し、その後
電解めっきあるいは無電解めっきを施すことにより、導
体回路を形成している。
Conventionally, in the manufacture of printed wiring boards, when a conductor circuit is first formed on an insulating substrate by electrolytic plating or electroless plating, a photosensitive thin film for forming a plating resist is first formed on the insulating substrate, and then the conductor circuit is formed. A conductor circuit is formed by exposing the area other than the part to be formed, then performing a development treatment to melt and remove the photosensitive thin film in the part where the conductor circuit is to be formed, and then performing electrolytic plating or electroless plating. There is.

近年、電子技術の進歩に伴い、大型コンビュータなどの
電子機器については、高密度化あるいは演算機能の高速
化が図られている。その結果、プリント配線板に形成さ
れるスルーホールやバイアホールを小径化する必要が生
じた。
In recent years, with advances in electronic technology, electronic devices such as large computers are becoming more densely packed or have higher speed calculation functions. As a result, it has become necessary to reduce the diameter of through holes and via holes formed in printed wiring boards.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

さて、前述の如き従来のプリント配線板の製造方法にお
けるめっきレジスト形成用感光性薄膜は、液状のめっき
レジスト形成用感光性樹脂を塗布したり、めっきレジス
ト形成用感光性フィルムを貼着することにより形成する
のが普通である。
Now, in the conventional method of manufacturing printed wiring boards as described above, the photosensitive thin film for forming a plating resist is produced by applying a liquid photosensitive resin for forming a plating resist or pasting a photosensitive film for forming a plating resist. It is common to form.

しかしながら、このようにして形成したレジスト形成用
感光性薄膜のうち、前者の感光性樹脂液を塗布すること
により形成しためっきレジスト形成用感光性薄膜は、前
記樹脂液が貫通孔あるいは凹部内に入り込むため、現像
処理を施してもこの貫通孔あるいは凹部内で生成した前
記めっきレジスト形成用感光性薄膜については、これを
短時間で完全に除去することは困難であった。一方、後
者のめっきレジスト形成用感光性フィルムを貼着するこ
とによりめっきレジスト形成用感光性薄膜を形成する方
法の場合は、現像処理の終了間際に、半溶解状態のめっ
きレジスト形成用樹脂が、前記貫通孔あるいは凹部内に
入り込み易く、結局いずれの方法も貫通孔や凹部内にめ
っきレジストの残滓が残留してめっきレジスト残りが発
生し易いのが実情であった。
However, among the photosensitive thin films for resist formation formed in this way, the photosensitive thin film for plating resist formation formed by applying the former photosensitive resin liquid is such that the resin liquid enters the through holes or recesses. Therefore, even if a development process is performed, it is difficult to completely remove the photosensitive thin film for forming a plating resist formed inside the through hole or recess in a short period of time. On the other hand, in the latter method of forming a photosensitive thin film for forming a plating resist by pasting a photosensitive film for forming a plating resist, the resin for forming a plating resist in a semi-dissolved state is removed just before the end of the development process. It is easy to get into the through holes or recesses, and in reality, in either method, residues of plating resist remain in the through holes or recesses, resulting in the formation of plating resist residues.

こうした孔内に残留するめっきレジストの残滓は、スル
ーホールやバイアホールの接続不良の原因となる。従っ
て、このようなめっきレジストの残滓は、できるだけ残
さないことが重要である。
Residues of plating resist remaining in these holes cause poor connection of through holes and via holes. Therefore, it is important to leave as little of this plating resist residue as possible.

しかし、従来の現像技術では、貫通孔や凹部内へのめっ
きレジスト残りを完全に除去することは困難で、とりわ
け高密度実装するようなときに小径にした貫通孔や凹部
を有する絶縁基板の場合には、かかる除去操作に極めて
長い時間を要するため、スルーホールやバイアホール以
外の導体回路部の解像度が劣化して、得られる回路の導
通信頬性が低くなるという欠点があった。
However, with conventional development techniques, it is difficult to completely remove the remaining plating resist in through holes and recesses, especially in the case of insulating substrates with through holes and recesses that are made small in diameter for high-density mounting. However, since such a removal operation takes an extremely long time, the resolution of conductive circuit parts other than through-holes and via-holes deteriorates, and the resulting circuit has a disadvantage that the conductivity of the circuit becomes low.

本発明の目的は、孔大内へのめっきレジスト残りによる
導通不良が起きるという問題点を解決し、極めて接続信
幀性の高いスルーホールあるいはバイアホールを有する
プリント配!a仮を有利に製造する方法を開発せんとす
るところにある。
The purpose of the present invention is to solve the problem of poor conductivity caused by residual plating resist inside the holes, and to improve printed circuit boards having through holes or via holes with extremely high connection reliability. The aim is to develop a method for advantageously manufacturing a.

〔問題点を解決するための手段〕[Means for solving problems]

この目的実現のために本発明においては、スルーホール
やバイアホールなどを形成するための貫通孔あるいは凹
部を有する絶縁基板表面にめっきレジストを形成し、そ
の上から導電めっきを施すことにより、導体回路を形成
するプリント配線板の製造方法において、まず、前記絶
縁基板表面に、めっきレジスト形成用感光性薄膜を被成
し、次いで基板に有する前記貫通孔あるいは凹部に対応
する部分の該感光性薄膜を切欠して開孔を設け、次いで
前記感光性薄膜を現像処理してめっきレジストを形成し
、その後導体回路を形成する方法、を提案する。
In order to achieve this objective, in the present invention, a plating resist is formed on the surface of an insulating substrate having through holes or recesses for forming through holes, via holes, etc., and conductive plating is applied thereon. In the method for manufacturing a printed wiring board, first, a photosensitive thin film for forming a plating resist is formed on the surface of the insulating substrate, and then the photosensitive thin film is coated on a portion of the substrate corresponding to the through hole or recess. We propose a method of cutting out an opening, then developing the photosensitive thin film to form a plating resist, and then forming a conductor circuit.

〔作 用〕[For production]

本発明においては、絶縁基板表面にめっきレジスト形成
用感光性薄膜を被成した後、前記スルーホールあるいは
バイアホール等を形成するための貫通孔あるいは凹部に
対応する個所の前記感光性情nりを切欠して予め開孔を
設けることが特徴である。
In the present invention, after a photosensitive thin film for forming a plating resist is formed on the surface of an insulating substrate, the photosensitive layer is cut out at a location corresponding to a through hole or recess for forming the through hole or via hole. The feature is that the holes are provided in advance.

このようにする理由は、めっきレジスト形成のために行
う現像処理に当って、感光性薄膜の未露光部分を溶解除
去する場合、感光性薄膜はその表面から順に溶解除去し
なければならない。ところが、基板に形成した貫通孔あ
るいは凹部内には、樹脂液を用いる方法ではめっきレジ
スト形成用感光性樹脂液が侵入しており、その硬化させ
て薄膜化した孔内の樹脂を短時間で完全に除去するとい
うことは非常に困難であった。また、樹脂フィルムを用
いる方法でも、現像処理終了の間際に、めっきレジスト
形成用樹脂が、半溶解状態で貫通孔あるいは凹部内に入
り込むため、樹脂液を用いる場合と同じような現象が生
じる。従って、いずれの方法であっても、孔大内にはめ
っきレジストの残滓が残留することになる。
The reason for this is that when the unexposed portions of the photosensitive thin film are to be dissolved and removed during the development process performed to form the plating resist, the photosensitive thin film must be dissolved and removed in order from the surface thereof. However, in the method using resin liquid, the photosensitive resin liquid for forming the plating resist enters into the through holes or recesses formed in the substrate, and the resin in the holes, which has been hardened and thinned, is completely removed in a short time. It was extremely difficult to remove it. In addition, even in the method using a resin film, the resin for forming a plating resist enters the through hole or recess in a semi-dissolved state just before the end of the development process, so a phenomenon similar to that in the case of using a resin liquid occurs. Therefore, no matter which method is used, residues of the plating resist will remain inside the hole.

そこで、前記貫通孔あるいは凹部に対応する部分を覆う
感光性薄膜を、予め切欠して開孔しておくことにより、
貫通孔や凹部内の隅々にまで現像液を現像処理の最初か
ら浸入させることができるから、前記孔内樹脂膜の溶解
除去が確実、迅速となり、めっきレジスト残りを効果的
に防止できる。
Therefore, by making a hole in the photosensitive thin film that covers the portion corresponding to the through hole or recess in advance,
Since the developer can penetrate into every corner of the through holes and recesses from the beginning of the development process, the resin film inside the holes can be dissolved and removed reliably and quickly, and plating resist residue can be effectively prevented.

本発明において、前記貫通孔に対応する個所の感光性薄
膜を切欠開孔する方法としては、ピン刺し、レーザー、
高圧水あるいは高圧空気などの手段を採用することがで
きる。一方、凹部に対応する部分の感光性薄膜を切欠開
孔する方法としては、レーザーなどを使用することがで
きる。
In the present invention, the method of making a notch in the photosensitive thin film at a location corresponding to the through hole includes pin pricking, laser,
Means such as high pressure water or high pressure air can be employed. On the other hand, a laser or the like can be used to cut out holes in the photosensitive thin film in the portions corresponding to the recesses.

前工程で基板上に被成した前記感光性薄膜に設ける開孔
の大きさは、10μmφ以上とすることが好ましい。こ
の理由は、感光性薄膜に設ける孔がIOμmφよりも小
さいと現像液の通りが悪くなり、孔を開けた効果が減殺
されるからである。
The size of the opening provided in the photosensitive thin film formed on the substrate in the previous step is preferably 10 μm or more. The reason for this is that if the holes formed in the photosensitive thin film are smaller than IO μmφ, the passage of the developer becomes difficult and the effect of opening the holes is diminished.

また、前記感光性薄膜を現像する方法としては、スプレ
ー法や浸漬法を適用することができる。
Further, as a method for developing the photosensitive thin film, a spray method or a dipping method can be applied.

本発明の方法は、特にアスペクト比(穴の深さ/穴径の
値)が3以上のスルーホールやバイアホールを形成した
配線板に適用することが有利である。この理由は、アス
ペクト比が3以上のスルーホールやバイアホールの内部
には、めっきレジスト残りが生じ易いが、本発明の方法
を適用することによって、アスペクト比が3以上のスル
ーホールやバイアホールの内部まで現像液を容易に到達
させることができるからである。
It is particularly advantageous to apply the method of the present invention to wiring boards in which through holes or via holes with an aspect ratio (hole depth/hole diameter) of 3 or more are formed. The reason for this is that plating resist remains easily inside through-holes and via-holes with an aspect ratio of 3 or more; however, by applying the method of the present invention, through-holes and via-holes with an aspect ratio of 3 or more are This is because the developer can easily reach the inside.

なお、本発明においては、基板上に形成されためっきレ
ジスト形成用感光性樹脂薄膜を露光した後、現像するに
際し、振動を与えながら行うことも有効であると言える
In addition, in the present invention, it can be said that it is also effective to perform the development while applying vibrations after exposing the photosensitive resin thin film for forming a plating resist formed on the substrate.

現像に際して振動を与えるとよい理由はつぎのように考
えられる。すなわち、振動を与えながら現像を行うと、
めっきレジスト形成用感光性樹脂薄膜の現像液に対する
溶解性および拡散性を向上させることができ、かつスル
ーホールやバイアホールの気泡を取り除き、貫通孔や凹
部を現像液で濡らすことにより、めっきレジストを効率
良く溶解させることができる。
The reason why it is preferable to apply vibration during development is considered to be as follows. In other words, if you perform development while applying vibration,
The solubility and diffusivity of photosensitive resin thin films for forming plating resists in developing solutions can be improved, and plating resists can be improved by removing air bubbles from through holes and via holes and by wetting through holes and recesses with developing solution. It can be dissolved efficiently.

このような振動は、音波もしくは機械的な運動により発
生する振動であることが望ましく、特に音波は15 K
Hz 〜I Mllzの周波数を有し、0.35W/c
m2以上の強さをもつものが有効である。前記周波数お
よび強さでは、キャビティションが起こりやすく、気泡
の除去に好適である。
Such vibrations are preferably vibrations generated by sound waves or mechanical motion, and in particular, sound waves are generated at 15 K.
Has a frequency of Hz ~ I Mllz and 0.35W/c
A material with a strength of m2 or more is effective. At the above frequency and intensity, cavitation is likely to occur and is suitable for removing air bubbles.

さらに、前記音波を発生させる方法としては、圧電ある
いは磁歪振動子を用いるか、前記振動子にホーンを取付
けたものを用いるか、もしくはスピーカーを用いる方法
が好ましい。また音波は、基板に対して入射角0〜15
°で与えられることが望ましく、これより入射角が大き
くなると、全反射をおこしてしまい、音波が基板を透過
せず、振動の効率が低下する。また、機械的運動による
振動は、基板を同一平面内で反復運動させるか、上下方
向で組合わせることにより与えられるものが望ましい。
Furthermore, as a method for generating the sound waves, it is preferable to use a piezoelectric or magnetostrictive vibrator, to use a horn attached to the vibrator, or to use a speaker. Also, the sound waves have an incident angle of 0 to 15 with respect to the substrate.
It is desirable that the angle of incidence be given in degrees; if the incident angle is larger than this, total reflection will occur, the sound waves will not pass through the substrate, and the efficiency of vibration will decrease. Further, it is preferable that the vibration caused by the mechanical movement be applied by repeatedly moving the substrates in the same plane or by combining the substrates in the vertical direction.

なお、本発明における現像処理は、基板を現像液に浸漬
させるか、基板に現像液を吹き付けるか、あるいは現像
液に浸漬させたまま現像液を吹き付けて行う。
The development process in the present invention is performed by immersing the substrate in a developer, spraying the developer onto the substrate, or spraying the developer while the substrate is immersed in the developer.

その現像液としては、溶媒現像法では、有機溶媒ヲ用い
、アルカリ現像法ではアルカリ溶液を用いる。かかる有
機溶媒としては、クロロセン、エターナrR(脂化成製
)、ブチルセルソルブ、メチルセルソルブ、ブチルセル
ソルブアセテート、メチルセルソルブアセテート、メチ
ルエチルケトン、シクロヘキサノンなどから選ばれる少
なくとも1種、またアルカリ溶液としては炭酸ナトリウ
ム、メタケイ酸ナトリウムなどから選ばれる少なくとも
1種を用いることができる。
As the developer, an organic solvent is used in the solvent development method, and an alkaline solution is used in the alkaline development method. Such organic solvents include at least one selected from chlorocene, Eterna rR (manufactured by Fuikasei Co., Ltd.), butyl cellosolve, methyl cellosolve, butyl cellosolve acetate, methyl cellosolve acetate, methyl ethyl ketone, cyclohexanone, etc., and as the alkaline solution, At least one selected from sodium carbonate, sodium metasilicate, etc. can be used.

以上説明したように、本発明の適用によりめっきレジス
ト残りのない現像が可能になり、接続信頼性の高いスル
ーホールやバイアホールを有するプリント配線板を製造
することができる。
As explained above, by applying the present invention, it becomes possible to perform development without leaving plating resist, and it is possible to manufacture a printed wiring board having through holes and via holes with high connection reliability.

〔実施例〕〔Example〕

実施例1 (1)  フェノールノボラック型エポキシ樹脂(油化
シェル製、商品名:エビコート154)60重量部、ビ
スフェノールA型エポキシ樹脂(油化シェル製、商品名
:エピコー)1001) 40重量部、イミダゾール系
硬化剤(四国化成製、商品名:2P4MH2)4重量部
、エポキシ樹脂微粉末(東し製、商品名:トレパールE
P−B)30重量部、塩化パラジウム(薄光化学工業製
、特級塩化パラジウム)0.1重量部とを3本ローラー
で混合し、メチルセルソルブで粘度500 CPに調整
して無電解めっき用接着剤を調製した。
Example 1 (1) 60 parts by weight of phenol novolak epoxy resin (manufactured by Yuka Shell, trade name: Ebikoat 154), 40 parts by weight of bisphenol A epoxy resin (manufactured by Yuka Shell, trade name: Epicor 1001), imidazole 4 parts by weight of curing agent (manufactured by Shikoku Kasei, trade name: 2P4MH2), fine epoxy resin powder (manufactured by Toshi, trade name: Trepar E)
Mix 30 parts by weight of P-B) and 0.1 part by weight of palladium chloride (special grade palladium chloride manufactured by Usiko Kagaku Kogyo Co., Ltd.) using three rollers, adjust the viscosity to 500 CP with methyl cellosolve, and prepare an adhesive for electroless plating. A drug was prepared.

(2)  この接着剤をロールコータ−を使用して、め
っき触媒として塩化パラジウムを含有するガラスエポキ
シ絶縁板上に塗布した。ついで乾燥硬化させて、厚さ2
0μmの接着層を形成した。
(2) Using a roll coater, this adhesive was applied onto a glass epoxy insulating plate containing palladium chloride as a plating catalyst. Then dry and harden it to a thickness of 2.
An adhesive layer of 0 μm was formed.

(3)  この基板を無水クロム# 800 g/ l
水溶液中に浸漬して、接着剤の表面を粗化した後、中和
溶液(シブレイ社製、商品名: P N 150)に浸
漬し、水洗した。
(3) This substrate was coated with anhydrous chromium #800 g/l
After roughening the surface of the adhesive by immersing it in an aqueous solution, it was immersed in a neutralizing solution (manufactured by Sibley, trade name: PN 150) and washed with water.

(4)所定の位置にNC多軸ドリル加工機(Excei
lon Automation社製、商品名: Mar
kDrilier)を使用して0 、3 mm−の貫通
孔をあけた。
(4) Place the NC multi-axis drilling machine (Excei) in the specified position.
Manufactured by lon Automation, product name: Mar
A through hole of 0.3 mm was made using a drill (kDrillier).

(5)めっきレジスト形成用感光性樹脂のドライフィル
ム(サンノプコ社製、商品名:DFR−400)を前記
基板に重ね、プレス用ローラーを用いて、l m/mi
nで基板を搬送しながら、115℃、2 kg/cr1
12でラミネートした後、水銀灯で露光した。
(5) A dry film of a photosensitive resin for forming plating resist (manufactured by San Nopco, trade name: DFR-400) was stacked on the substrate, and a press roller was used to press the dry film at l m/mi.
While transporting the substrate at 115℃, 2 kg/cr1
After laminating with No. 12, it was exposed with a mercury lamp.

(6)  貫通孔部に0.3龍φのビンを指して穴明け
を行った。
(6) A hole was made in the through hole using a 0.3 mm diameter bottle.

(7)次いで、60秒間現現像を行い、めっきレジスト
を形成した後、再露光及び熱処理を行ってめっきレジス
トを十分硬化させた。
(7) Next, development was performed for 60 seconds to form a plating resist, and then re-exposure and heat treatment were performed to sufficiently harden the plating resist.

(8)無電解めっきを行って導体回路を形成した。(8) Electroless plating was performed to form a conductor circuit.

実施例2 (1)感光性を有する無電解めっき用接着剤を調整し、
導体パターンが形成されている絶縁基板にナイフコータ
ーで塗布した後、70℃で乾燥させて厚さ50μmの感
光性樹脂絶縁層を形成した。
Example 2 (1) Prepare a photosensitive adhesive for electroless plating,
After coating the insulating substrate on which the conductive pattern was formed using a knife coater, it was dried at 70° C. to form a photosensitive resin insulating layer with a thickness of 50 μm.

(2)次いで、100μmφの黒円が印刷されたフォト
マスクを用いて露光した後現像を行い、配線板上に10
0μmφの開口を形成した。
(2) Next, a photomask printed with a black circle of 100 μmφ was used for exposure and development, and 10 μm diameter black circles were printed on the wiring board.
An opening of 0 μmφ was formed.

(3)次いで、100℃で1時間、更に150℃で10
時間加熱処理した。
(3) Next, at 100°C for 1 hour, and then at 150°C for 10
Heat treated for hours.

(4)配線板をクロム酸に10分間浸漬して、樹脂表面
を粗面化し、中和後水洗した。
(4) The wiring board was immersed in chromic acid for 10 minutes to roughen the resin surface, neutralized, and then washed with water.

(5)市販のすず/パラジウムコロイド触媒に浸漬して
活性化した。
(5) It was activated by immersion in a commercially available tin/palladium colloidal catalyst.

(6)  めっきレジスト形成用感光性ドライフィルム
をラミネートした。
(6) A photosensitive dry film for forming a plating resist was laminated.

(71co、レーザーにより50μmφの六開けを行っ
た後、露光した。
(71co, 6 holes of 50 μmφ were made with a laser, and then exposed.

(8)  60秒間現像を行い、めっきレジストを形成
した後、再露光及び熱処理を行って、めっきレジストを
十分硬化させた。
(8) After developing for 60 seconds to form a plating resist, re-exposure and heat treatment were performed to sufficiently harden the plating resist.

(9)無電解めっきを行って、多層プリント配線板を製
造した。
(9) Electroless plating was performed to produce a multilayer printed wiring board.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、現像に際して貫
通孔や凹部にめっきレジスト残りが認められないので、
接続信頼性の高いパターン、特に小径のスルーホールや
バイアホールを有するプリント配線板を製造するのに極
めて有効であると言える。
As explained above, according to the present invention, no plating resist remains in the through holes or recesses during development.
It can be said that this method is extremely effective for manufacturing printed wiring boards having patterns with high connection reliability, especially small-diameter through holes and via holes.

Claims (2)

【特許請求の範囲】[Claims] 1.スルーホールやバイアホールなどを形成するための
貫通孔あるいは凹部を有する絶縁基板表面にめっきレジ
ストを形成し、その上から導電めっきを施すことにより
、導体回路を形成するプリント配線板の製造方法におい
て、 まず、前記絶縁基板表面に、めっきレジスト形成用感光
性薄膜を被成し、次いで基板に有する前記貫通孔あるい
は凹部に対応する部分の該感光性薄膜を切欠して開孔を
設け、次いで前記感光性薄膜を現像処理してめっきレジ
ストを形成し、その後導体回路を形成することを特徴と
するプリント配線板の製造方法。
1. In a method for manufacturing a printed wiring board in which a conductive circuit is formed by forming a plating resist on the surface of an insulating substrate having through holes or recesses for forming through holes, via holes, etc., and applying conductive plating on the resist, First, a photosensitive thin film for forming a plating resist is formed on the surface of the insulating substrate, and then openings are provided by cutting out the photosensitive thin film at portions corresponding to the through holes or recesses in the substrate. 1. A method for manufacturing a printed wiring board, which comprises developing a transparent thin film to form a plating resist, and then forming a conductor circuit.
2.前記感光性薄膜に設ける開孔の径が10μmφ以上
の大きさである請求項1記載のプリント配線板の製造方
法。
2. 2. The method for manufacturing a printed wiring board according to claim 1, wherein the diameter of the opening provided in the photosensitive thin film is 10 μm or more.
JP1073825A 1989-03-28 1989-03-28 Manufacturing method of printed wiring board Expired - Lifetime JP2706306B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1073825A JP2706306B2 (en) 1989-03-28 1989-03-28 Manufacturing method of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1073825A JP2706306B2 (en) 1989-03-28 1989-03-28 Manufacturing method of printed wiring board

Publications (2)

Publication Number Publication Date
JPH02253693A true JPH02253693A (en) 1990-10-12
JP2706306B2 JP2706306B2 (en) 1998-01-28

Family

ID=13529315

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1073825A Expired - Lifetime JP2706306B2 (en) 1989-03-28 1989-03-28 Manufacturing method of printed wiring board

Country Status (1)

Country Link
JP (1) JP2706306B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009071132A (en) * 2007-09-14 2009-04-02 Hitachi Aic Inc Method for manufacturing multilayer wiring board

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52138671A (en) * 1976-05-17 1977-11-18 Hitachi Ltd Method of producing printed circuit substrate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52138671A (en) * 1976-05-17 1977-11-18 Hitachi Ltd Method of producing printed circuit substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009071132A (en) * 2007-09-14 2009-04-02 Hitachi Aic Inc Method for manufacturing multilayer wiring board

Also Published As

Publication number Publication date
JP2706306B2 (en) 1998-01-28

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