JPH02251196A - Mounting method - Google Patents
Mounting methodInfo
- Publication number
- JPH02251196A JPH02251196A JP7341389A JP7341389A JPH02251196A JP H02251196 A JPH02251196 A JP H02251196A JP 7341389 A JP7341389 A JP 7341389A JP 7341389 A JP7341389 A JP 7341389A JP H02251196 A JPH02251196 A JP H02251196A
- Authority
- JP
- Japan
- Prior art keywords
- adhesives
- packages
- top face
- board
- package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 18
- 239000000853 adhesive Substances 0.000 claims abstract description 21
- 230000001070 adhesive effect Effects 0.000 claims abstract description 21
- 229910000679 solder Inorganic materials 0.000 claims abstract description 14
- 239000006071 cream Substances 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 238000010438 heat treatment Methods 0.000 claims abstract description 4
- 238000002844 melting Methods 0.000 claims abstract description 3
- 230000008018 melting Effects 0.000 claims abstract description 3
- 238000005476 soldering Methods 0.000 abstract description 5
- 238000001035 drying Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、各種電気・電子装置に用いるチップコンデン
サ、集積回路パッケージなどの各種電気部品（以下パッ
ケージ類という）を基板上に装着するマウント方法に関
する。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a mounting method for mounting various electrical components (hereinafter referred to as packages) such as chip capacitors and integrated circuit packages used in various electrical and electronic devices onto a substrate.
従来の技術
第２図は従来のマウント方法の工程説明図である。第２
図において、工程へでプリント基板１１の上に形成した
クリーム半ＩＩＩ層１２に、パッケージ類１３を部品装
着ノズル１４によって運んで装着し、工程Ｂでリフロー
炉内において遠赤外線ヒータ１５によって、パッケージ
類１３の両側の足（端子）１３ａ１３ｂをクリーム半田
層１２で半田付けを行なって装着が完了する。BACKGROUND OF THE INVENTION FIG. 2 is a process explanatory diagram of a conventional mounting method. Second
In the figure, packages 13 are carried by a component mounting nozzle 14 and attached to the cream semi-III layer 12 formed on the printed circuit board 11 in the step B, and the packages are The legs (terminals) 13a13b on both sides of the terminal 13 are soldered with the cream solder layer 12 to complete the installation.
発明が解決しようとする課題
しかしながら、上記従来のマウント方法では、リフロー
炉内で半田付けする際、オープン現象、すなわちパッケ
ージ類１３の複数の足１３ａ 、 １３ｂ・・・のうち
、たとえば１本の足１３ｂの長さが短い場合、他の足１
３ａによってパッケージ類１３が支えられることになっ
て、短い足１３ｂが浮き上がって半田付けができないと
いう現象が発生ずるという問題があった。Problems to be Solved by the Invention However, in the conventional mounting method described above, when soldering is performed in a reflow oven, an open phenomenon occurs, that is, for example, one leg among the plurality of legs 13a, 13b, etc. of the packages 13. If the length of 13b is short, the other leg 1
Since the packages 13 are supported by the short legs 13b, there is a problem in that the short legs 13b are lifted up and cannot be soldered.
本発明はこのような従来の問題を解決するものであり、
オープン現象を減少させることかできるすぐれたマウン
ト方法を提供することを目的とするものである。The present invention solves these conventional problems,
The object of the present invention is to provide an excellent mounting method that can reduce the open phenomenon.
課題を解決するための手段
上記の課題を達成するために本発明のマウント方法は、
クリーム半田層を形成した基板上にパッケージ類本体を
収縮性接着剤により接着した後、加熱して前記収縮性接
着剤を収縮させるとともに、前記パッケージ類の足を前
記クリーム半田層の溶融により半田付けしてパッケージ
類を基板上に装着することを特徴とするものである。Means for Solving the Problems In order to achieve the above problems, the mounting method of the present invention includes:
After bonding the package main body with a shrinkable adhesive onto the substrate on which the cream solder layer is formed, heating is performed to shrink the shrinkable adhesive, and the legs of the packages are soldered by melting the cream solder layer. This feature is characterized in that the packages are mounted on the board.
作用
上記の構成において、パッケージ類本体を収縮性接着剤
により基板上に接着して加熱することにより、収縮性８
着剤が熱または乾燥により収縮してパッケージ類本体と
基板とが接近した状態で固定され、パッケージ類の複数
の足は長さに長短があっても、はとんどの足の端部がク
リーム半田層の溶融した半田内に引込まれて確実に半田
付けされ、いわゆるオープン現象の発生が著しく減少す
る。Effect In the above configuration, the package main body is bonded to the substrate with a shrinkable adhesive and heated, so that the shrinkage is reduced to 8.
The adhesive shrinks due to heat or dryness, and the main body of the package and the board are fixed in close proximity, and even if the multiple legs of the package are different in length, the ends of most of the legs are creamy. The solder layer is drawn into the molten solder to ensure soldering, and the occurrence of so-called open phenomena is significantly reduced.
実施例 以下、本発明の実線例を図面を参照しながら説明する。Example Hereinafter, a solid line example of the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例のマウント方法の工程説明図
である。第１図において、■程Ｉでプリント基板１のク
リーム半田ｒｖＪ２ Ａを印刷形成した上面１ａに、接
着剤塗布機３により収縮性接着剤４を所定位置に塗布し
、■稈■でパッケージ類５を部品装着ノスル６で運んで
、パッケージ類本体５ａを前記収縮性接着剤４によりプ
リント基板１の上面１ａに接着し、次に工程■てリフロ
ー炉（図示せず）内において遠赤外線ヒータフにより加
熱することにより、収縮性接着剤４が熱または乾燥によ
り収縮してパッケージ類本体５ａとプリント基板１の上
面１ａとの間隔が減少して両者か接近し、それによりパ
ッケージ類５の両（ｍの足５ｂ、５ｃか多少長さか異な
っても 端部がクリーム状半田層２Ａか溶融した半ｒＩ
Ｉ ２ Ｂに引込まれて半［［１付けされることになる
。FIG. 1 is a process explanatory diagram of a mounting method according to an embodiment of the present invention. In FIG. 1, shrinkable adhesive 4 is applied to the upper surface 1a of the printed circuit board 1 on which the cream solder rvJ2 A has been printed and formed in Step I using the adhesive applicator 3, and packages 5 are applied using the culm ■. is carried by the parts mounting nostle 6, and the package main body 5a is adhered to the upper surface 1a of the printed circuit board 1 using the shrinkable adhesive 4. Next, in step 2, it is heated in a reflow oven (not shown) using a far-infrared heater. As a result, the shrinkable adhesive 4 shrinks due to heat or dryness, and the distance between the package body 5a and the top surface 1a of the printed circuit board 1 decreases and they approach each other. Even if the lengths of legs 5b and 5c are slightly different, the ends are creamy solder layer 2A or melted half-rI.
It will be drawn into I 2 B and a half [[1 will be attached.
上記実施例によれは、プリン１〜基板１の上面１ａに塗
布した収量性接着剤４か遠赤外線し一タによって加熱さ
れることにより収縮し、パッケージ類５の足５ｂ、５ｃ
をその長さが若干巽なっていても、クリーム半田層２Ａ
が溶融した半［−１１２１３に引込んで確実に半田付け
して、パッケージ類５を基板１に装着することができ、
オープン現象を著しく減少させることができる。In the above embodiment, the adhesive 4 applied to the upper surface 1a of the print 1 to the substrate 1 shrinks when heated by far infrared rays, and the legs 5b, 5c of the packages 5 are heated.
Even if the length is slightly longer, the cream solder layer 2A
The package 5 can be attached to the board 1 by pulling it into the molten half [-11213] and soldering it securely.
The open phenomenon can be significantly reduced.
発明の効果
以上のように本発明のマウント方法においては、クリー
ム半田層を形成した基板に収縮性接着剤を塗布し、パッ
ケージ類のパッケージ類本体を基板に前記１１！縮性接
着剤によって接着し、次いで加熱することにより、収縮
性接着剤を収縮させてパッケージ類本体と基板とを接近
させ、パッケージ類の複数の足をその長短にかかわらず
クリーム半ロー層が溶融した半ＩＩＩに引込んで確実に
半田付けして、パッケージ類を基板−ヒに装着すること
ができ、オープン現象を著しく減少できるという利点を
有している。Effects of the Invention As described above, in the mounting method of the present invention, a shrinkable adhesive is applied to a substrate on which a cream solder layer has been formed, and the package body of the package is attached to the substrate as described in 11! By adhering with a shrinkable adhesive and then heating, the shrinkable adhesive shrinks and the package body and the substrate are brought closer together, and the cream semi-low layer melts the multiple legs of the package, regardless of their length. Packages can be attached to the board by reliably soldering them into the semi-circular parts, which have the advantage that open phenomena can be significantly reduced.
第１図は本発明の一実施例のマウン）〜方法の工程説明
図、第２図は従来のマウント方法の工程説明図である。
１・・・プリント基板（基板）、２Ａ・・・クリーム半
ＩＴＩ ＪＧＩ＋、４・・・収縮性接着剤、５・・・パ
ッケージ′Ｍｊ、５ａ・・・パッケージガ１本体、５１
）、５ｃ・・・パッケージ類１の足。
代理人 森 木 義 弘
Ｔ−祥Ａ
第２
図FIG. 1 is a process explanatory diagram of a mounting method according to an embodiment of the present invention, and FIG. 2 is a process explanatory diagram of a conventional mounting method. DESCRIPTION OF SYMBOLS 1... Printed circuit board (board), 2A... Cream semi-ITI JGI+, 4... Shrinkable adhesive, 5... Package 'Mj, 5a... Package 1 body, 51
), 5c...Package type 1 foot. Agent Yoshihiro Moriki T-Sho A Figure 2
Claims (1)
体を収縮性接着剤により接着した後、加熱して前記収縮
性接着剤を収縮させるとともに、前記パッケージ類の足
を前記クリーム半田層の溶融により半田付けしてパッケ
ージ類を基板上に装着することを特徴とするマウント方
法。1. After bonding the package main body with a shrinkable adhesive onto the substrate on which the cream solder layer is formed, heating is performed to shrink the shrinkable adhesive, and the legs of the packages are soldered by melting the cream solder layer. A mounting method characterized by mounting packages on a board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7341389A JPH02251196A (en) | 1989-03-24 | 1989-03-24 | Mounting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7341389A JPH02251196A (en) | 1989-03-24 | 1989-03-24 | Mounting method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02251196A true JPH02251196A (en) | 1990-10-08 |
Family
ID=13517488
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7341389A Pending JPH02251196A (en) | 1989-03-24 | 1989-03-24 | Mounting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02251196A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4126913A1 (en) * | 1991-08-14 | 1993-02-18 | Siemens Ag | METHOD FOR SOLDERING AND ASSEMBLING PCBS WITH COMPONENTS |
-
1989
- 1989-03-24 JP JP7341389A patent/JPH02251196A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4126913A1 (en) * | 1991-08-14 | 1993-02-18 | Siemens Ag | METHOD FOR SOLDERING AND ASSEMBLING PCBS WITH COMPONENTS |
| US5271548A (en) * | 1991-08-14 | 1993-12-21 | Siemens Aktiengesellschaft | Method for applying solder to and mounting components on printed circuit boards |
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