JPH02251161A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH02251161A JPH02251161A JP1072587A JP7258789A JPH02251161A JP H02251161 A JPH02251161 A JP H02251161A JP 1072587 A JP1072587 A JP 1072587A JP 7258789 A JP7258789 A JP 7258789A JP H02251161 A JPH02251161 A JP H02251161A
- Authority
- JP
- Japan
- Prior art keywords
- film
- chip
- conductive wiring
- insulator
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 239000012212 insulator Substances 0.000 claims abstract description 17
- 239000011347 resin Substances 0.000 abstract description 9
- 229920005989 resin Polymers 0.000 abstract description 9
- 238000007789 sealing Methods 0.000 abstract description 8
- 239000002184 metal Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体素子（チップ）を樹脂などで包んだ形の
半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device in which a semiconductor element (chip) is wrapped in a resin or the like.
樹脂封止の従来の半導体装置は半導体素子（チップ）の
電極とリードとの電気的接続に導電金属細線を使用する
ことが一般的である。Conventional resin-sealed semiconductor devices generally use thin conductive metal wires for electrical connection between electrodes and leads of a semiconductor element (chip).
上述した従来の半導体装置は半導体素子（チップ）の電
極とリードとの電気的接続に幾本もの導電金属細線を使
用している為、樹脂封止時に導電金属細線が流れ導電金
属細線同志を接触させたり、導電金属細線自身を断線さ
せ半導体装置の特性をそこなわせるという欠点がある。The conventional semiconductor device described above uses a number of thin conductive metal wires for electrical connection between the electrodes and leads of the semiconductor element (chip), so the thin conductive metal wires flow during resin sealing and contact the thin conductive metal wires. This has the disadvantage that the thin conductive metal wire itself may be disconnected and the characteristics of the semiconductor device may be impaired.
上述した従来の半導体装置に対し、本発明は半導体素子
（チップ）の電極とリードとの電気的接続を導電金属細
線の代わりにすでに導電配線パターンの形成されたフィ
ルム状の絶縁体によって行なうという相違点を有する。The present invention differs from the conventional semiconductor device described above in that the electrical connections between the electrodes and leads of the semiconductor element (chip) are made using a film-like insulator on which a conductive wiring pattern has already been formed, instead of using conductive metal thin wires. Has a point.
本発明の半導体装置は半導体素子（チップ）の電極とリ
ードを電気的接続を行なう幾本もの導電配線パターンを
樹脂封止時に流れない様に固定させるという意味ですで
に導電配線パターンを形成しているフィルム状の絶縁体
を有している。The semiconductor device of the present invention has already formed conductive wiring patterns in the sense that the conductive wiring patterns that electrically connect the electrodes and leads of the semiconductor element (chip) are fixed so that they will not flow during resin sealing. It has a film-like insulator.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の第１の実施例の透視図である。FIG. 1 is a perspective view of a first embodiment of the invention.
フィルム状絶縁体（枠型）の裏面に形成された導電配線
パターン２の両サイドがリード３と半導体素子（チップ
）４の電極５と接続することにより導通をとる。Both sides of a conductive wiring pattern 2 formed on the back surface of a film-like insulator (frame type) are connected to leads 3 and electrodes 5 of a semiconductor element (chip) 4 to establish electrical continuity.
第２図は第１図のＡ−Ａ線断面図で、第３図は第１図の
フィルム状絶縁体１の下面図である。2 is a sectional view taken along the line A-A in FIG. 1, and FIG. 3 is a bottom view of the film-like insulator 1 in FIG. 1.
第４図は本発明の第２の実施例の透視図である。FIG. 4 is a perspective view of a second embodiment of the invention.
この実施例では第１図乃至第３図に示す第１の実施例と
違い、フィルム状絶縁体１′が中抜きではない為、封止
樹脂６の上方外部からの湿気がチップに達しないという
利点がある。In this embodiment, unlike the first embodiment shown in FIGS. 1 to 3, the film-like insulator 1' is not hollow, so moisture from the outside above the sealing resin 6 does not reach the chip. There are advantages.
第５図は第４図のＢ−Ｂ断面図で、第６図は第４図のフ
ィルム状絶縁体１′の下面図である。5 is a sectional view taken along the line BB in FIG. 4, and FIG. 6 is a bottom view of the film insulator 1' in FIG. 4.
以上説明したように本発明は導電配線パターンを形成し
たフィルム状絶縁体で半導体素子（チップ）の電極とリ
ードを電気的接続することにより、樹脂封止時に導電配
線パターンが流れ導電配線パターン同志が接触する不具
合をなくすことができる効果がある。又リード−リード
間も固定することになるのでリード同志の接触する不具
合も少なくなる効果がある。As explained above, the present invention electrically connects the electrodes and leads of a semiconductor element (chip) with a film-like insulator on which a conductive wiring pattern is formed. This has the effect of eliminating contact problems. Further, since the leads are also fixed, there is an effect that the problem of the leads coming into contact with each other is reduced.
第１図は本発明の第１の実施例の透視図、第２図は第１
図のＡ−Ａ線断面図、第３図は第１図のフィルム状絶縁
体の下面図である。
１・・・・・・フィルム状絶縁体（枠型）、２・・・・
・・導電配線パターン、３・・・・・・リード、４・・
・・・半導体素子（チップ）、５・・・・・電極（チッ
プ上）、６・・・・封止樹脂
第４図は本発明の第２の実施例の透視図、第５図は第４
図のＢ−Ｂ断面図、第６図は第４図のフィルム状絶縁体
の下面図である。
１′・・・・・・フィルム状絶縁体（平型）、２・・・
・・・導電配線パターン、３・・・・・・リード、４・
・・・半導体素子（チップ）、５・・・・・電極（チッ
プ上）、６・・・・・封止樹脂。
代理人 弁理士 内 原 晋
トー α） ξつFIG. 1 is a perspective view of the first embodiment of the present invention, and FIG. 2 is a perspective view of the first embodiment of the present invention.
3 is a sectional view taken along the line A-A in the figure, and FIG. 3 is a bottom view of the film-like insulator shown in FIG. 1. 1...Film-like insulator (frame type), 2...
...Conductive wiring pattern, 3...Lead, 4...
... Semiconductor element (chip), 5 ... Electrode (on chip), 6 ... Sealing resin FIG. 4 is a perspective view of the second embodiment of the present invention, and FIG. 4
FIG. 6 is a bottom view of the film-like insulator shown in FIG. 4. 1'...Film-like insulator (flat type), 2...
...Conductive wiring pattern, 3...Lead, 4.
... Semiconductor element (chip), 5 ... Electrode (on the chip), 6 ... Sealing resin. Agent Patent Attorney Susumu Uchihara α) ξtsu
Claims (1)
半導体素子（チップ）の電極とリードが電気的接続され
ていることを特徴とする半導体装置。A semiconductor device characterized in that electrodes and leads of a semiconductor element (chip) are electrically connected by a film-like insulator having a conductive wiring pattern.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1072587A JPH02251161A (en) | 1989-03-24 | 1989-03-24 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1072587A JPH02251161A (en) | 1989-03-24 | 1989-03-24 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02251161A true JPH02251161A (en) | 1990-10-08 |
Family
ID=13493666
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1072587A Pending JPH02251161A (en) | 1989-03-24 | 1989-03-24 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02251161A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08124957A (en) * | 1994-10-28 | 1996-05-17 | Nec Corp | Semiconductor integrated circuit |
-
1989
- 1989-03-24 JP JP1072587A patent/JPH02251161A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08124957A (en) * | 1994-10-28 | 1996-05-17 | Nec Corp | Semiconductor integrated circuit |
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