JPH02250369A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH02250369A JPH02250369A JP7065489A JP7065489A JPH02250369A JP H02250369 A JPH02250369 A JP H02250369A JP 7065489 A JP7065489 A JP 7065489A JP 7065489 A JP7065489 A JP 7065489A JP H02250369 A JPH02250369 A JP H02250369A
- Authority
- JP
- Japan
- Prior art keywords
- elements
- semiconductor
- interposed
- semiconductor device
- divided
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 22
- 239000000758 substrate Substances 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000010355 oscillation Effects 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に係り、特に一つの半導体基板に形
成された複数の半導体素子が熱的平衡状態に配置される
必要がある半導体集積回路装置に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor device, and particularly to a semiconductor integrated circuit in which a plurality of semiconductor elements formed on one semiconductor substrate need to be arranged in a thermally balanced state. Regarding equipment.
一つの半導体基板(チップ)において、発熱量の大きい
一つの素子と、その熱くよって特性に影響を受けやすい
他の複数素子とを共存させる場合、同チップ内の素子間
で温度差を小さくする手段として、(株)コロナ社、昭
和54年6月20日発行「集積回路工学+21j p
6〜p9に、特に温度係数が問題となる場合、発熱量の
大きい部分を距離的に遠ざけるとか、等温度線に沿って
特定の部品を配置するなどのレイアウトの例が挙げられ
ている。When a single element that generates a large amount of heat and multiple other elements whose characteristics are easily affected by heat coexist on one semiconductor substrate (chip), a means to reduce the temperature difference between the elements in the same chip. "Integrated Circuit Engineering +21j p.
6 to 9, when the temperature coefficient is particularly a problem, examples of layouts are given, such as moving parts that generate a large amount of heat away from each other, or arranging specific parts along isothermal lines.
三端子レギユレータは、第3図の概略回路図で示すよう
に、一つの半導体基板1の一方にパワートランジスタQ
を、他方にB、G、R(バンド・ギャップ・レファレン
ス)回路を配置し、後者により基準電圧を決定し、その
基準電圧と抵抗比をとることKよってその出力電圧が得
られるようになっている、
本出願人においては、上記B、G、R回路のう゛ち特に
整合性を要求さねる2つのトランジスタQl。As shown in the schematic circuit diagram of FIG. 3, the three-terminal regulator has a power transistor Q on one side of one semiconductor substrate 1.
The output voltage can be obtained by placing B, G, and R (band gap reference) circuits on the other side, determining the reference voltage using the latter, and taking the resistance ratio with that reference voltage. In the present applicant, among the B, G, and R circuits, two transistors Ql that do not particularly require matching are used.
q2は第4図に示すように隣り合うように配置されてい
た。q2 were arranged adjacent to each other as shown in FIG.
前記した三端子レギユレータにおいて、発振マージン等
は改善されたが、他方において、基本的特性であるライ
ンレギエレーシツン(負荷電流に対する出力電圧の安定
度)、ロードレギエレーシiン(入力電圧に対する出力
電圧の°安定度)等が従来品よりも悪化するという問題
を生じた。In the three-terminal regulator described above, the oscillation margin etc. have been improved, but on the other hand, the basic characteristics of line regulation (stability of output voltage with respect to load current) and load regulation (stability of output voltage with respect to input voltage) This resulted in problems such as voltage stability) being worse than conventional products.
これはパワートランジスタQの発熱により、その基準電
圧を決定するB、G、R回路における最も熱の影響を受
けやすい2つのトランジスタq1゜q2に温度差が生じ
、VaEにずれが生じると、とKより基準電圧が変化す
るためである。This is because the heat generated by the power transistor Q creates a temperature difference between the two transistors q1 and q2 that are most susceptible to heat in the B, G, and R circuits that determine the reference voltage, causing a deviation in VaE. This is because the reference voltage changes more.
本発明は上記した課題にかんがみてなされたものであり
、同一チップ内に熱的不平衡が生じた場合でも、熱的整
合性を保つ必要のある複数の素子を熱的平衡状態と等価
もしくはそれに近い状態に保つことのできる構造を提供
することを目的とする。The present invention has been made in view of the above-mentioned problems, and even when thermal unbalance occurs within the same chip, it is possible to maintain a plurality of elements that need to maintain thermal consistency in a state equivalent to or close to a thermally balanced state. The purpose is to provide a structure that can maintain close conditions.
上記目的を達成するために本発明の半導体装置は、一つ
の半導体基板の一生表面に熱的にノ(う/スを保つ必要
のある複数の半導体素子が形成され、このうち、一方の
、又はい(つかの素子は複数個に分割され、これらの素
子によって他方の素子を挾みこみ、または相互に挾みこ
むように配置されているものである。In order to achieve the above object, the semiconductor device of the present invention includes a plurality of semiconductor elements that need to maintain a thermal atmosphere on the surface of a single semiconductor substrate throughout its lifetime, and one of the semiconductor elements, (Some elements are divided into a plurality of parts, and these elements are arranged so as to sandwich other elements or to sandwich each other.
熱的バランスを保つ必要のある複数の素子がさらに分割
され、交互に配置されることにより熱源からの距離的に
熱的バランスがさらに保たれ、負荷変動電圧の変動が小
さくなる。By further dividing a plurality of elements that need to maintain thermal balance and arranging them alternately, thermal balance is further maintained in terms of distance from the heat source, and fluctuations in load fluctuation voltage are reduced.
第1図は本発明の一実施例を示すものであって、IAク
ラス三端子レしエレータ(第3図参照)において、パワ
ートランジスタQの動作時の温度上昇によって最も影響
を受けやすいバンド・ギヤラフ拳しファレンス回路の2
つのトランジスタqleq2の配置を示す半導体装置の
一部拡大平面図である。FIG. 1 shows an embodiment of the present invention, in which the band gear rough is the most affected by the temperature rise during operation of the power transistor Q in an IA class three-terminal relay element (see FIG. 3). fist reference circuit 2
FIG. 2 is a partially enlarged plan view of the semiconductor device showing the arrangement of two transistors qleq2.
第3図で示した回路で、従来の回路レイアウトではql
、q2の熱的バランスが乱れた場合に、最も出力電圧が
変動し易いが、第1図に示すように、エミッタ寸法が特
に大きいトランジスタq2を2つのトランジスタq2A
、q2BK分割し、他方のトランジスタq1の両側から
挾みこむような形で配置する。In the circuit shown in Figure 3, in the conventional circuit layout, ql
, q2 is most likely to fluctuate when the thermal balance of the transistors q2 and q2 is disturbed.
, q2BK and arranged so as to sandwich it from both sides of the other transistor q1.
なお、図示されないがq2Aとq2Bとは相互KAA配
線を介し電気的に結合されている。Although not shown, q2A and q2B are electrically coupled to each other via KAA wiring.
第2図に示すように、熱的影響を受けた場合に在来の構
造では、2個の索子Q 1 * Q 2の間の熱勾配曲
線は急な角度をもつが、本発明では3個の光子に分れて
交互に配置されたことでもqlを基準としてq2のうち
、Q2Aが温度低となっても、q2全体でみれば平均化
されてQl、q2が熱的平衡にあるのと同等もしくはそ
れに近以した特性を示すことになる。As shown in FIG. 2, in the conventional structure when subjected to thermal influence, the thermal gradient curve between the two cords Q 1 * Q 2 has a steep angle, but in the present invention, the thermal gradient curve has a steep angle. Even if the temperature of Q2A of q2 becomes low based on ql, it is averaged over q2 as a whole and Ql and q2 are in thermal equilibrium. It will show characteristics equivalent to or similar to.
このようにql、q2の熱バランスが保たれることKよ
り、パワートランジスタQの負荷変動時に基準電圧の変
動が小さくなる。Since the thermal balance between ql and q2 is maintained in this way, the fluctuation in the reference voltage becomes smaller when the load on the power transistor Q changes.
げたが、回路の形態により、双方の素子をそねぞj複数
個に分割し、交互に配置することにより同号の効果が得
られる。However, depending on the form of the circuit, the same effect can be obtained by dividing both elements into a plurality of pieces and arranging them alternately.
バンド・ギャップ・レファレンス回路の特定素子の熱バ
ランスを保持できることにより、変動値が50%以下に
なり、電源電圧に対する出力電圧の安定度及び負荷電流
に対する出力電圧の安定度が著しく改善された。By being able to maintain the thermal balance of specific elements of the band gap reference circuit, the fluctuation value was reduced to 50% or less, and the stability of the output voltage with respect to the power supply voltage and the stability of the output voltage with respect to the load current were significantly improved.
第1図は本発明の一実施例を示す半導体装置の一部拡大
平面図(レイアウト図)である。
第2図は素子配列による熱バランスの効果を示す曲線図
である。
第3図は三端子レギユレータの要部回路図であるう
第4図は従来例を示す半導体装置の一部拡大平面図であ
る。
l・・・半導体チップ、2・・・半導体素子領域、Q・
・・パワートランジスタ、ql、q2・・・トランジス
タ。
第
図
第
図
第
第
図FIG. 1 is a partially enlarged plan view (layout diagram) of a semiconductor device showing an embodiment of the present invention. FIG. 2 is a curve diagram showing the effect of heat balance due to element arrangement. FIG. 3 is a circuit diagram of a main part of a three-terminal regulator, and FIG. 4 is a partially enlarged plan view of a conventional semiconductor device. l...Semiconductor chip, 2...Semiconductor element area, Q.
...power transistor, ql, q2...transistor. Figure Figure Figure Figure
Claims (1)
保つ必要のある複数の半導体素子が形成され、このうち
、一方の又はいくつかの素子は複数個に分割され、これ
ら素子によって他方の素子を挾みこみ、または相互に挾
みこむように配置されていることを特徴とする半導体装
置。 2、半導体素子が1対になっており、一方の素子が他方
を挾むように配置されている二・三端子レギュレータ。[Claims] 1. A plurality of semiconductor elements that need to maintain thermal balance are formed on one main surface of one semiconductor substrate, and one or some of these elements are divided into multiple pieces. A semiconductor device characterized in that these elements are arranged so as to sandwich the other element or sandwich each other. 2. A two- and three-terminal regulator in which a pair of semiconductor elements is arranged, with one element sandwiching the other.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7065489A JPH02250369A (en) | 1989-03-24 | 1989-03-24 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7065489A JPH02250369A (en) | 1989-03-24 | 1989-03-24 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02250369A true JPH02250369A (en) | 1990-10-08 |
Family
ID=13437857
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7065489A Pending JPH02250369A (en) | 1989-03-24 | 1989-03-24 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02250369A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1280208A2 (en) * | 2001-07-27 | 2003-01-29 | Nec Corporation | Bipolar transistor |
JP2006332528A (en) * | 2005-05-30 | 2006-12-07 | Denso Corp | Semiconductor device with current mirror circuit |
-
1989
- 1989-03-24 JP JP7065489A patent/JPH02250369A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1280208A2 (en) * | 2001-07-27 | 2003-01-29 | Nec Corporation | Bipolar transistor |
EP1280208A3 (en) * | 2001-07-27 | 2004-06-23 | NEC Electronics Corporation | Bipolar transistor |
US7235860B2 (en) | 2001-07-27 | 2007-06-26 | Nec Electronics Corporation | Bipolar transistor including divided emitter structure |
US7239007B2 (en) | 2001-07-27 | 2007-07-03 | Nec Electronics Corporation | Bipolar transistor with divided base and emitter regions |
JP2006332528A (en) * | 2005-05-30 | 2006-12-07 | Denso Corp | Semiconductor device with current mirror circuit |
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