JPH0224405B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a
This invention relates to a digitally controlled variable attenuation circuit.

For many years, rotary or sliding variable resistors have been used to control the volume of audio amplifiers, but recently digitally controlled variable attenuators, which provide a new operating feel, have come into use. .

Conventional variable attenuators can be used by rotating a knob or
Whereas it was controlled by sliding,
Digitally controlled variable attenuators are usually controlled by changing the amount of attenuation in steps by pressing an up (volume increase) button or a down (volume decrease) button. If you keep pressing the up or down button, the volume will gradually change over time.

By the way, in a conventional rotary variable attenuator, for example, the change characteristics of the attenuation amount with respect to the rotation angle are usually as follows.
It has a characteristic called the A curve as shown in FIG. This characteristic provides a curve that allows for as natural a volume change as possible in response to rotational operation, and also takes into account the ease of manufacturing a variable resistor.

When the attenuation amount of the characteristic shown in FIG. 1 is expressed in logarithm (dB value), it becomes as shown in FIG. 2.

In contrast, a digitally controlled variable attenuator
Usually 1dB, 1.5dB, or 2dB per step
As shown in FIG. 3, the attenuation amount changes at equal logarithmic intervals, so that the change characteristic of the attenuation amount with respect to the attenuation step is a logarithm linear characteristic, as shown in FIG. The characteristics in Figure 3 are per step
This is an example of a change of 1.5dB. If this is expressed so that the scale of the attenuation amount is expressed as %, the result will be as shown in FIG. 4.

Comparing this curve with the curve in FIG. 1, it can be seen that at large attenuation steps (steps 30 to 50), the amount of attenuation becomes extremely large. Therefore, for example, if you increase the volume from the lowest volume position (step 55) at equal time intervals per step, the volume will not increase at first,
There was a problem in that the volume started to rise from around step 30) and suddenly rose towards the end (steps 10 to 0), resulting in a so-called curve with a poor volume rise.

The object of the present invention is to make the change characteristics of a digitally controlled variable attenuator, which changes by a constant dB per step, similar to the attenuation curve of a conventional rotary type or sliding type variable attenuator.

As mentioned above, with a digitally controlled variable attenuator, the amount of attenuation is changed by pressing the up or down button, but the attenuation step changes at equal time intervals while the up or down button is held down. Instead, it may change slowly where the amount of attenuation is small, and change quickly as the amount of attenuation increases.

Therefore, the present invention changes the attenuation change curve from a logarithmic linear characteristic by changing the attenuation step speed of a digitally controlled variable attenuator depending on the position of the attenuation step.

FIG. 5 shows an example of the attenuation characteristics of the digitally controlled variable attenuator according to the present invention. The variable attenuator in this example is also designed to change by 1.5 dB per step, as in the examples shown in FIGS. 3 and 4.

In the example of FIG. 5, the step change speed in range A (steps 0 to 10) is compared to
15) and 4x for range C (steps 16-31).
8x in range D (steps 32-39), range E
(Steps 40 to 55) are set to multiply by 16.

As described above, by changing the step change speed, a damping characteristic close to the curve shown in FIG. 2 can be obtained.

Next, FIG. 6 shows an embodiment of the variable attenuation circuit of the present invention in which the rate of change of the attenuation step is changed depending on the attenuation position as described above.

In FIG. 6, reference numeral 10 denotes a variable attenuator 11 that digitally controls the input signal (that is, attenuates or increases it at a substantially constant rate per step), and an up-down counter 12 that generates a digital control signal corresponding to the attenuation step. Variable attenuation means 20 includes a basic clock generator 21, a frequency divider 22 for dividing the basic clock into 1/2, 1/4, 1/8 and 1/16, and an up-down counter. 1
A gate circuit 23 for generating signals corresponding to the output ranges A, B, C, D, and E of the gate circuit 2;
a data selector 24 for selecting one of the output signals of the frequency divider 22 according to the output signal of the frequency divider 22;
and an attenuation/increase instruction circuit 25 for generating an up input or down input signal for the up/down counter 12 based on the output signal of the data selector 24 and the attenuation or increase command signal. It is a means.

FIG. 7 shows each waveform of the frequency divider 22 in FIG. 6.
In Figure 7, e is the basic clock output and d is 1/
2 frequency division output, c is 1/4 frequency division output, b is 1/8 frequency division output,
a is the waveform of the 1/16 frequency divided output. Then, for the output ranges A, B, C, D, and E of the up-down counter 12 that provides data for the attenuation step,
The frequency-divided signals a, b, c, d, and e are selected by the data selector 24, respectively.

Here, for example, step 16 (range C, waveform c)
Let us consider the case where the process moves to step 15 (range B, waveform b) at time _t2 . Assuming that the step transition is performed by the rising edge of a selected waveform among waveforms a-c, the transition to the next step 14 occurs at time _t4 . in this case,
The duration of step 15 is eight times the period of the basic clock e.

However, for example, from step 16 to step 15
If the transition to step 14 occurs at time t ₁ , the transition to the next step 14 occurs at time t ₂ , so step
The duration of 15 is four times the period of the basic clock e. In the specifications of the attenuation characteristics shown in Fig. 5, although the duration of each step in range B is eight times the basic clock, in the direction of decreasing (increasing) attenuation, the duration of each step is 8 times longer than the basic clock.
Depending on the state of waveform b when transitioning from 16 to 15,
There is a problem that the duration of step 15 is different. (This problem also applies to step 39,
31 and 11, but it does not occur in the case where the amount of attenuation increases.) An example of a method for solving this problem is shown in FIG. In the example shown in FIG. 8, the range is changed by setting the frequency division outputs of higher digits (for example, b and a when c is selected) to 1 than the frequency division output selected by the data selector 24. A method is used in which the initial state of the frequency-divided output at the time of transition is kept constant.

The example in FIG. 8 shows the case where the process moves from step 16 to step 15 at time _t1 . The frequency division output b is
It is set to 1 until time t ₁ and is unset immediately after time t ₁ , so it falls at time t ₂ .
Starting at time _t3 , the step moves from step 15 to step 14. Similarly, at times t ₅ , t ₇ , t ₉ steps 13, 12,
Move to 11. Therefore, the duration of step 15 is always eight times the basic clock period. In addition,
As for the frequency divided output a, the setting is canceled immediately after time _t9 .

FIG. 9 shows an example of a specific circuit for operating as shown in FIG. 8.

In FIG. 9, each flip-flop constituting the frequency divider 22 is provided with a set input, and signals A, B, C, D, and E for selecting each range are used to select one upper digit of the frequency divided output. This is a flip-flop that creates a frequency-divided output.

Incidentally, when the step transition is performed at the falling edge of waveforms a to e, the above-mentioned flip-flop may be reset.

According to the present invention, by changing the rate of change of the attenuation step in accordance with the amount of attenuation, an operational feeling similar to that of a mechanical variable attenuator can be obtained. However, the same rate of change can be obtained. Furthermore, by setting or resetting the frequency division outputs of higher digits than the selected frequency division output, an effect can be obtained in that uncertain factors in the change characteristics can be excluded.

[Brief explanation of drawings]

Figures 1 and 2 are characteristic diagrams of changes in the conventional rotary variable attenuator, Figures 3 and 4 are characteristic diagrams of changes in the conventional digitally controlled variable attenuator, and Figure 5 is the characteristic diagram of the digitally controlled variable attenuator according to the present invention. Figure 6 is a block diagram of a variable attenuation circuit according to an embodiment of the present invention, Figures 7 and 8 are diagrams explaining the operation of Figure 6, and Figure 9 is a diagram of the above embodiment. FIG. 3 is a circuit diagram of a main part of another embodiment in which a part of the above is improved. 10... variable attenuation means, 11... variable attenuator,
12...Up-down counter, 20...Attenuation/
Increase instruction generating means, 21... Basic clock generating means, 22... Frequency divider, 23... Gate circuit, 24
...Data selector, 25...Means for creating attenuation/increase instructions.

Claims (1)

[Claims] 1. An up-down counter, a variable attenuator that attenuates or increases at a substantially constant rate per count, and a plurality of ranges of the output of the up-down counter. a gate circuit that outputs a frequency-divided output, a basic clock generator, a frequency divider that divides the frequency of the basic clock to generate a plurality of frequency-divided outputs, and a gate circuit that generates a plurality of frequency-divided outputs according to the gate circuit output. The data selector is composed of a data selector for selecting one of the outputs, and an attenuation/increase instruction circuit for supplying a count clock to the input of the up-down counter based on the output of the data selector. Among the multiple ranges of the output of the up-down counter, the one with the lowest frequency is selected from among the multiple divided outputs in the area corresponding to the small amount of attenuation, and as the amount of attenuation increases, A variable attenuation circuit characterized by selecting a high frequency one. 2. The frequency divider is composed of multiple frequency divider circuits connected in cascade, and the output of the frequency divider circuit of higher digits than the frequency divider circuit whose output is selected is set or reset. A variable attenuation circuit according to claim 1, characterized in that: