JPH0298204A - Signal processing circuit for digital audio signal - Google Patents

Abstract

PURPOSE:To prevent production of noise during fade-in and fade-out operation by varying each sample value of a digital audio signal gradually by a prescribed value each, generating a high frequency eliminating command signal and converting an analog audio signal into a digital data corresponding to a component of an audio signal at a prescribed frequency or below. CONSTITUTION:An output data of a digital filter 3 is converted into a digital data corresponding to a component of an audio signal below a frequency fco represented by an output data of the digital filter 3. Moreover, a changeover switch 11 outputs an output data selectively of the digital filter 3 in the absence of a high frequency elimination command signal outputted from a microcomputer 2 and outputs selectively an output data of a digital filter 12 in the presence of the high frequency elimination command signal. Then an output of the changeover switch as an output data of a data conversion means 10 is fed to a D/A conversion circuit 4. Thus, noise production during fadein and fade-out operation is prevented.

Description

TECHNICAL FIELD The present invention relates to a signal processing circuit for digital audio signals.

BACKGROUND ART A circuit as shown in FIG. 3 is known as a signal processing circuit for processing digital audio signals in digital audio disk players and the like. In the figure, a digital audio signal output from an EFM demodulation circuit or the like in a digital audio disc player is supplied to a digital attenuator 1.

The digital audio signal supplied to the digital attenuator 1 is a signal corresponding to digital data including time-division multiplexed left and right channel audio information. The digital attenuator 1 is further supplied with output data from the microcomputer 2 .

The digital attenuator 1 is configured to reduce the input data by a value corresponding to the attenuation rate indicated by the output data of the microcomputer 2 by division or the like. Further, the microcomputer 2 supplies the digital attenuator 1 with data that gradually changes by a predetermined value at predetermined time intervals in response to a fade-in command or a fade-out command issued by a key operation on an operation unit (not shown). It is configured as follows.

The output data of digital attenuator 1 is supplied to digital filter 3. Digital filter 3
is configured to remove unnecessary components above a predetermined cutoff frequency fcO caused by oversampling and sampling of digital audio data. The output data of this digital filter 3 is sent to a D/A (digital/analog) converter circuit 4.
supplied to The D/A conversion circuit 4 has a demultiplexer that separates time-division multiplexed left and right channel audio data for each channel.
The /A conversion circuit 4 forms analog audio signals for both left and right channels.

This analog audio signal for both left and right channels is
After unnecessary components are removed by an LPF (low pass filter) 5.6, the signal is output via an amplifier 7.8.

In the above configuration, the attenuation rate in the digital attenuator 1 gradually changes by a predetermined value at predetermined time intervals depending on the output data of the microcomputer 2, and so-called fade-in and fade-out are performed.

However, when the output data of the microcomputer 2 changes, the attenuation rate of the digital attenuator 1 changes in a stepwise manner, so that a high-frequency noise component is generated in the output data of the digital attenuator 1 at the point where the attenuation rate changes. That will happen. In order to suppress the generation of this noise component, it is necessary to reduce the amount of attenuation per step of the digital attenuator 1 and increase the number of steps to attenuate the signal. Therefore, the conventional signal processing circuit has a problem in that it is difficult to inexpensively remove noise during fade-in and fade-out operations.

Summary of the Invention The present invention has been made in view of the above points, and includes:
It is an object of the present invention to provide a signal processing circuit for digital audio signals that can inexpensively prevent the generation of noise during fade-in and fade-out operations.

In the signal processing circuit for digital audio signals according to the present invention, in response to a command, each sample value of the digital audio signal is gradually changed by a predetermined value over a predetermined time, and a sample value changing means, and data conversion for converting output data of the sample value changing means into digital data corresponding to a component below a predetermined frequency of an analog audio signal represented by the output data only when a high frequency removal command signal is present. The means are provided.

EXAMPLES Hereinafter, examples of the present invention will be described in detail with reference to FIGS. 1 and 2.

In FIG. 1, a digital attenuator 1.microcomputer 2. Digital filter 3, D/A conversion circuit 4. LPF5,6. Amplifier 7.8 is connected similarly to the circuit of FIG. However, in this example, the output data of the digital urn filter 3 is supplied directly to one input terminal of the changeover switch 11 and via the digital filter 12 to the other input terminal of the changeover switch 11. The digital urn filter 12 has a predetermined cutoff frequency fc+ within the audible frequency band.
(<fco), and the output data of the digital filter 3 corresponds to the components below the frequency fco of the audio signal represented by the output data of the digital filter 3. converted into digital data. Further, the changeover switch 11 selectively outputs the output data of the digital filter 3 when there is no high frequency removal command signal outputted from the microcomputer 2, and selectively outputs the output data of the digital filter 3 when the high frequency removal command signal is output from the microcomputer 2. It is configured to selectively output 12 output data.

Therefore, in the absence of the high frequency removal command signal, the digital filters 3.12. The cutoff frequency of the data conversion means 10 consisting of the changeover switch 11 is fcO, and when the high frequency removal command signal is present, the cutoff frequency of the data conversion means 10 is lowered to fcI. The output of the changeover switch 11 as the output data of the data conversion means 10 is supplied to the D/A conversion circuit 4.

The operation of the processor in the microcomputer 2 with the above configuration will be explained with reference to the flowchart in FIG.

When a fade-out command is issued during execution of a main routine or the like, the processor moves to step S1 to determine whether it is a fade-out command, and if it is a fade-out command, moves to step S2 to perform initial settings for fade-out. Next, the processor moves to step S4 and starts sending a high frequency removal command signal to the selector switch 11 to lower the cutoff frequency of the data converting means 10 from fco to fcI, which is built in the microcomputer 2. Start the timer. Next, the processor sets the attenuation rate of the digital attenuator 1 to K (step S5), and determines whether the time T1 has elapsed (step S6).

In step S6, when it is determined that the time TI has not elapsed, the processor moves to step S5 again,
When it is determined that time T1 has elapsed, the processor sets the attenuation rate of digital attenuator 1 to a value greater than K by Δ1 (step S7), and determines whether or not time T2 has elapsed (step S8).

In step S8, when it is determined that the time T2 has not elapsed, the processor moves to step S7 again,
When it is determined that time T2 has elapsed, the processor sets the attenuation rate of digital attenuator 1 to a value larger than K by Δ2 (step S9), and determines whether or not time T3 has elapsed (step 510).

In step S10, when it is determined that the time T3 has not elapsed, the processor moves to step S9 again, and when it is determined that the time T3 has elapsed, the processor increases the attenuation rate of the digital attenuator 1 by Δ3 from K. (step 511), and it is determined whether the time T4 has elapsed (step 512).

In step S12, when it is determined that the time T4 has not elapsed, the processor moves to step S11 again, and when it is determined that the time T4 has elapsed, the processor moves to step 813 and determines whether or not to fade out. In the case of fade-out, a -next stop command is sent to a performance section control circuit (not shown) of a disc player, etc. (
Step 514). Next, the processor stops sending out the high frequency removal command signal, returns the cutoff frequency of the data conversion means 10 from fcl to fco, and returns the attenuation rate of the digital attenuator 1 to its original value (step 515).
), the execution of the routine that was being executed immediately before proceeding to step S1 is resumed.

In step S4 in the above operation, the cutoff frequency of the data conversion means 10 is lowered from fcO to fcI. Thereafter, in steps 85 to S12, the attenuation rate of the digital attenuator 1 is changed stepwise to perform a fade-out operation.

Therefore, even if the attenuation rate of the digital attenuator 1 changes stepwise during the fade-out operation and noise occurs in the high frequency range above the frequency fcI within the audible band, the data conversion means 10 will remove the noise. Become.

Furthermore, since the cutoff frequency of the data conversion means 10 returns from fcI to fco in step S17, the sound quality does not deteriorate during operations other than the fade-out operation.

The fade-out operation has been described above, but if step s1 in the flowchart of FIG. 2 is a fade-in command, step S7. A fade-in operation is performed by initializing in step S3 such that the attenuation rate is changed to a small value in S9 and S11, and in this case, the same effect as in the fade-out operation works. Further, in the case of a fade-in operation, a reproduction command is sent so that the disc player or the like goes into the reproduction state as soon as the fade-in level setting is completed (step 516).

In the above embodiment, the attenuation rate is set to Δ1. Δ2. Although the attenuation rate is changed in three steps of Δ3, the number of times the attenuation rate changes is not limited to three times, and may be any number of times.

Further, in the above embodiment, the digital filter 3
A high-frequency component removal circuit 10 is provided at the next stage, but if the circuit configuration of the digital filter 3 is configured such that the cutoff frequency is lowered in accordance with the high-frequency removal command signal, the changeover switch 11 and the digital - There is no need to provide the filter 12.

Effects of the Invention As detailed above, in the signal processing circuit for the digital fist audio signal according to the present invention, each sample value of the digital audio signal is gradually changed by a predetermined value over a predetermined time in response to a command, and sample value changing means for generating a high frequency removal command signal; and output data of the sample value changing means only when the high frequency removal command signal is present, so as to correspond to a component below a predetermined frequency of an analog audio signal represented by the output data. digital·
Since it is equipped with a data conversion means to convert it into data,
The cutoff frequency is lowered only during fade-in and fade-out operations, making it possible to remove noise that occurs in the high range of the audible frequency band, thereby preventing noise during fade-in and fade-out operations at low cost while preventing deterioration of sound quality. It is possible to prevent the occurrence of

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a flow chart showing the operation of a processor in the device shown in FIG. 1, and FIG. 3 is a block diagram showing a conventional circuit. Explanation of the symbols of the main parts 1...Digital competition a sotenator 2...
...Microcombinator 3.12...Digital filter 11...
...Selector switch *yra

Claims (1)

[Claims] A signal processing circuit that performs signal processing of a digital audio signal in accordance with digital data representing sample values obtained by sampling an analog audio signal at predetermined time intervals, the circuit processing the digital audio signal in response to a command.
sample value changing means for gradually changing each sample value of the audio signal by a predetermined value over a predetermined time and generating a high frequency removal command signal; and the sample value changing means only when the high frequency removal command signal is present. 1. A signal processing circuit for a digital audio signal, comprising: data conversion means for converting output data of the output data into digital data corresponding to a component of a predetermined frequency or lower of an analog audio signal represented by the output data.