JPH0224269Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to an oscillation circuit, and particularly relates to stopping the oscillation operation of an oscillation circuit.

Oscillation circuits are used in a variety of devices, one example of which is a stereo demodulator that uses PLL technology.

FIG. 1 is a block diagram of a stereo demodulator using PLL technology. The 19 KHz pilot signal in the stereo composite signal via the amplifier 14 is applied to the phase detector 1. The output is supplied to a voltage controlled oscillator 4 through a low pass filter 2 and a DC amplifier 3 to first obtain a 76KHz signal. This signal is the 1/2 frequency divider circuit 5 in the first stage.
The signal is frequency-divided to obtain a 38KHz subcarrier, and the second stage 1/2 frequency divider circuit 6 obtains a 19KHz signal, which is returned to the phase detector 1. This phase detector 1 performs phase detection on the 19 KHz signal from the 1/2 frequency divider 6 and the pilot signal of the input signal. Therefore,
If the input signal includes a pilot signal of 19 KHz, a DC voltage component is generated in the low-pass filter 2 as the output of the phase detector 1. This DC voltage component is amplified by a DC amplifier 3 and then a voltage controlled oscillator 4
used as a control signal. As a result, the oscillation output of the voltage controlled oscillator 4 is phase-locked to the pilot signal of the input signal, and the 38K output of the first stage 1/2 frequency divider 5
The Hz output signal can accurately maintain the correct phase for demodulating stereo signals.

In the circuit related to stereo demodulation, a composite signal and a signal obtained by further dividing the output of the 1/2 frequency divider 5 by the 1/2 frequency divider 13 to 19KHz are applied to the phase detector 7, and The signal is supplied to a Schmitt trigger circuit 9 via a low-pass filter 8. Stereo switches 10 and 11 are operated by this circuit 9, and pilot lamp 1 is switched on when receiving a stereo signal.
At the same time when 2 is turned on, the output of 1/2 frequency divider 5 is 38K.
The Hz signal is applied to the demodulator 5. When phase lock is applied, that is, when receiving a stereo signal that includes a 19KHz pilot signal in the input signal, the input pilot signal and the 19K regenerated by the 1/2 frequency divider 6 are mixed.
It is out of phase with the Hz signal by 90°. Therefore, a 1/2 frequency divider circuit 13 that can obtain 19KHz in phase with the pilot signal is connected to the 1/2 frequency divider circuit 5 in the first stage, and this 19KHz output is sent to the stereo switch 1.
In addition to the phase detector 7 for operating the pilot signals 0 and 11, when the input signal is phase-detected, a DC voltage component proportional to the intensity of the input pilot signal is taken out by the low-pass filter 8. This DC voltage component drives the next-stage shot trigger circuit 9, operates the stereo switch 10, and turns on the stereo switch 11 to turn on the stereo display lamp 1.
Turn on 2.

FIG. 2 shows the circuit configuration of the voltage controlled oscillator 4 in FIG. 1. The voltage controlled oscillator 4 is composed of an oscillation circuit 16 and a timing circuit 17 that determines the oscillation frequency of the oscillation circuit 16.
An integrated circuit (hereinafter abbreviated as IC) is usually used as a PLL stereo demodulation circuit.
The oscillation circuit 16 in FIG.
A timing circuit 17 is connected externally, and the DC amplifier 3 for controlling oscillation is coupled inside the IC. Also, the 76KHz generated in the oscillation circuit 16
The oscillation output is sent to the first stage 1/2 frequency divider circuit 5 inside the IC.

It has a voltage controlled oscillator as shown in Figure 2.
The PLL stereo demodulation circuit operates constantly by an oscillation circuit 16 and a timing circuit 17 to generate a 76KHz oscillation signal, and also has 1/2 frequency divider circuits 5, 6, 13.
It generates output voltages of 38KHz and 19KHz. Therefore, when receiving FM monaural, AM, etc. other than when receiving FM stereo broadcasts,
There has been a problem in that the oscillation output voltage from the voltage controlled oscillator 4 affects other circuits, causing beats and S/N deterioration.

FIG. 3 shows an example of a conventional FM stereo receiver as a preventive measure against this problem, and the same parts as in FIG. 2 are given the same reference numerals. In FIG. 3, a changeover switch 19 is provided in series with the timing circuit 17 connected to the terminal 18, and by manually switching the selector switch on the stereo receiver body, the timing circuit 17 is disconnected except for FM stereo reception. The oscillation operation of 4 is stopped.

This method appears to be a simple and effective method at first glance, as it only involves switching the external circuit connections of the conventional PLL stereo demodulation IC shown in FIG. Since it is provided on the panel surface of the receiver, it is necessary to connect the PLL stereo demodulation IC and the changeover switch 19 with relatively long wiring. Therefore, floating capacitance and induction due to the wiring affect the timing circuit 17, causing problems such as oscillation frequency drift of the voltage controlled oscillator 4 appearing as an unstable factor and oscillation output voltage leaking to other circuits. It was hot.

An object of the present invention is to provide an oscillation circuit that has an additional oscillation function without causing problems such as oscillation frequency drift.

Another object of the present invention is to provide an oscillation circuit that suppresses level fluctuations that occur when starting or stopping oscillation operation.

The oscillation circuit according to the present invention includes first and second transistors connected in a differential manner, a timing circuit connected to the base of the first transistor, and a first threshold voltage applied to the base of the second transistor. a first threshold circuit that supplies first and second threshold circuits;
a first current source circuit that has a current path and generates a current in the first current path that flows when the second transistor is conductive, and generates a current corresponding to this current in the second current path; a current supply circuit that receives current from a second current path of the current source circuit and supplies current to the timing circuit; and a current supply circuit that receives current from the second current path of the first current source circuit and supplies current to the timing circuit; a second threshold circuit that supplies a second threshold voltage to the base of the circuit; and generates a current to be supplied to the second transistor in place of the first current source circuit in response to a signal for stopping the oscillation operation. and a second current source circuit.

That is, the oscillation circuit according to the present invention does not stop the oscillation operation by providing a switch in series or parallel to the timing circuit, but by
The first current source circuit is inactivated by providing a current source circuit and supplying the current that flows when the second transistor conducts from the second current source circuit instead of the first current source circuit. As a result, the current supply circuit and the second threshold circuit are inactivated.

Therefore, the instability of the oscillation frequency that occurs in the prior art in which a switch circuit is provided in series or in parallel with a timing circuit is prevented.

Moreover, even when the oscillation operation is stopped, current is supplied to the differentially connected transistors by the second current source circuit. Potential fluctuations can also be suppressed.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 4 shows an embodiment of the present invention,
This is an application of the present invention to a voltage controlled oscillator in an FM stereo demodulator. Therefore, the first
Functional parts that are the same as those in FIGS. 3 to 3 are designated by the same numbers, and their explanations will be omitted.

Transistors 26 and 27 are connected differentially, and the base of transistor 26 is connected to timing circuit 17 via terminal 18. A first threshold voltage is supplied to the base of the transistor 27 by resistors 35 and 36. Transistor 31 constitutes a constant current source. timing circuit 1
The capacitor inside 7 is not charged and the terminal 18
When the potential of the transistor 27 is lower than the first threshold voltage, the transistor 27 is conductive. A first current mirror circuit 22 and a second current mirror circuit 23 are connected to the collector of the transistor 27, and the second current mirror circuit 23 has a bias voltage 3 connected to the terminal 21.
It remains off unless 4 is supplied. Then,
The current flowing through the transistor 27 is generated from the first current path of the first current mirror circuit 22, and a current proportional to the current is generated in the second current path.
Transistor 32 constitutes a constant current source. When a current is generated from the second current path of the first current mirror circuit 22, the transistor 28 becomes conductive. As a result, a charging current is supplied to the capacitor in the timing circuit 17 via the resistor 29. Similarly,
A second threshold voltage is supplied to the base of the transistor 27 via a resistor 30.

When the capacitor in timing circuit 17 is charged above a second threshold voltage, transistor 26 becomes conductive and transistor 27 is turned off. Therefore, first current mirror circuit 22 and transistor 28 are cut off, and transistor 27
A first threshold voltage is supplied to the base of the . The charge on the capacitor in the timing circuit 17 is discharged through a fixed resistor and a variable resistor connected in parallel, and when the voltage becomes lower than a first threshold voltage, the transistor 27 becomes conductive. Thereafter, the above-described operation is repeated to oscillate.

In order to stop the oscillation operation, when the switch 33 is closed and the bias voltage 34 is supplied through the terminal 21, the transistor 24 in the switch circuit 20
becomes conductive, and current flows through the resistor 25. This current is supplied via the first current path of the second current mirror circuit 23. In other words, the second current mirror circuit 2
The second current path of No. 3 is in a state where it can generate current. Therefore, when the transistor 27 becomes conductive, the current flowing through the transistor 27 is supplied from the second current mirror circuit 23, and no current flows through the first current path of the first current mirror circuit 22. That is, even if transistor 27 becomes conductive, first current mirror circuit 22 and transistor 28 remain inactive and do not oscillate.

As described above, when no bias is applied to the terminal 21 and the transistor 24 is cut off, the second current mirror circuit 23 is also cut off, and there is no influence on the first current mirror circuit 22. The oscillation circuit 16 operates normally. terminal 2
When a bias voltage is supplied to transistor 1 and current flows through transistor 24, second current mirror circuit 23 becomes conductive and operates as a current supply source. When the current that flows when the first current mirror circuit 22 is conductive is supplied by the second current mirror circuit 23, the first current mirror circuit 22 is forced into a cut-off state, and the switching transmission function is cut off. Therefore, oscillation circuit 1
The oscillation of 6 stops.

As described above, in the oscillation circuit according to the present invention, since a changeover switch or the like is not added to the timing circuit, there is no element of instability in the oscillation frequency, and the switching means for stopping oscillation is simply a DC voltage that drives the switch circuit inside the IC. All you need to do is switch.

Moreover, even when the oscillation operation is stopped, current is supplied to the transistor 27 by the second current mirror circuit 23, so that the transistor 31, which serves as a constant current source,
is also in a conducting state. In other words, changes in the current flowing through the transistor 31 are suppressed, and potential fluctuations do not occur.

Although the invention has been described in accordance with one embodiment, in other embodiments the bias voltage applied to terminal 21 may be replaced by the output of Schmitt trigger circuit 9 of FIG. 1 if manual switching is not required. In this case, everything can be formed inside the IC.

[Brief explanation of the drawing]

Figure 1 is a system block diagram of a stereo demodulator using a PLL circuit, Figure 2 is a circuit diagram of a voltage controlled oscillator, and Figure 3 is a circuit diagram showing a conventional example of a voltage controlled oscillator with an oscillation stop function. FIG. 4 is a circuit connection diagram showing an embodiment of the present invention. 4... Voltage controlled oscillator, 16... Oscillation circuit, 1
7...Timing circuit, 18, 21...Terminal, 1
9... Selector switch, 20... Oscillation stop switch circuit, 22... First current mirror circuit, 23...
Second current mirror circuit, 24...transistor,
25...Resistance.

Claims (1)

[Scope of utility model registration request] first and second transistors connected in a differential manner; a timing circuit connected to the base of the first transistor; and a first transistor providing a first threshold voltage to the base of the second transistor. a threshold circuit, and has a first and second current path, and controls the current flowing when the second transistor is conductive.
a first current source circuit that generates a current in the second current path and generates a current corresponding to the current in the second current path; and a first current source circuit that receives a current from the second current path of the first current source circuit. a current supply circuit that supplies current to the timing circuit; and a current supply circuit that receives current from the second current path of the first current source circuit and supplies a second threshold voltage to the base of the second transistor. a second threshold circuit; and a second current source circuit that generates a current to be supplied to the second transistor in place of the first current source circuit in response to a signal for stopping oscillation operation. An oscillation circuit characterized by: