JPH02241045A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPH02241045A JPH02241045A JP1063106A JP6310689A JPH02241045A JP H02241045 A JPH02241045 A JP H02241045A JP 1063106 A JP1063106 A JP 1063106A JP 6310689 A JP6310689 A JP 6310689A JP H02241045 A JPH02241045 A JP H02241045A
- Authority
- JP
- Japan
- Prior art keywords
- conductive pin
- semiconductor element
- printed circuit
- circuit board
- cylindrical conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 53
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000011347 resin Substances 0.000 claims abstract description 15
- 229920005989 resin Polymers 0.000 claims abstract description 15
- 239000002904 solvent Substances 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims description 6
- 230000035882 stress Effects 0.000 abstract description 16
- 230000008646 thermal stress Effects 0.000 abstract description 8
- 229910052751 metal Inorganic materials 0.000 description 10
- 239000002184 metal Substances 0.000 description 10
- 229910000679 solder Inorganic materials 0.000 description 5
- 238000005452 bending Methods 0.000 description 4
- 238000007906 compression Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 235000004976 Solanum vernei Nutrition 0.000 description 1
- 241000352057 Solanum vernei Species 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000000116 mitigating effect Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/811—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector the bump connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/81101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector the bump connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a bump connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/328—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野]
本発明は、プリント基板上に半導体素子をギヤングボン
ディングにより実装した半導体装置およびその製造方法
に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device in which a semiconductor element is mounted on a printed circuit board by Guyang bonding, and a method for manufacturing the same.
[従来の技術]
従来、プリント基板上に半導体素子をギヤングボンディ
ングにより実装(熱圧着法と、加圧圧着法とがある)し
たこの種の半導体装置は、第2図に示すように、プリン
ト基板1の配線パターン1aと半導体素子2とをバンプ
金属3を介して機械的および電気的に接続して平面実装
するようになっていた。[Prior Art] Conventionally, this type of semiconductor device, in which semiconductor elements are mounted on a printed circuit board by gigantic bonding (there are thermocompression bonding methods and pressure compression bonding methods), is The wiring pattern 1a of the substrate 1 and the semiconductor element 2 are mechanically and electrically connected via the bump metal 3 to perform planar mounting.
しかしながら、上述の従来例にあっては、機械的ストレ
ス、熱的ストレスが加わった場合、バンプ金属3による
ボンディング部に応力が集中してクラックが発生して断
線するという問題があった。However, in the above-mentioned conventional example, when mechanical stress or thermal stress is applied, there is a problem in that the stress concentrates on the bonding portion of the bump metal 3, causing cracks and disconnection.
そこで、このような問題点を解消するために、第3図に
示すように、バンプ金属3によるボンディング部に、導
電ゴム4を介装して応力集中を緩和するようにしたもの
があった。In order to solve this problem, as shown in FIG. 3, there has been a device in which a conductive rubber 4 is interposed in the bonding portion of the bump metal 3 to alleviate stress concentration.
[発明が解決しようとする課題]
しかしながら、導電ゴムを介装した第3図従来例にあっ
ても、導電性ゴム4による応力集中の緩和効果は不十分
で、大きな機械的ストレス、熱ストレスが加わった場合
には、ボンディング部にクラックが発生する恐れがあり
信頼性が損なわれるという問題があった。[Problems to be Solved by the Invention] However, even in the conventional example shown in FIG. 3 in which conductive rubber is interposed, the effect of mitigating stress concentration by the conductive rubber 4 is insufficient, and large mechanical stress and thermal stress occur. If this happens, there is a problem that cracks may occur in the bonding portion, resulting in a loss of reliability.
本発明は上記の点に鑑みて為されたものであり、その第
1の目的とするところは、大きな機械的ストレスおよび
熱ストレスが加わった場合にあってもボンディング部に
クラックが発生することがなく、信頼性の高い半導体装
置を提供することにあり、第2の目的とするところは、
上記半導体装置を簡単に製造することができる製造方法
を提供することにある。The present invention has been made in view of the above points, and its first objective is to prevent cracks from occurring in the bonding part even when large mechanical stress and thermal stress are applied. Our second objective is to provide a highly reliable semiconductor device.
It is an object of the present invention to provide a manufacturing method that can easily manufacture the above semiconductor device.
[課題を解決するための手段]
本発明の半導体装置は、半導体素子をプリント基板上に
ギヤングボンディングにより実装した半導体装置におい
て、プリント基板の配線パターンと半導体素子の端子パ
ッドとの間を接続する接続手段として、両端にバンプ部
を有し可撓性を具備した円柱状導電ピンを用いたもので
ある。[Means for Solving the Problems] A semiconductor device of the present invention is a semiconductor device in which a semiconductor element is mounted on a printed circuit board by gigantic bonding, in which a wiring pattern of the printed circuit board and a terminal pad of the semiconductor element are connected. As the connection means, a flexible cylindrical conductive pin having bumps at both ends is used.
また、請求項2の半導体装置の製造方法は、両端にバン
プ部を有し可撓性を具備した円柱状導電ピンが両端を上
下面に露出させて樹脂板の所定位置に埋め込んで接続ブ
ロックを形成し、上記接続ブロックをプリント基板と半
導体素子との間に介装して円柱状導電ピンによりプリン
ト基板の配線パターンと半導体素子の端子パッドとをギ
ヤングボンディングした後、円柱状導電ピンを腐食し難
い溶剤にて樹脂板を溶解除去するようにしたものである
。Further, in the method of manufacturing a semiconductor device according to claim 2, a flexible cylindrical conductive pin having bump portions at both ends is embedded in a predetermined position of a resin plate with both ends exposed on the upper and lower surfaces to form a connection block. After forming the connection block and interposing the connection block between the printed circuit board and the semiconductor element and performing gang bonding between the wiring pattern of the printed circuit board and the terminal pad of the semiconductor element using the cylindrical conductive pin, the cylindrical conductive pin is corroded. The resin plate is dissolved and removed using a difficult-to-clean solvent.
[作 用〕
本発明は上述のように構成されており、請求項1の半導
体装置にあっては、プリント基板の配線パターンと半導
体素子の端子パッドとの間を接続する接続手段として、
両端にバンプ部を有し可撓性を具備した円柱状導電ピン
を用いたので、曲げ方向に自由度を有する円柱状導電ピ
ンによって大きな機械的ストレスや熱ストレスが加わっ
た場合におけるボンディング部への応力集中を有効に緩
和でき、ボンディング部にクラックが発生しないように
して高い信頼性が得られるようになっている。[Function] The present invention is configured as described above, and in the semiconductor device according to claim 1, as a connection means for connecting between the wiring pattern of the printed circuit board and the terminal pad of the semiconductor element,
Since we used a flexible cylindrical conductive pin with bumps on both ends, it is possible to prevent the bonding part from being subjected to large mechanical stress or thermal stress due to the cylindrical conductive pin, which has flexibility in the bending direction. Stress concentration can be effectively alleviated, and cracks do not occur in the bonding area, resulting in high reliability.
また、請求項2の半導体装置の製造方法は、両端にバン
プ部を有し可撓性を具備した円柱状導電ピンが両端を上
下面に露出させて樹脂板の所定位置に埋め込んで接続ブ
ロックを形成し、上記接続ブロックをプリント基板と半
導体素子との間に介装して円柱状導電ピンによりプリン
ト基板の配線パターンと半導体素子の端子パッドとをギ
ヤングボンディングした後、円柱状導電ピンを腐食し難
い溶剤にて樹脂板を溶解除去するようにしたものであり
、多数の導電ピンを所定位置に配置して半導体素子とプ
リント基板の配線パターンに接続するギヤングボンディ
ングを容易に行うことができ、製造工程を簡略化するこ
とができるようになっている。Further, in the method of manufacturing a semiconductor device according to claim 2, a flexible cylindrical conductive pin having bump portions at both ends is embedded in a predetermined position of a resin plate with both ends exposed on the upper and lower surfaces to form a connection block. After forming the connection block and interposing the connection block between the printed circuit board and the semiconductor element and performing gang bonding between the wiring pattern of the printed circuit board and the terminal pad of the semiconductor element using the cylindrical conductive pin, the cylindrical conductive pin is corroded. The resin plate is dissolved and removed using a difficult-to-clean solvent, and it is easy to perform gigantic bonding, which involves arranging a large number of conductive pins in predetermined positions and connecting the semiconductor element to the wiring pattern of the printed circuit board. , the manufacturing process can be simplified.
[実施例]
第1図(a)〜(d)は本発明一実施例の製造過程を示
すもので、まず、第1図(a)に示すように、両端にバ
ンプ部(バンプ金属あるいは半田を具備)5aを有し可
撓性を具備した円柱状導電ピン(Au、CuあるいはA
I製の円柱ピン)5が両端を上下面に露出させて樹脂板
6の所定位置く一定距離をおいてほぼ垂直に平行配置)
に埋め込んで接続ブロック7を形成する。なお、接続ブ
ロック7は、所定位置に円柱状導電ピン5を配置して周
りに樹脂を流し込んで硬化させることにより形成されて
いる。[Example] Figures 1 (a) to (d) show the manufacturing process of an example of the present invention. First, as shown in Figure 1 (a), bumps (bump metal or solder) are formed on both ends. ) 5a and is flexible cylindrical conductive pin (Au, Cu or A
Cylindrical pins (made of I) 5 are placed in parallel at a predetermined position on the resin plate 6 with both ends exposed on the upper and lower surfaces, approximately vertically spaced apart from each other at a certain distance).
to form the connection block 7. Note that the connection block 7 is formed by arranging the cylindrical conductive pins 5 at predetermined positions and pouring resin around them and hardening them.
次に、上述のようにして形成された接続ブロック7を、
第1図(b)に示すように、プリント基板1と半導体素
子2との間に介装して円柱状導電ピン5によりプリント
基板1の配線パターン1aと半導体紫芋2の端子パッド
とをギヤングボンディング(熱圧着、半田付け、超音波
ボンディング)する、ここに、バンプ部5aがバンプ金
属で形成されている場合には熱圧着または超音波ボンデ
ィングを行い、半田の場合には、低温加熱(200〜3
00℃)によって機械的、電気的接続を行うようになっ
ており、まず最初に、プリント基板1上に接続ブロック
7を位置合わせして載置し、基板側のボンディングを行
った後、接続ブロック7上に半導体素子2を位置合わせ
して載置して素子側のボンディングを行う。Next, the connection block 7 formed as described above is
As shown in FIG. 1(b), the wiring pattern 1a of the printed circuit board 1 and the terminal pad of the semiconductor purple potato 2 are connected by a cylindrical conductive pin 5 interposed between the printed circuit board 1 and the semiconductor element 2. Young bonding (thermo-compression bonding, soldering, ultrasonic bonding) is carried out. If the bump portion 5a is formed of bump metal, thermo-compression bonding or ultrasonic bonding is carried out, and in the case of solder, low-temperature heating ( 200-3
Mechanical and electrical connections are made at 00°C). First, the connection block 7 is aligned and placed on the printed circuit board 1, bonding is performed on the board side, and then the connection block 7 is placed on the printed circuit board 1. The semiconductor element 2 is aligned and placed on the semiconductor element 7, and bonding on the element side is performed.
なお、基板側と素子側とに共にバンブ金属が形成されて
いる場合には、1度の熱圧着工程でボンディングが行え
ることになる。また、バンブ金属あるいは半田が半導体
素子側に設けられて入る場合には、バンプ部5aにバン
ブ金属、半田を設けなくても良いことは言うまでもない
。Note that if bump metal is formed on both the substrate side and the element side, bonding can be performed in one thermocompression bonding process. Further, it goes without saying that if bump metal or solder is provided on the semiconductor element side, it is not necessary to provide bump metal or solder in the bump portion 5a.
次に、円柱状導電ピン5を腐食し難い硫酸などの溶剤(
金属を腐食し難い溶剤)にて樹脂板6を溶解除去するこ
とにより、第1Q?I(e)に示すように、可撓性を具
備した円柱状導電ピン5を用いてプリント基板1上に半
導体素子2をギヤングボンディングした半導体装置が得
られる。Next, the cylindrical conductive pin 5 is coated with a solvent such as sulfuric acid (
By dissolving and removing the resin plate 6 with a solvent that does not easily corrode metals, the first Q? As shown in I(e), a semiconductor device is obtained in which a semiconductor element 2 is gang-bonded onto a printed circuit board 1 using a flexible cylindrical conductive pin 5.
いま、半導体素子2の熱膨張率は、プリント基板1の熱
膨張率よりも大きいので、温度上昇時においては、第1
図(d)に示すように、プリント基板1から半導体素子
2に対して等友釣な応力が加わる。この等友釣な応力は
プリント基板1の中央部から等友釣に分散するが、円柱
状導電ピン5は曲げ方向に自由度があるので、円柱状導
電ピン5の弾性によって応力が有効に吸収され、大きな
機械的ストレスや熱ストレスが加わった場合にあっても
ボンディング部に加わる応力集中を緩和してクラックが
生じるのを防止することができ、高い信頼性が得られる
ことになる。Now, the thermal expansion coefficient of the semiconductor element 2 is larger than that of the printed circuit board 1, so when the temperature rises, the first
As shown in Figure (d), equal stress is applied from the printed circuit board 1 to the semiconductor element 2. This equal stress is distributed evenly from the center of the printed circuit board 1, but since the cylindrical conductive pin 5 has a degree of freedom in the bending direction, the stress is effectively absorbed by the elasticity of the cylindrical conductive pin 5. Even when large mechanical stress or thermal stress is applied, stress concentration applied to the bonding portion can be alleviated and cracks can be prevented, resulting in high reliability.
また、本発明の製造方法においては、円柱状導電ピン5
が両端を上下面に露出させて樹脂板6の所定位置に埋め
込まれた接続ブロック7を用い、この接続ブロック7を
プリント基板1と半導体素子2との間に介装して円柱状
導電ピン5によりプリント基板1の配線パターン1aと
半導体素子2の端子パッドとをギヤングボンディングし
、樹脂板6を溶剤にて溶解除去するものであり、多数の
導電ピン5を所定位置に配置して半導体素子2とプリン
ト基板1の配線パターン1aに接続するギヤングボンデ
ィングを容易に行うことができ、半導体装置の製造工程
を大幅に簡略化することができるようになっている。Further, in the manufacturing method of the present invention, the cylindrical conductive pin 5
A connecting block 7 is embedded in a predetermined position of the resin plate 6 with both ends exposed on the upper and lower surfaces, and this connecting block 7 is interposed between the printed circuit board 1 and the semiconductor element 2 to form a cylindrical conductive pin 5. The wiring pattern 1a of the printed circuit board 1 and the terminal pad of the semiconductor element 2 are bonded by giant bonding, and the resin plate 6 is dissolved and removed using a solvent. 2 and the wiring pattern 1a of the printed circuit board 1 can be easily performed, and the manufacturing process of the semiconductor device can be greatly simplified.
さらにまた、半導体素子2を接続ブロック7の導電ピン
5の一方のバンプ部5aに超音波ボンディングにて機械
的、電気的に接続し、導電ピン5の他方のバンプ部5a
とプリント基板1の配線パターン1aとを低温半田にて
接続するようにすれば、低温でボンディングが行えるこ
とになり、半導体素子2に大きな熱ストレスが加わらな
いようにすることができ、信頼性の高い半導体装置が得
られる。Furthermore, the semiconductor element 2 is mechanically and electrically connected to one bump portion 5a of the conductive pin 5 of the connection block 7 by ultrasonic bonding, and the semiconductor element 2 is mechanically and electrically connected to the other bump portion 5a of the conductive pin 5 by ultrasonic bonding.
By connecting the wiring pattern 1a of the printed circuit board 1 with low-temperature solder, bonding can be performed at low temperatures, preventing large thermal stress from being applied to the semiconductor element 2, and improving reliability. A high quality semiconductor device can be obtained.
[発明の効果]
本発明の半導体装置は上述のように構成されており、プ
リント基板の配線パターンと半導体素子の端子パッドと
の間を接続する接続手段として、両端にバンプ部を有し
可撓性を具備した円柱状導電ピンを用いたので、曲げ方
向に自由度を有する円柱状導電ピンによって大きな機械
的ストレスや熱ストレスが加わった場合におけるボンデ
ィング部への応力集中を有効に緩和でき、ボンディング
部にクラックが発生しないようにして高い信頼性が得ら
れるようになっている。[Effects of the Invention] The semiconductor device of the present invention is configured as described above, and has bumps at both ends and is flexible as a connecting means for connecting between the wiring pattern of the printed circuit board and the terminal pad of the semiconductor element. Since we used a cylindrical conductive pin with flexibility in the bending direction, it is possible to effectively alleviate stress concentration on the bonding part when large mechanical stress or thermal stress is applied to the cylindrical conductive pin, which has a degree of freedom in the bending direction. High reliability is achieved by preventing cracks from occurring in the parts.
また、本発明の製造方法は、両端にバンプ部を有し可撓
性を具備した円柱状導電ピンが両端を上下面に露出させ
て樹脂板の所定位置に埋め込んで接続ブロックを形成し
、上記接続ブロックをプリント基板と半導体素子との間
に介装して円柱状導電ピンによ゛リプリント基板の配線
パターンと半導体素子の端子パッドとをギヤングボンデ
ィングした後、円柱状導電ピンを腐食し難い溶剤にて樹
脂板を溶解除去するようにしたものであり、多数の導電
ピンを所定位置に配置して半導体素子とプリント基板の
配線パターンに接続するギヤングボンディングを容易に
行うことができ、製造工程を簡略化することができると
いう効果がある。Further, in the manufacturing method of the present invention, a flexible cylindrical conductive pin having bump portions at both ends is embedded in a predetermined position of a resin plate with both ends exposed on the upper and lower surfaces to form a connection block. After the connection block is interposed between the printed circuit board and the semiconductor element and the cylindrical conductive pin is used to perform gang bonding between the wiring pattern of the printed circuit board and the terminal pad of the semiconductor element, the cylindrical conductive pin is not easily corroded. The resin plate is dissolved and removed using a solvent, and it is easy to perform gigantic bonding, in which a large number of conductive pins are placed in predetermined positions and connected to the wiring pattern of the semiconductor element and the printed circuit board. This has the effect of simplifying the process.
第1図(a)〜(d)は本発明一実施例の製造過程を示
す断面図、第2図は従来例の断面図、第3図は他の従来
例の断面図である。
1はプリント基板、1aは配線パターン、2は半導体素
子、3はバンブ金属、5は導電ピン、5aはバンプ部、
6は樹脂板、7は接続ブロックである。
代理人 弁理士 石 1)長 七
第2図
第3
図FIGS. 1(a) to (d) are sectional views showing the manufacturing process of an embodiment of the present invention, FIG. 2 is a sectional view of a conventional example, and FIG. 3 is a sectional view of another conventional example. 1 is a printed circuit board, 1a is a wiring pattern, 2 is a semiconductor element, 3 is a bump metal, 5 is a conductive pin, 5a is a bump part,
6 is a resin plate, and 7 is a connection block. Agent Patent Attorney Ishi 1) Chief 7 Figure 2 Figure 3
Claims (2)
ングにより実装した半導体装置において、プリント基板
の配線パターンと半導体素子の端子パッドとの間を接続
する接続手段として、両端にバンプ部を有し可撓性を具
備した円柱状導電ピンを用いたことを特徴とする半導体
装置。(1) In a semiconductor device in which a semiconductor element is mounted on a printed circuit board by gang bonding, a flexible structure having bumps on both ends is used as a connection means for connecting between the wiring pattern of the printed circuit board and the terminal pad of the semiconductor element. A semiconductor device characterized in that a cylindrical conductive pin is used.
電ピンが両端を上下面に露出させて樹脂板の所定位置に
埋め込んで接続ブロックを形成し、上記接続ブロックを
プリント基板と半導体素子との間に介装して円柱状導電
ピンによりプリント基板の配線パターンと半導体素子の
端子パッドとをギャングボンディングした後、円柱状導
電ピンを腐食し難い溶剤にて樹脂板を溶解除去するよう
にした半導体装置の製造方法。(2) A flexible cylindrical conductive pin with bumps on both ends is embedded in a predetermined position of a resin board with both ends exposed on the top and bottom surfaces to form a connection block, and the connection block is connected to a printed circuit board. After performing gang bonding between the wiring pattern of the printed circuit board and the terminal pad of the semiconductor element using a cylindrical conductive pin interposed between the cylindrical conductive pin and the semiconductor element, the resin plate is dissolved and removed using a solvent that does not easily corrode the cylindrical conductive pin. A method for manufacturing a semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1063106A JPH02241045A (en) | 1989-03-15 | 1989-03-15 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1063106A JPH02241045A (en) | 1989-03-15 | 1989-03-15 | Semiconductor device and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02241045A true JPH02241045A (en) | 1990-09-25 |
Family
ID=13219711
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1063106A Pending JPH02241045A (en) | 1989-03-15 | 1989-03-15 | Semiconductor device and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02241045A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0831873A (en) * | 1994-07-15 | 1996-02-02 | Furukawa Electric Co Ltd:The | Super microconnector and manufacture thereof |
US7436071B2 (en) | 1997-03-10 | 2008-10-14 | Seiko Epson Corporation | Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board |
JP2019161024A (en) * | 2018-03-14 | 2019-09-19 | 日本電気株式会社 | Bonding material, bonding structure, forming method, and manufacturing method |
-
1989
- 1989-03-15 JP JP1063106A patent/JPH02241045A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0831873A (en) * | 1994-07-15 | 1996-02-02 | Furukawa Electric Co Ltd:The | Super microconnector and manufacture thereof |
US7436071B2 (en) | 1997-03-10 | 2008-10-14 | Seiko Epson Corporation | Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board |
US7598619B2 (en) | 1997-03-10 | 2009-10-06 | Seiko Epson Corporation | Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board |
US7932612B2 (en) | 1997-03-10 | 2011-04-26 | Seiko Epson Corporation | Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board |
US8134237B2 (en) | 1997-03-10 | 2012-03-13 | Seiko Epson Corporation | Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board |
JP2019161024A (en) * | 2018-03-14 | 2019-09-19 | 日本電気株式会社 | Bonding material, bonding structure, forming method, and manufacturing method |
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