JPH02238692A - Mounting of package-type element - Google Patents

Abstract

PURPOSE:To reduce inductance of an I/O lead terminal and then obtain a required favorable characteristics even in the high-frequency range by providing a dielectric or dielectric-conductor system near the I/O lead terminal of a package-type element. CONSTITUTION:In a process for mounting and packaging a package-type element 4 incorporating a semiconductor element 4b which can operate at high speed on the surface of a specified wiring substrate or in a process for fitting a tool after the packaging, a dielectric 7 or a dielectric-conductor system is placed near an I/O lead terminal 4a. Thus, in the packaged and formed packaging circuit (device), capacitance between the I/O lead terminal 4a and a grounding conductor 6 becomes large, thus reducing inductance. Therefore, the characteristics impedance of the I/O lead terminal 4a agree with those of before and after it, thus increasing the frequency limit where the package-type element 4 is used.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Field of Application) The present invention relates to a method for mounting a packaged device containing an IC device, an LSI device, etc., and particularly to a packaged device that operates at high speed and high frequency. Regarding the implementation method.

(Prior art) To improve the functionality and performance of electronic devices, for example, silicon bipolar logic IC elements (ECL)
, the clock frequency is G for GaAs digital elements.
Semiconductor devices with frequencies on the order of Hz are being used. However, these semiconductor elements are usually put into practical use in a configuration in which they are mounted on a wiring board in accordance with the method used for mounting microwave de-highs. For example, it is constructed so that the cross-sectional structure is shown in FIG. That is, an insulating layer 1b with a predetermined region 1a hollowed out, a metal plate 2 bonded to one side of the insulating layer 1b, and the insulating layer 1b.
The insulator layer 1 of the wiring board 1 comprises a required conductor batten (microstrip line) 3 formed on the other surface of the wiring board 1.
The packaged GaA is placed in the cutout area 1a of b.
It has been put into practical use in a configuration in which it is equipped with 4 S digital elements, etc. In the above structure, the hollowed-out area 1a of the insulator layer 1b has a distance (gap) between the package type element 4 mounted and mounted here and the microstrip line 3 connected to the lead terminal 4a of the package type element 4. The microstrip line 3 is made as small as possible so that the signal traveling through the microstrip line 3 is transmitted into the package type element 4 through the smallest discontinuous portion.
The required functions are exhibited in the frequency range of 0 GHz to 40 GHz. In the case of the above configuration, the above characteristics are possible because the ground plane 2a of the conductor pattern (microstrip line formed on the insulator layer 1b surface) 3 on the wiring board 1 and the package type element 4 Reference ground 2b
This is because even the ultra-high frequency range can be considered the same.

In addition, depending on the application, as shown in the 1υi plane in FIG. A mounted/mounted configuration is also adopted.In this case, the mounted/mounted flat 1/package type element 4'
There is an advantage in that the microstrip line 3 is also arranged on the surface of the wiring board directly below, allowing for higher wiring density. Furthermore, as shown in cross section in FIG. 7, there is also a structure in which the packaged element 4 is mounted in a pin grid array structure on one side of the wiring board on which the microstrip line 3 is formed. Are known.

(Problems to be Solved by the Invention) However, in the case of the above configuration, high frequency characteristics and mounting flexibility are required. Cost, multi-terminal pin support. Since heat dissipation and the like are not compatible, this is not a practically satisfactory state. That is, in the case of the configuration shown in FIG.
In order to make the ground plane 2a of the packaged element 4 the same as the reference ground 2b of the packaged element 4, the microstrip line 3 formed on the surface of the insulator layer 11 is connected to the lead terminal 4a of the packaged element 4 with a characteristic impedance. In order to make the shortest connection without disturbance, it is necessary to cut out a predetermined region 1a of the insulating layer 1b with good dimensional accuracy, and mount and mount the packaged element 4 so as to be submerged in the cut out predetermined region 1a. Therefore, there are problems in that the configuration becomes complicated and the yield is poor. Moreover, in order to improve heat dissipation, a special metal core board (metal core wiring board) must be used, which increases costs.

Furthermore, in the case of the configuration shown in FIG. 6, there is an advantage that there are fewer restrictions on mounting and mounting the package type element 4 on the wiring board 1. There is a disadvantage that it cannot be used in the frequency band above. Furthermore, in the case of the configuration shown in FIG. 7, it is necessary to make the length of the lead terminal as short as possible in order to reduce the lead inductance. However, if the length of the lead terminal is made too short, the half lT13
Due to the bulge of a, etc., the difference in thermal expansion coefficient between the wiring shield plate 1 and the package type element 4 cannot be absorbed completely, and separation is likely to occur, resulting in a loss of mechanical reliability.

[Structure of the Invention] (Means for Solving the Problems) The present invention has been made in response to the above-mentioned circumstances, and can achieve the required high speed and high frequency with a relatively simple structure without requiring complicated work or complicated structure. The purpose is to provide an implementation structure that works with . In other words, a package type element containing a high-speed operating semiconductor element and having at least two signal input/output lead terminals is mounted and mounted on a predetermined surface of a wiring board, and the package type element corresponds to the lead terminals of the mounted package type element. By attaching a lid-like jig in which a dielectric or a dielectric conductor system is disposed in the area to the mounted package type element by pressure contact, or by installing a high-speed operating semiconductor element inside and connecting at least two signal inputs. When mounting a package type device having output lead terminals, the main idea is to place a dielectric or a dielectric-conductor system between the signal input/output lead terminals in advance, and this allows the necessary This is a mounting method that can produce circuits that operate at high speeds and high frequencies.

(Function) As described above, in the present invention, a 1/0 lead is achieved in the step of mounting and mounting a packaged element containing a high-speed operating semiconductor element on a predetermined wiring board surface, or in the step of attaching a jig after said mounting. A dielectric or a dielectric-conductor system is placed near the terminal. Therefore, in the mounted circuit (device) formed, the capacitance between the 1/0-1 terminal and the ground conductor increases, resulting in a decrease in inductance. In other words, in the vicinity of the 1/0 lead terminal, the capacitance of the I/O lead terminal decreases due to the dielectric constant of the disposed dielectric or the dielectric constant of the dielectric in the dielectric-conductor system and the reduction of the gap with the ground conductor. This can significantly increase the inductance of the I/O lead terminal. In this way, the characteristic impedance of the I/O lead terminal becomes equal to the characteristic impedances before and after it, making it possible to raise the operating frequency limit of the package type element.

(Example) Examples of the present invention will be described below. First, a required conductor pattern (microstrip line) is formed on the main surface of the insulator layer 1b.
A wiring board 1 having a wiring board 3 formed thereon is prepared. Next, the packaged device 4, which is formed by packaging the GaAs digital device 4b, for example, is cavity-downed.
It is mounted and mounted on the wiring board 1 with the active layer (b) facing the board side. In other words, the thermally conductive metal layer 4C
A GaAs digital element 4b is attached to a predetermined ceramic substrate 4d bonded to one side of the ceramic substrate 4d, and the element 4b is hermetically sealed between a ceramic cylindrical body (forming a side wall) 4e and a metal plate 4r. The bucket type element 4 is mounted and mounted on a wiring board 1 having a required conductor pattern (microstrip line) 3 formed on the main surface of an insulator layer 1b. Thereafter, a jig 5 which also serves as a heat sink for dissipating the heat generated by the element 4b through the thermally conductive metal layer 4c is pressed and attached to the thermally conductive metal layer 4c.
A circuit device is obtained in which a package type element having the configuration shown in cross section in FIG. 1 is mounted. In the pressure bonding mounting using the jig 5, a predetermined area of the jig 5, that is, the lead terminal 4a of the package type element 4 is connected to the conductor pattern 3 on the board surface.
A conductor 6 and a dielectric 7 are previously provided in a region corresponding to the lead terminal 4a electrically connected to the lead terminal 4a. In this mounting example, the wiring in the wiring 1 package inside from the I/O lead terminal 4a forms a microstrip or strip line with the thermally conductive metal layer 4c to achieve high frequency characteristics. Furthermore, when the ground conductor reaches the I/O lead terminal 4a, it becomes far away, and one or more I/O lead terminals 4
It is connected to the outside of the package as a. At the same time, a conductor (ground plane) 6 disposed on a holding jig (radiator 5 in this example) via a dielectric 7, for example, an elastomer, connects to the thermally conductive metal layer 4c of the package 4. 1
・It is electrically connected to. However, the conductor (
The ground plane) 6 is a dielectric layer 8 provided on the surface.
For example, a constant distance (gap) from the I/O lead terminal 4a is maintained by a polyimide resin layer or a rough-mouth ethylene resin layer.

Thus, 1/0 of the mounted package type element 4
The lead terminal 4a has a configuration as shown in FIG. 2, which shows a cross section taken along line A--A in FIG. 1, and the I/O lead terminal 4a becomes an ideal microstrip transmission line. That is, by bringing the conductor (ground plane) 6 close to the I/O lead terminal 4a at regular intervals, the lead inductance is suppressed and the characteristic impedance is made constant.

Next, another embodiment will be described. This example is an example in which a bin grid array is applied, and when mounting a packaged element 4, a 1/0 lead terminal 4a is formed with a required conductor pattern (microstrip line) 3 on the main surface of an insulating layer 1b. When press-welding and soldering to the wiring board made of
This is a mounting method in which the anisotropic conductor 9 is inserted in advance into the space between the 1/0 lead terminals 4a led out from the package type element 4. In this mounting method, the I/O lead terminals 4a of the packaged element 4 are
The structure is such that an anisotropic conductor 9 is attached in advance so as to suitably fill the spaces (spaces) between the 0 lead terminals 4a, and this is mounted and mounted on one surface of a predetermined wiring board. FIG. 3 is a cross-sectional view of a mounted circuit device in which the package type element 4 is mounted and mounted on the wiring board 1 in this manner. Note that this anisotropic conductor 9 has an insulator (dielectric) region 9a and a conductor region 9b coexisting in a directional manner. While connecting the bat and the ground bat of the wiring board 1, a pseudo coaxial line is formed by surrounding the signal line Cl/0 lead terminal 4a).

Furthermore, as another embodiment, prior to mounting and mounting the package type element 4 on the wiring board 1, between the I/O lead terminals 4a of the package type element 4, as shown in the above example (FIG. 3).
Similarly to the above case, the dielectric 7 may be inserted and arranged in advance and then mounted and mounted on one surface of the wiring board. FIG. 4 is a cross-sectional view of a part of the mounted circuit device constructed according to this mounting example. Even in this implementation 1 configuration example, I/O
The inductance of the lead terminal 4a is lowered, and the characteristic impedance can be easily controlled. In other words, 170]
1 By disposing and intervening the dielectric material 7 in the lead terminal 4a portion, the capacitance of this portion increases significantly compared to when only air is present, and the inductance decreases and the I/O lead terminal The characteristic impedance of 4a becomes equal to the characteristic impedances before and after it. As with the flat package type, the I/O lead terminals 4a arranged in a row around the package have enough ground pins, so as a result, a considerable proportion of the total number of lead terminals is used for grounding. This reduces the number of lead terminals that can be used for original signals. As a countermeasure against this, it is possible to arrange two or more rows of 1/0 lead terminals 4a around the package, but in this case, the inner I/O lead terminals 4a
Since it is difficult to confirm the position from the outside, the reliability of soldering etc. is likely to be impaired, but this embodiment can be said to be effective. In addition, in FIG. 4, the I/O lead terminal 4a
Of these, the outside acts as a signal line, and the inside acts as a ground.

[Effects of the Invention] As described above, according to the packaged element mounting method according to the present invention, the problem of lead inductance in circuit devices constructed by conventional packaged element mounting methods of this type can be solved by simple means. It can be improved by In other words, when mounting and mounting a package type element on a wiring board, means for arranging a dielectric material or a dielectric-conductor system in the space near the I/O lead terminal or between the 1/O lead terminal of the package type element. By adopting this, the inductance of the I/O lead terminal is reduced, and by reducing this inductance, disturbances in the characteristic impedance at the I/O lead terminal are also minimized, ensuring the desired good characteristics even in the high frequency range. A mounted circuit device with high performance can be easily obtained with high yield. Moreover, in the method of the present invention, the dielectric or the dielectric-conductor system is placed near the r/0ri-1 terminal by holding the dielectric or the packaged element in advance, and then attaching the dielectric or the dielectric-conductor system by pressure bonding with the jig or packaged element. Or mounting a package type element,
Since it can be achieved at the stage of implementation, it can be said that it brings many practical advantages without complicating the configuration process or increasing costs.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing an example of the configuration of a packaged element-mounted circuit device mounted by the method of the present invention, and FIG.
3 and 4 are sectional views taken along the line A-A in the figure; FIGS. 7 to 7 are cross-sectional views showing different configuration examples of conventional package type element-mounted circuit devices. 1・
......Wiring board 2, 4c...Metal plate 4...Package type element 4a...
...Signal input/output (I/O) lead terminal 4b...
... Semiconductor element 5 ... Jig 6.9b ... Conductor 7, 9a ... Dielectric Applicant Toshiba Corporation

Claims (2)

[Claims] (1) A process of mounting and mounting a packaged element containing a high-speed operating semiconductor element and having at least two signal input/output lead terminals on a predetermined surface of a wiring board, and the packaged element mounted on the wiring board. A packaged element comprising the step of press-fitting a lid-like jig in which a dielectric or a dielectric-conductor system is disposed in an area corresponding to the lead terminal of the packaged element to the mounted packaged element. How to implement. (2) A dielectric material or a dielectric material between the signal input/output lead terminals of a packaged element containing a high-speed operating semiconductor element and at least two signal input/output lead terminals.
The method comprises a step of arranging a conductor system, and a step of mounting and mounting a package type element in which a dielectric or a dielectric-conductor system is arranged between the signal input/output lead terminals on a predetermined wiring board surface. 1. A method for mounting a packaged element, characterized in that: