JP2571029B2 - Microwave integrated circuit - Google Patents
Microwave integrated circuitInfo
- Publication number
- JP2571029B2 JP2571029B2 JP6297270A JP29727094A JP2571029B2 JP 2571029 B2 JP2571029 B2 JP 2571029B2 JP 6297270 A JP6297270 A JP 6297270A JP 29727094 A JP29727094 A JP 29727094A JP 2571029 B2 JP2571029 B2 JP 2571029B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- microwave integrated
- multilayer substrate
- dielectric multilayer
- filled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Description
【０００１】[0001]
【産業上の利用分野】本発明はマルチチップモジュール
に利用する。本発明は、高周波集積回路に利用する。特
に、高周波集積回路の高密度集積化技術に関する。The present invention is applied to a multichip module. The present invention is applied to a high frequency integrated circuit. In particular, it relates to a high-density integration technology for a high-frequency integrated circuit.
【０００２】[0002]
【従来の技術】近年、セラミック多層基板を用い、複数
の半導体チップを１つの基板上に実装したマルチチップ
モジュールの開発がなされ、コンピュータその他に盛ん
に利用されるようになってきた。この技術は従来の各半
導体部品を個別にプリント基板に実装する方式より、配
線遅延を低減し、高周波特性の劣化を避けることがで
き、小型化することも可能となるため、最近は、「199
3,ISSCC p170-171"Multi Chip Modules for Analog and
Microwave:dc to 18GHZ"」にみられるように、マイク
ロ波集積回路として用いる実装方法としても開発が進め
られている。2. Description of the Related Art In recent years, a multi-chip module using a ceramic multilayer substrate and mounting a plurality of semiconductor chips on a single substrate has been developed, and has been widely used in computers and the like. This technology can reduce the wiring delay, avoid the deterioration of high frequency characteristics, and reduce the size compared to the conventional method of mounting each semiconductor component individually on a printed circuit board.
3, ISSCC p170-171 "Multi Chip Modules for Analog and
Microwave: dc to 18GHZ "” is being developed as a mounting method for microwave integrated circuits.
【０００３】以下、図３を参照して、従来の誘電体多層
基板を説明する。図３は従来例の誘電体多層基板を示す
斜視図および断面図である。誘電体シートに導電性ペー
ストで印刷し、半導体チップ搭載部となるキャビティ部
２および配線接続用のスルホール部１４を加工し、多数
重ねて図３（ａ）に示すような誘電体多層基板を形成す
る。この誘電体多層基板上のキャビティ部２に半導体チ
ップとしての高周波集積回路５を実装し、シールド性お
よび気密性をもたせるために金属性のキャップ１６をす
る。この金属性キャップ１６は通常、高周波集積回路５
の接地部とのインピーダンスができる限り下がるよう
に、電気的接続をし、シールド性を高め高周波特性の安
定化を図っている。この際に、インピーダンス低減のた
めキャビティ部２のグランド面８は単にキャビティ部２
の回りだけでなく、図３（ｂ）に示すように広いグラン
ド面８として形成し、多数のビアホール(Via Hole)によ
って接地させることが重要である。Hereinafter, a conventional dielectric multilayer substrate will be described with reference to FIG. FIG. 3 is a perspective view and a sectional view showing a conventional dielectric multilayer substrate. The dielectric sheet is printed with a conductive paste, the cavity 2 serving as a semiconductor chip mounting portion and the through-hole portion 14 for wiring connection are processed, and a large number of them are stacked to form a dielectric multilayer substrate as shown in FIG. I do. The high-frequency integrated circuit 5 as a semiconductor chip is mounted in the cavity 2 on the dielectric multilayer substrate, and a metallic cap 16 is provided to provide shielding and airtightness. This metallic cap 16 is usually used for the high frequency integrated circuit 5.
The electrical connection is made so that the impedance with respect to the grounding portion is reduced as much as possible to enhance the shielding property and stabilize the high frequency characteristics. At this time, the ground plane 8 of the cavity 2 is merely used to reduce impedance.
It is important to form not only the periphery but also a wide ground plane 8 as shown in FIG. 3 (b) and ground it with a large number of via holes.
【０００４】この従来例で、ビアホールとは、誘電体多
層基板の表面から裏面に貫通する孔に導電性金属ペース
トを充填した孔のことをいう。高周波集積回路５は、こ
のビアホールを経由して接地される。In this conventional example, a via hole is a hole formed by filling a conductive metal paste into a hole penetrating from the front surface to the back surface of a dielectric multilayer substrate. The high frequency integrated circuit 5 is grounded via this via hole.
【０００５】[0005]
【発明が解決しようとする課題】このような従来の誘電
体多層基板を用いたマイクロ波集積回路では、部品搭載
面であるキャビティ部の大きさが、その使用周波数の波
長に対し小さい領域では、特に問題は生じないが、キャ
ビティ部の大きさが空間波長程度に準ミリ波、ミリ波領
域では、導波管モードの伝搬を生じ、特に増幅器のよう
な入出力のレベル差が大きい回路では入出力間のアイソ
レーションが劣化するため不要な発振その他の現象を生
じるという問題が発生している。In such a microwave integrated circuit using a conventional dielectric multilayer substrate, in a region where the size of the cavity portion, which is the component mounting surface, is small with respect to the wavelength of the operating frequency. Although there is no particular problem, in the quasi-millimeter wave and millimeter wave regions where the size of the cavity is about the spatial wavelength, propagation of the waveguide mode occurs. There is a problem in that the isolation between outputs deteriorates, causing unnecessary oscillation and other phenomena.
【０００６】本発明は、このような背景に行われたもの
であり、キャビティ部のアイソレーションの低下を抑え
ることができるマイクロ波集積回路を提供することを目
的とする。本発明は、共振による発振または周波数特性
の劣化を防ぐことができるマイクロ波集積回路を提供す
ることを目的とする。本発明は、設計の制限を少なくす
ることができるマイクロ波集積回路を提供することを目
的とする。本発明は、高い周波数まで高密度に集積回路
化することができるマイクロ波集積回路を提供すること
を目的とする。本発明は、信号パターン間に高いアイソ
レーションを実現することができるマイクロ波集積回路
を提供することを目的とする。The present invention has been made in view of such a background, and an object of the present invention is to provide a microwave integrated circuit capable of suppressing a decrease in isolation of a cavity. An object of the present invention is to provide a microwave integrated circuit that can prevent oscillation or deterioration of frequency characteristics due to resonance. An object of the present invention is to provide a microwave integrated circuit that can reduce design restrictions. SUMMARY OF THE INVENTION An object of the present invention is to provide a microwave integrated circuit that can be integrated at a high frequency with a high density. An object of the present invention is to provide a microwave integrated circuit capable of realizing high isolation between signal patterns.
【０００７】[0007]
【課題を解決するための手段】本発明の誘電体多層基板
では、シールド性を保つために用いていたビアホールを
従来用いてきた導電性金属性ペーストの代わりに電波吸
収体または高抵抗性金属ペーストで充填し、キャビティ
部の不要モードを抑圧したい部分の回りに形成し配置す
ることを特徴とする。According to the dielectric multi-layer substrate of the present invention, a via hole used for maintaining the shielding property is replaced with a radio wave absorber or a high-resistance metal paste instead of the conductive metal paste conventionally used. , And formed and arranged around a portion of the cavity portion where an unnecessary mode is to be suppressed.
【０００８】すなわち、本発明は、誘電体多層基板を用
いたマイクロ波集積回路である。That is, the present invention is a microwave integrated circuit using a dielectric multilayer substrate.
【０００９】ここで、本発明の特徴とするところは、こ
の誘電体多層基板の表面から裏面に貫通する孔が設けら
れ、この孔は電波吸収体材料により内部が充填されると
ころにある。Here, a feature of the present invention is that a hole is provided penetrating from the front surface to the back surface of the dielectric multilayer substrate, and the hole is filled with a radio wave absorber material.
【００１０】前記孔は前記電波吸収体材料に代えて高抵
抗性金属材料により内部が充填される構成とすることも
できる。[0010] The hole may be filled with a high-resistance metal material instead of the radio wave absorber material.
【００１１】前記誘電体多層基板には、高周波集積回路
が埋込まれ、この高周波集積回路の周囲およびまたはそ
の埋込面に前記孔が配置されることが望ましい。It is preferable that a high-frequency integrated circuit is buried in the dielectric multilayer substrate, and the hole is arranged around the high-frequency integrated circuit and / or on a buried surface thereof.
【００１２】前記誘電体多層基板には、それぞれ異なる
信号パターンを有する複数の高周波集積回路が埋込ま
れ、この複数の高周波集積回路の境界に前記孔が配置さ
れる構成とすることもできる。A plurality of high-frequency integrated circuits having different signal patterns may be embedded in the dielectric multilayer substrate, and the holes may be arranged at boundaries between the plurality of high-frequency integrated circuits.
【００１３】前記孔と、導電性金属材料が充填された孔
とが交互に配置される構成とすることもできる。It is also possible that the holes and the holes filled with the conductive metal material are alternately arranged.
【００１４】前記電波吸収体材料は、フェライトである
ことが望ましい。Preferably, the radio wave absorber material is ferrite.
【００１５】前記高抵抗性金属材料は、パーマロイであ
ることが望ましい。Preferably, the high-resistance metal material is permalloy.
【００１６】[0016]
【作用】電波吸収体で充填したビアホールによって、キ
ャビティを取り囲む構造になるため、導波管モードで伝
搬する周波数の信号は吸収され、キャビティ部のアイソ
レーションの低下を抑えることができる。また、キャビ
ティ部の構造に起因する共振その他も防ぐことができ、
共振による発振または周波数特性の劣化その他も防ぐこ
とができる。Since the via hole filled with the radio wave absorber has a structure surrounding the cavity, the signal of the frequency propagating in the waveguide mode is absorbed, and a decrease in the isolation of the cavity can be suppressed. In addition, it is possible to prevent resonance and the like caused by the structure of the cavity,
Oscillation due to resonance, deterioration of frequency characteristics, and the like can be prevented.
【００１７】これによって、従来はミリ波のように高い
周波数では、誘電体多層基板を用いたマイクロ波集積回
路ではキャビティ部の形状を波長の半分以下の幅になる
よう考慮して設計する必要があったが、その制限をなく
すことが可能となり、より高い周波数まで高集積化され
たマイクロ波集積回路を実現することができる。Therefore, conventionally, at a high frequency such as a millimeter wave, in a microwave integrated circuit using a dielectric multilayer substrate, it is necessary to design the shape of the cavity so as to be less than half the wavelength. However, the limitation can be eliminated, and a microwave integrated circuit highly integrated to a higher frequency can be realized.
【００１８】また、高いアイソレーションを必要とする
二つの信号パターン間に電波吸収体または高抵抗性金属
材料を充填したビアホールを配置することにより、さら
に、高いアイソレーションを得ることができる。Further, by providing a via hole filled with a radio wave absorber or a highly resistive metal material between two signal patterns requiring high isolation, higher isolation can be obtained.
【００１９】[0019]
【実施例】本発明第一実施例を図１を参照して説明す
る。図１は本発明第一実施例の斜視図および断面図であ
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a perspective view and a sectional view of a first embodiment of the present invention.
【００２０】本発明は、図１（ａ）に示すように、誘電
体多層基板１を用いたマイクロ波集積回路である。The present invention is a microwave integrated circuit using a dielectric multilayer substrate 1 as shown in FIG.
【００２１】ここで、本発明の特徴とするところは、こ
の誘電体多層基板１の表面から裏面に貫通する孔として
のビアホール４が設けられ、このビアホール４は、図１
（ｂ）に示すように、電波吸収体材料により内部が充填
されるところにある。このビアホール４は前記電波吸収
体材料に代えて高抵抗性金属材料により内部が充填され
てもよい。Here, a feature of the present invention is that a via hole 4 is provided as a hole penetrating from the front surface to the back surface of the dielectric multilayer substrate 1, and the via hole 4 is formed as shown in FIG.
As shown in (b), the inside is filled with a radio wave absorber material. The via hole 4 may be filled with a high-resistance metal material instead of the radio wave absorber material.
【００２２】誘電体多層基板１には、高周波集積回路５
が埋込まれ、この高周波集積回路５の周囲およびまたは
その埋込面にビアホール４が配置されている。A high frequency integrated circuit 5 is provided on the dielectric multilayer substrate 1.
Are embedded, and via holes 4 are arranged around the high-frequency integrated circuit 5 and / or on the embedded surface thereof.
【００２３】本発明第一実施例では、前記電波吸収体材
料としてフェライトを用いた。また、高抵抗性金属材料
としてパーマロイを用いた。In the first embodiment of the present invention, ferrite is used as the radio wave absorber material. In addition, permalloy was used as a high-resistance metal material.
【００２４】半導体搭載面であるキャビティ部２の回り
にキャップ１６の取付面としてキャップシール用グラン
ド面３を配置する。このキャップシール用グランド面３
に電波吸収体を充填したビアホール４を形成する。従来
の構造では、金属性ペーストが充填されたビアホールの
間隔をＬとすると、λ＝２Ｌとなる波長λで、導波管モ
ードのカットオフ周波数が決り、これ以上の周波数では
キャビティ空間中を電波は伝搬しやすく半導体の入出力
間のアイソレーションが低下していた。本発明では、ビ
アホール４によって、キャビティ部２を電波吸収体で取
り囲む構造となるため、伝搬する周波数の電力は吸収さ
れ、アイソレーションの低下を抑えることができる。ま
た、この電波吸収体を充填したビアホール４によってキ
ャビティ部２の構造に起因する共振その他も防ぐことが
でき、共振による発振や、周波数特性の劣化も防ぐこと
ができる。A cap sealing ground surface 3 is arranged as a mounting surface for the cap 16 around the cavity 2 which is a semiconductor mounting surface. This cap seal ground surface 3
Then, a via hole 4 filled with a radio wave absorber is formed. In the conventional structure, when the interval between the via holes filled with the metallic paste is L, the cutoff frequency of the waveguide mode is determined at the wavelength λ where λ = 2L. Was easy to propagate and the isolation between the input and output of the semiconductor was reduced. In the present invention, since the via hole 4 has a structure in which the cavity 2 is surrounded by the radio wave absorber, the power of the propagating frequency is absorbed, and a decrease in isolation can be suppressed. In addition, the via holes 4 filled with the radio wave absorber can prevent resonance and the like due to the structure of the cavity portion 2 and also prevent oscillation due to resonance and deterioration of frequency characteristics.
【００２５】次に、本発明第二実施例を図２を参照して
説明する。図２は本発明第二実施例の斜視図である。送
信機と受信機とを共に一つの基板上に形成した装置のよ
うに、大電力信号と微小電力信号とを同時に扱う場合に
は、近接した二つの信号パターン間のレベル差が大き
く、かつアイソレーションが不十分であると送信出力が
受信出力に回り込みを起こし、特性が劣化することがあ
るが、従来のように単に導電性金属ペーストを充填した
ビアホールのみだけでなく扱う信号の波長λとするとλ
／４毎に導電性金属ペーストを充填したビアホール７と
電波吸収体または高抵抗性金属材料を充填したビアホー
ル４または１１を交互に配置することによって、より効
果的にパターン間のアイソレーションを高めることがで
きる。Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 2 is a perspective view of the second embodiment of the present invention. When a large power signal and a small power signal are handled simultaneously, as in a device in which a transmitter and a receiver are both formed on one substrate, the level difference between two adjacent signal patterns is large and the If the transmission is insufficient, the transmission output wraps around the reception output, and the characteristics may be degraded.However, not only the via hole filled with the conductive metal paste as in the conventional case but also the signal wavelength λ to be handled, λ
By alternately arranging via holes 7 filled with a conductive metal paste and via holes 4 or 11 filled with a radio wave absorber or a high-resistance metal material every / 4, the isolation between patterns can be more effectively increased. Can be.
【００２６】[0026]
【発明の効果】以上説明したように、本発明によれば、
キャビティ部のアイソレーションの低下を抑えることが
できるマイクロ波集積回路を実現することができる。本
発明によれば、共振による発振または周波数特性の劣化
を防ぐことができるマイクロ波集積回路を実現すること
ができる。本発明によれば、設計の制限を少なくするこ
とができるマイクロ波集積回路を実現することができ
る。本発明によれば、高い周波数まで高密度に集積回路
化することができるマイクロ波集積回路を実現すること
ができる。本発明によれば、信号パターン間に高いアイ
ソレーションを実現することができるマイクロ波集積回
路を実現することができる。As described above, according to the present invention,
A microwave integrated circuit capable of suppressing a decrease in isolation of the cavity can be realized. According to the present invention, it is possible to realize a microwave integrated circuit that can prevent oscillation or deterioration of frequency characteristics due to resonance. According to the present invention, it is possible to realize a microwave integrated circuit that can reduce design restrictions. According to the present invention, it is possible to realize a microwave integrated circuit that can be integrated into a high density circuit up to a high frequency. ADVANTAGE OF THE INVENTION According to this invention, the microwave integrated circuit which can implement | achieve high isolation between signal patterns can be implement | achieved.
【図１】本発明第一実施例の斜視図および断面図。FIG. 1 is a perspective view and a sectional view of a first embodiment of the present invention.
【図２】本発明第二実施例の斜視図。FIG. 2 is a perspective view of a second embodiment of the present invention.
【図３】従来例の斜視図および断面図。FIG. 3 is a perspective view and a cross-sectional view of a conventional example.
１ 誘電体多層基板 ２ キャビティ部 ３ キャップシール用グランド面 ４ ビアホール（電波吸収体充填） ５ 高周波集積回路 ６ 信号ライン ７ ビアホール（導電性金属ペースト充填） ８ グランド面 ９ 送信信号ライン １０ 受信用フィルタ（受信信号パターン） １１ ビアホール（高抵抗性金属材料充填） １４ スルホール部 １６ キャップ DESCRIPTION OF SYMBOLS 1 Dielectric multilayer board 2 Cavity part 3 Ground plane for cap seal 4 Via hole (filled with radio wave absorber) 5 High frequency integrated circuit 6 Signal line 7 Via hole (filled with conductive metal paste) 8 Ground plane 9 Transmission signal line 10 Reception filter ( Received signal pattern) 11 Via hole (filled with high-resistance metal material) 14 Through hole portion 16 Cap
Claims (7)
回路において、 この誘電体多層基板の表面から裏面に貫通する孔が設け
られ、 この孔は電波吸収体材料により内部が充填されたことを
特徴とするマイクロ波集積回路。In a microwave integrated circuit using a dielectric multilayer substrate, a hole penetrating from the front surface to the rear surface of the dielectric multilayer substrate is provided, and the hole is filled with a radio wave absorber material. Characteristic microwave integrated circuit.
抵抗性金属材料により内部が充填された請求項１記載の
マイクロ波集積回路。2. The microwave integrated circuit according to claim 1, wherein said hole is filled with a high-resistance metal material instead of said radio wave absorber material.
路が埋込まれ、 この高周波集積回路の周囲およびまたはその埋込面に前
記孔が配置された請求項１または２記載のマイクロ波集
積回路。3. The microwave integrated circuit according to claim 1, wherein a high-frequency integrated circuit is buried in said dielectric multilayer substrate, and said hole is arranged around said high-frequency integrated circuit and / or on a buried surface thereof. circuit.
る信号パターンを有する複数の高周波集積回路が埋込ま
れ、 この複数の高周波集積回路の境界に前記孔が配置された
請求項１または２記載のマイクロ波集積回路。4. The dielectric multilayer substrate according to claim 1, wherein a plurality of high-frequency integrated circuits having different signal patterns are embedded therein, and the holes are arranged at boundaries between the plurality of high-frequency integrated circuits. Microwave integrated circuit.
孔とが交互に配置された請求項４記載のマイクロ波集積
回路。5. The microwave integrated circuit according to claim 4, wherein the holes and the holes filled with a conductive metal material are alternately arranged.
る請求項１記載のマイクロ波集積回路。6. The microwave integrated circuit according to claim 1, wherein said radio wave absorber material is ferrite.
ある請求項２記載のマイクロ波集積回路。7. The microwave integrated circuit according to claim 2, wherein said high-resistance metal material is permalloy.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6297270A JP2571029B2 (en) | 1994-11-30 | 1994-11-30 | Microwave integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6297270A JP2571029B2 (en) | 1994-11-30 | 1994-11-30 | Microwave integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08162559A JPH08162559A (en) | 1996-06-21 |
| JP2571029B2 true JP2571029B2 (en) | 1997-01-16 |
Family
ID=17844353
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6297270A Expired - Fee Related JP2571029B2 (en) | 1994-11-30 | 1994-11-30 | Microwave integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2571029B2 (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3708133B2 (en) | 1997-01-29 | 2005-10-19 | 大日本印刷株式会社 | Multilayer wiring board manufacturing method, multilayer wiring board manufacturing apparatus, and multilayer wiring board |
| US6353189B1 (en) | 1997-04-16 | 2002-03-05 | Kabushiki Kaisha Toshiba | Wiring board, wiring board fabrication method, and semiconductor package |
| JP3129288B2 (en) | 1998-05-28 | 2001-01-29 | 日本電気株式会社 | Microwave integrated circuit multi-chip module, mounting structure of microwave integrated circuit multi-chip module |
| JP4322402B2 (en) | 2000-06-22 | 2009-09-02 | 大日本印刷株式会社 | Printed wiring board and manufacturing method thereof |
| JP2006019340A (en) * | 2004-06-30 | 2006-01-19 | Tdk Corp | Board with built-in semiconductor ic |
| EP3324430A1 (en) * | 2008-03-17 | 2018-05-23 | Mitsubishi Electric Corporation | Multilayer dielectric substrate and semiconductor package |
| JP6284774B2 (en) * | 2014-01-31 | 2018-02-28 | 太陽誘電株式会社 | module |
| JP6513134B2 (en) | 2017-05-26 | 2019-05-15 | レノボ・シンガポール・プライベート・リミテッド | Cable connection structure and cable connection method |
| US20210367351A1 (en) * | 2019-02-13 | 2021-11-25 | The University Of Tokyo | Circuit substrate, antenna element, built-in millimeter wave absorber for circuit substrate, and method for reducing noise in circuit substrate |
-
1994
- 1994-11-30 JP JP6297270A patent/JP2571029B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08162559A (en) | 1996-06-21 |
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| LAPS | Cancellation because of no payment of annual fees |