JPH02234134A - Active matrix substrate for liquid crystal display device - Google Patents
Active matrix substrate for liquid crystal display deviceInfo
- Publication number
- JPH02234134A JPH02234134A JP1055344A JP5534489A JPH02234134A JP H02234134 A JPH02234134 A JP H02234134A JP 1055344 A JP1055344 A JP 1055344A JP 5534489 A JP5534489 A JP 5534489A JP H02234134 A JPH02234134 A JP H02234134A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- film
- wiring
- substrate
- matrix
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 49
- 239000011159 matrix material Substances 0.000 title claims abstract description 41
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 30
- 239000010408 film Substances 0.000 claims abstract description 45
- 239000004065 semiconductor Substances 0.000 claims description 10
- 239000010409 thin film Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 abstract description 16
- 239000010410 layer Substances 0.000 abstract description 15
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 9
- 229910052782 aluminium Inorganic materials 0.000 abstract description 9
- 239000011521 glass Substances 0.000 abstract description 9
- 239000000463 material Substances 0.000 abstract description 6
- 239000012790 adhesive layer Substances 0.000 abstract description 5
- 230000007547 defect Effects 0.000 abstract description 4
- 238000000206 photolithography Methods 0.000 abstract description 3
- 238000004528 spin coating Methods 0.000 abstract 2
- 238000009413 insulation Methods 0.000 abstract 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 11
- 235000012239 silicon dioxide Nutrition 0.000 description 7
- 230000002093 peripheral effect Effects 0.000 description 5
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000005498 polishing Methods 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 239000010453 quartz Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 101100462138 Brassica napus OlnB1 gene Proteins 0.000 description 1
- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 230000036211 photosensitivity Effects 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229920003051 synthetic elastomer Polymers 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、薄膜半導体を用いたアクティブ素子を有する
液晶表示装置用アクティブマトリクス基板に関する．
〔従来の技術〕
近年、薄膜トランジスタ（ＴＦＴ）や薄膜ダイオード（
ＴＦＤ）等の薄膜半導体を用いたアクティブ素子を各画
素毎に設け、高画質化を狙ったアクティブマトリクス液
晶表示装置の開発が活発である．この様な液晶表示装置
は、液晶を２枚の基板ではさんだ構造で、一方は前記ア
クティブ素子をマトリクス状に形成したアクティブマト
リクス基板、他方は例えばガラス基板上全面に透明電極
を形成してなる対向基板から構成されている。液晶とし
ては通常コントラストの高くとれるＴＮ型が多く用いら
れるため、アクティブ素子形成用基板もガラス等の透明
基板を利用した透過型液晶表示装置が開発されている．
アクティブ素子のチャネル領域となる薄膜半導体材料と
しては、主にアモルファスシリコン（ａ−Ｓｉ）やポリ
シリコン（ｐｏｌｙ−Ｓｉ）が使用されている，ａ−Ｓ
ｉは、低温で膜形成が可能な事から安価なガラス基板を
使用でき、最近の多くのポケット型液晶テレビ等に応用
されている．ｐｏｌｙ−Ｓｉは、ａ＝ｓｉより移動度が
大きく、また単結晶シリコン、ａ−Ｓｉに比べ極端に光
感度が鈍く、つま１り光に対し非常に安定な、高性能ア
クティブ素子を実現できる．このため次期高精細液晶表
示装置等への適用が期待されているが、まだ安価なガラ
ス基板が使える程の低温で、簡便に大面積形成が可能な
技術が熟成していない゛のが現状である。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an active matrix substrate for a liquid crystal display device having an active element using a thin film semiconductor. [Prior art] In recent years, thin film transistors (TFTs) and thin film diodes (
There is active development of active matrix liquid crystal display devices that aim to improve image quality by providing each pixel with an active element using a thin film semiconductor such as TFD. Such a liquid crystal display device has a structure in which a liquid crystal is sandwiched between two substrates, one of which is an active matrix substrate in which the active elements are formed in a matrix, and the other is an opposing substrate made of, for example, a glass substrate with transparent electrodes formed on the entire surface. It consists of a substrate. Since TN type liquid crystals with high contrast are usually used as liquid crystals, transmission type liquid crystal display devices have been developed in which transparent substrates such as glass are used as substrates for forming active elements. Amorphous silicon (a-Si) and polysilicon (poly-Si) are mainly used as thin film semiconductor materials that form the channel region of active elements.
i allows the use of inexpensive glass substrates because the film can be formed at low temperatures, and has been applied to many recent pocket-type LCD televisions. Poly-Si has higher mobility than a=si, and has extremely low photosensitivity compared to single-crystal silicon and a-Si, which means it can realize high-performance active elements that are extremely stable against light. For this reason, it is expected that it will be applied to the next generation of high-definition liquid crystal display devices, but the current state is that the technology that can easily form large areas at low enough temperatures to use inexpensive glass substrates has not yet matured. be.
ｐｏｌｙ−Ｓｉアクティブ素子を形成する方法として通
常のシリコンＩＣ＋ＬＳＩプロセス中の高ｆｆｌＰｏｌ
ｙ−Ｓｔプロセスを利用する方法がある。ただし基板材
料としては、この様な高温プロセスに耐える石英や単結
晶シリコン基板が必要である．この中で後者の単結晶シ
リコン基板を用い、光入射が無くかつ高速．高性能が要
求される周辺駆動回路を単結晶シリコントランジスタ回
路で形成し、光入射のあるアクティブ素子部をｐ ｏ
１ ｙ − Ｓ ｉ Ｔ Ｆ Ｔで形成し、アクティブ
マトリクス基板とする方法が例えば特願昭６１−２４６
６５３ ｒアクティブマトリクス５液晶表示装置および
その製造方法」の明細書中に述べられている．この発明
によれば、第２図に示す様に例えば透明ガラス基板２０
１上にエボキシまたはポリイミド等の透明な接着層２０
２によりアクティブ素子が形成されたデバイス層を接着
し、アクティブマトリクス基板を構成している．
デバイス層の詳細は以下の通りである．第２図には示さ
れていないが、単結晶シリコン基板上に、通常のシリコ
ンＩＣ，ＬＳＩプロセスを用い例えば二酸化シリコンか
らなる熱酸化絶縁膜２０３上に島状のｐｏｌｙ−Ｓｉ半
導体層２０４をマトリクス状に配列形成した後、ゲーＩ
・絶縁膜２０５．ゲート電極２０６を順次パターン形成
する．次にイオン注入等によりソース，ドレイン領域を
ｐｏｌｙ−Ｓｉ半導体層中に形成した後、配線分離用絶
縁膜２０７を形成、コンタクトホールをあけ、アルミ配
線で信号配線用のトレイン配線２０８．ソースコンタス
ト２０９をパターン形成し、ＴＰＴとする．表示電極２
１０はＩＴＯからなる透明電極で、ソースコンタクト２
０つと接続される．この場合、特にソースコンタクトは
無くてかまわないが、５００人程度の表示電極２１０だ
けでは通常３０００人以上のコンタクトホールを通して
ソース領域との接続の信頼性が無くなるので、ソースコ
ンタクトは有る方がよい．最後に、この単結晶シリコン
基板を裏面から選択ポリッシングにより熱酸化絶縁膜２
０３まで研磨し、薄膜のデバイス層としている．周辺駆
動回路まで含めたアクティブマトリクス基板の模式的平
面図を第３図に示す．例えばゲート電極２０６を水平配
線、ドレイン配線２０８を垂直配線とするマトリクス配
線とｐ ｏ １ ｙ − Ｓ ｉ Ｔ Ｆ Ｔ ３ ０
３および表示電極２１０で各々分離された画素とから
形成されたアクティブマトリクス素子部の周囲に、周辺
駆動回路である例えば単結晶シリコントランジスタで構
成された走査駆動回路３０１．信号駆動回路３０２が設
置されている．以上の様にして形成されたアクティブマ
トリクス基板上に液晶配向膜２１１《第２図参照》を少
なくても表示電極２１０上全面に形成し、ＩＴＯからな
る透明性対向電５２１２が透明ガラス基板２０１全面に
形成された対向基板とでＴＮ型液晶２１３をはさむ事に
より液晶表示装置が完成される（第２図）。As a method for forming poly-Si active devices, high fflPol during normal silicon IC+LSI process is used.
There is a method using the y-St process. However, the substrate material must be quartz or single crystal silicon that can withstand such high-temperature processes. Among these, the latter single-crystal silicon substrate is used, and there is no light incidence and high speed. The peripheral drive circuit that requires high performance is formed with a single crystal silicon transistor circuit, and the active element part where light enters is
For example, a method of forming an active matrix substrate using 1y-S i T F T is disclosed in Japanese Patent Application No. 61-246.
653 r active matrix 5 liquid crystal display device and its manufacturing method”. According to this invention, for example, a transparent glass substrate 20 as shown in FIG.
1, a transparent adhesive layer 20 of epoxy or polyimide, etc.
2, the device layer on which the active element is formed is adhered to form an active matrix substrate. The details of the device layer are as follows. Although not shown in FIG. 2, an island-shaped poly-Si semiconductor layer 204 is formed in a matrix on a thermally oxidized insulating film 203 made of silicon dioxide, for example, on a single crystal silicon substrate using a normal silicon IC or LSI process. After forming the array in the form of
- Insulating film 205. Gate electrodes 206 are sequentially patterned. Next, after forming source and drain regions in the poly-Si semiconductor layer by ion implantation or the like, an insulating film 207 for wiring isolation is formed, a contact hole is opened, and a train wiring 208 for signal wiring is formed using aluminum wiring. The source contour 209 is patterned to form TPT. Display electrode 2
Reference numeral 10 denotes a transparent electrode made of ITO, which serves as a source contact 2.
Connected to 0. In this case, there is no particular need for a source contact, but if there are only about 500 display electrodes 210, the reliability of the connection with the source region through contact holes of 3000 or more will usually be lost, so it is better to have a source contact. Finally, a thermal oxidation insulating film 2 is applied to this single crystal silicon substrate by selective polishing from the back side.
It is polished to 03 to form a thin device layer. Figure 3 shows a schematic plan view of the active matrix board including the peripheral drive circuit. For example, there is a matrix wiring in which the gate electrode 206 is a horizontal wiring and the drain wiring 208 is a vertical wiring.
3 and pixels separated by display electrodes 210, a peripheral drive circuit, for example, a scan drive circuit 301 . A signal drive circuit 302 is installed. On the active matrix substrate formed as described above, a liquid crystal alignment film 211 (see FIG. 2) is formed on at least the entire surface of the display electrode 210, and a transparent counter electrode 5212 made of ITO is formed on the entire surface of the transparent glass substrate 201. A liquid crystal display device is completed by sandwiching a TN type liquid crystal 213 between the opposite substrates formed on the substrate (FIG. 2).
ところで液晶配向膜２１１を形成する方法として何種類
かあるがその中で最近では、製造が非常に容易なラビン
グ法が用いられている．これは、液晶配向膜として例え
ばポリイミド等の有機膜を印刷等でパターン形成した後
、液晶分子が一方向に配列する様に、布等の表面の植毛
で有機膜を摩擦する方法である．この方法により、第２
図に示した様にアクティブマトリクス基板上に形成した
有機膜をラビングで液晶配向膜２１１とする場合、アル
ミ配線等の段差により全域にわたり均一な配向が得られ
ない．特に、段差部、つまり表示電極２１０の周辺部で
顕著となる．例えばアルミ配線の膜厚による段差は、通
常１μｍ以上となり顕著な場合、ラビングされるのはほ
とんどアルミ配線上で、ラビングしたい表示電極２１０
上は無配向となってしまう。また表示電極２１０上を良
好な配向膜とするため摩擦力を強くしたりすると、ＴＰ
Ｔに損傷を与えかねない。以上の様に従来例においては
、液晶配向膜２１１形成のラビング時において配向膜不
良をおこしたり、またＴＰＴに損障を与えなりする歩留
りの悪い構造であった。以上の課題は、石英基板上に直
接ｐｏｔｙ−ＳｉＴＦＴを形成したアクティブマトリク
ス基板においても同様である．
本発明の目的は、この様な従来の欠点を取り除き、高歩
留りで高性能な液晶表示装置用アクティブマトリクス基
板を提供する事にある．〔課題を解決するための手段〕
上記目的を達成するためには、本発明の液晶表示装置用
アクティブマトリクス基板は、絶縁性基板上に、マトリ
クス状に形成され薄膜半導体アクティブ素子．該アクテ
ィブ素子を通じ信号を制御，印加するためのマトリクス
配線，前記アクティブ素子および前記マトリスク配線を
覆い前記絶縁性基板上に形成された透明の絶縁性平坦化
膜，該絶縁性平坦化膜上に形成された表示電極とから少
なくとも構成されたものである．
〔実施例〕
以下本発明の一実施例について図面を参照して説明する
．
第１図は、本発明の一実施例を説明するための液晶表示
装置用アクティブマトリクス基板の断面図である。第１
図において、例えば保持基板として安価な透明ガラス基
板１０１を用い、この上に接着層１０２を介してｐｏｌ
ｙ−ＳｉＴＦＴからなるマトリクス状に配列されたアク
ティブ素子を有する薄膜のデバイス層が設置されている
構造は前に述べた従来例と同様である。また接着層１０
２も従来例同様例えばエボキシ系あるいはポリイミド系
の透明性接着材である．
以下デバイス層について詳細に説明する．図示されてい
ないが単結晶シリコン基板上に熱酸化法やＣＶＤ法等に
より二酸化シリコンの絶縁膜１０３を形成する．厚さは
特に限定は無いが後で述べるデバイス層を形成するため
の研磨精度から１０００人以上が望ましい．この絶縁膜
１０３上に例えばＣＶＤ法によりｐｏｌｙ−Ｓｉ半導体
層１０４を蒸着、マトリクス状の各画素毎のＴＰＴチャ
ネル領域となる様に島状にパターン化する。By the way, there are several methods for forming the liquid crystal alignment film 211, and among them, the rubbing method, which is extremely easy to manufacture, has been used recently. This is a method in which an organic film such as polyimide is patterned by printing as a liquid crystal alignment film, and then the organic film is rubbed with flocking on the surface of cloth or the like so that the liquid crystal molecules are aligned in one direction. With this method, the second
As shown in the figure, when an organic film formed on an active matrix substrate is rubbed to form a liquid crystal alignment film 211, uniform alignment cannot be obtained over the entire area due to steps such as aluminum wiring. This is particularly noticeable at the stepped portion, that is, the peripheral portion of the display electrode 210. For example, if the level difference due to the film thickness of aluminum wiring is noticeable and is usually 1 μm or more, most of the rubbing will be done on the aluminum wiring, and the display electrode 210 to be rubbed will be rubbed.
The upper part becomes unoriented. In addition, if the frictional force is increased to form a good alignment film on the display electrode 210, the TP
This may cause damage to the T. As described above, in the conventional example, the yield was poor because alignment film defects were caused during rubbing for forming the liquid crystal alignment film 211, and the TPT was damaged. The above problems also apply to active matrix substrates in which poty-SiTFTs are directly formed on quartz substrates. An object of the present invention is to eliminate such conventional drawbacks and provide a high-yield, high-performance active matrix substrate for a liquid crystal display device. [Means for Solving the Problems] In order to achieve the above object, the active matrix substrate for a liquid crystal display device of the present invention is formed in a matrix shape on an insulating substrate and has thin film semiconductor active elements. A matrix wiring for controlling and applying signals through the active element, a transparent insulating flattening film formed on the insulating substrate to cover the active element and the matrix wiring, and a transparent insulating flattening film formed on the insulating flattening film. The display electrode is made up of at least two display electrodes. [Example] An example of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of an active matrix substrate for a liquid crystal display device for explaining one embodiment of the present invention. 1st
In the figure, for example, an inexpensive transparent glass substrate 101 is used as a holding substrate, and a pol film is placed on it with an adhesive layer 102 thereon.
The structure in which a thin film device layer having active elements arranged in a matrix of y-Si TFTs is provided is the same as the conventional example described above. Also, the adhesive layer 10
Similar to the conventional example, adhesive No. 2 is a transparent adhesive material such as epoxy or polyimide. The device layer will be explained in detail below. Although not shown, an insulating film 103 of silicon dioxide is formed on a single crystal silicon substrate by a thermal oxidation method, a CVD method, or the like. There is no particular limit to the thickness, but it is desirable to have at least 1000 polishers in view of the polishing accuracy required to form the device layer, which will be discussed later. A poly-Si semiconductor layer 104 is deposited on this insulating film 103 by, for example, the CVD method, and patterned into an island shape to form a TPT channel region for each pixel in a matrix.
続いてｐｏｌｙ−Ｓｉ半導体層１０４上に例えば熱酸化
による二酸化シリコンからなるゲート絶縁膜１０５．ｐ
ｏｔｙ−ｓｉゲート電極１０６を通常のシリコンＩＣの
ＭＯＳＦＥＴと同等なプロセスで順次形成，パターン化
する，ｐｏｌｙ−Ｓｉゲート電！ １． ０ ６は、そ
のままマトリクス配線の例えば水平配線を形成し、ｐ
ｏ １ ｙ − Ｓ ｉ Ｔ Ｆ Ｔの開閉制御を行な
う。ｐｏｌｙ−ＳＬ半導体層１０４にソース，ドレイン
領域を形成する例えばイオン注入を行なった後、ゲート
電極１０６と後のアルミ配線を分離する配線分離用絶縁
膜１０７を形成し、ソース，トレイン領域にコンタクト
ホールをあける．次いで、厚さ１μｍ程度にアルミニウ
ムを全面蒸着後、信号印加配線となるドレイン配線１０
８およびソースコンタスト１０９にパターン化する．ド
レイン配線１０８は例えば垂直配線を形成しゲート電極
１０６の水平配線とてマトリクス配線を構成する．その
後、少なくともマトリクス状に配列されたｐｏｌ３／−
ＳｉＴＰＴを含む前記マトリクス配線で囲まれた領域全
面に、例えば二酸化シリコン系塗膜材料（商品名 東京
応化製ＯＣＤ）あるいはアクリル系樹脂塗膜材料（商品
名 日本合成ゴム製ＪＳＳ−４５１）等を１μｍ〜２μ
ｍ程度スビンコート等で塗布し焼成する事により透明の
絶縁性平坦化膜１１０を形成する。次に、マトリクス状
に配列された全てのｐｏ １ ｙ−Ｓ ＬＴＦＴのソー
スコンタクト１０９上の前記平坦化膜１．． １ ０に
フォｌ・リソグラフィによりコンタクトホールを形成し
、各々のソースコンタクト１０９と接続され各画素に分
離された例えばＩＴＯからなる透明の表示電極１１１を
設置する。この時表示電極１１１は、例えば５００人〜
１０００人の薄膜であるため、例えばコンタクトホール
部の段差が０．５μｍ〜１μｍとなる様な平坦化膜１１
０形成条件である場合は、エッチバック等により段差低
減が望ましい。最後に、従来例で述べた様に選択ポリッ
シングを用い、単結晶シリコン基板を裏面より研磨し、
デバイス層が完成する．平坦化膜１１０，表示電極１１
１は、単結晶シリコ基板研磨後のアクティブマトリクス
基板上に形成する方法でもかまわない．以上の様にして
形成されたデバイス層を接着層１０２を介してガラス基
板１０１に接着した本実施例のアクティブマトリクス基
板においては、平坦化膜１１０によって、マトリクス配
線等による１μｍ程度の段差が例えば０．１〜０．２μ
ｍ程度に軽減される．またマトリクス配線等による段差
はフォトリソグラフィにより急峻であるが、平坦化膜１
１０ではなめらかな段差の構造となっている．したがっ
て表示電極上等に形成された液晶配向膜１１２も平坦と
なり、ＴＰＴを損なくことなく液晶配向膜全体が一様に
ラビングでき、配向膜不良は生じない．
尚、本実施例では、周辺駆動回路を単結晶シリコン基板
上に構成するのは第３図に示す従来例と同じで、平坦化
プロセスは共用も可能である．また、本実施例では、単
結晶シリコン基板上にｐｏｌｙ−ＳｉＴＦＴを形成する
アクティブマトリクス基板について説明したが、従来例
で述べた石英基板上に直接ｐｏｌｙ−ＳｉＴＦＴを形成
する場合でもさらにａ − Ｓ ｉ Ｔ Ｆ ＴやＴＦ
Ｄ等のアクティブマトリクス基板においても本発明は適
用できる．
〔発明の効果〕
以上説明した様に、本発明の液晶表示装置用アクティブ
マトリクス基板によれば、平坦化膜１１１のスビンコー
トという簡単なプロセスにより、アルミ配線等による急
峻な高い段差を１なめらかで平坦な表面とすることがで
き、ラビングにより表示電極部上においてもムラの無い
良好な液晶配向膜１１２が形成され、良好な液晶表示を
可能とする．また摩擦力の強いラビングは不必要であり
、ラビング時におけるアルミ配線やＴＦＴ部へのダメー
ジが少なく欠陥の無い高歩留りな構造となっている．Subsequently, a gate insulating film 105 made of silicon dioxide by thermal oxidation, for example, is formed on the poly-Si semiconductor layer 104. p
The poly-Si gate electrode 106 is sequentially formed and patterned using the same process as a MOSFET of a normal silicon IC! 1. 06 directly forms matrix wiring, for example, horizontal wiring, and p
o 1 y - S i T FT Controls opening and closing of T. After performing, for example, ion implantation to form source and drain regions in the poly-SL semiconductor layer 104, a wiring isolation insulating film 107 is formed to separate the gate electrode 106 and subsequent aluminum wiring, and contact holes are formed in the source and train regions. Open it. Next, after aluminum is deposited on the entire surface to a thickness of about 1 μm, a drain wiring 10 that becomes a signal application wiring is formed.
8 and source contrast 109. The drain wiring 108 forms, for example, a vertical wiring, and the horizontal wiring of the gate electrode 106 forms a matrix wiring. Then, at least pol3/- arranged in a matrix
For example, a silicon dioxide coating material (trade name: OCD manufactured by Tokyo Ohka Co., Ltd.) or an acrylic resin coating material (trade name: JSS-451 manufactured by Nippon Synthetic Rubber Co., Ltd.) or the like is applied to a thickness of 1 μm over the entire area surrounded by the matrix wiring containing SiTPT. ~2μ
A transparent insulating flattening film 110 is formed by coating the film in a thickness of about m with a tin coat or the like and baking it. Next, the planarization film 1. on the source contacts 109 of all the po 1 y-S LTFTs arranged in a matrix. ．． A contact hole is formed in 10 by photolithography, and a transparent display electrode 111 made of, for example, ITO is installed connected to each source contact 109 and separated into each pixel. At this time, the display electrode 111 can accommodate, for example, 500 or more people.
Since it is a thin film of 1,000 layers, the flattening film 11 is such that the level difference in the contact hole part is 0.5 μm to 1 μm, for example.
If the condition is 0, it is desirable to reduce the step difference by etching back or the like. Finally, as described in the conventional example, the single crystal silicon substrate is polished from the back side using selective polishing.
The device layer is completed. Planarization film 110, display electrode 11
1 may be formed on an active matrix substrate after polishing a single crystal silicon substrate. In the active matrix substrate of this embodiment in which the device layer formed as described above is bonded to the glass substrate 101 via the adhesive layer 102, the level difference of about 1 μm due to matrix wiring etc. can be eliminated by the flattening film 110, for example. .1~0.2μ
It is reduced to about m. In addition, the level difference due to matrix wiring etc. is steep due to photolithography, but the flattening film 1
10 has a smooth step structure. Therefore, the liquid crystal alignment film 112 formed on the display electrode etc. becomes flat, and the entire liquid crystal alignment film can be rubbed uniformly without damaging the TPT, and no alignment film defects occur. In this embodiment, the peripheral drive circuit is constructed on a single-crystal silicon substrate in the same way as the conventional example shown in FIG. 3, and the planarization process can also be shared. Furthermore, in this embodiment, an active matrix substrate in which poly-Si TFTs are formed on a single crystal silicon substrate has been described, but even when poly-Si TFTs are directly formed on a quartz substrate as described in the conventional example, there is still a T F T or TF
The present invention can also be applied to active matrix substrates such as D. [Effects of the Invention] As explained above, according to the active matrix substrate for a liquid crystal display device of the present invention, steep and high steps caused by aluminum wiring etc. can be smoothed and flattened by a simple process of coating the flattening film 111. By rubbing, a good liquid crystal alignment film 112 with no unevenness is formed even on the display electrode portion, and a good liquid crystal display is possible. Furthermore, rubbing with strong frictional force is unnecessary, and the aluminum wiring and TFT parts are less damaged during rubbing, resulting in a high-yield structure with no defects.
Claims (1)
アクティブ素子、該アクティブ素子を通じ信号を制御、
印加するためのマトリクス配線、前記アクティブ素子お
よび前記マトリスク配線を覆い前記絶縁性基板上に形成
された透明の絶縁性平坦化膜、該絶縁性平坦化膜上に形
成された表示電極とから少なくとも構成された事を特徴
とする液晶表示装置用アクティブマトリスク基板。Thin film semiconductor active elements formed in a matrix on an insulating substrate, controlling signals through the active elements,
The display device comprises at least a matrix wiring for applying voltage, a transparent insulating flattening film formed on the insulating substrate to cover the active element and the matrix wiring, and a display electrode formed on the insulating flattening film. An active matrix substrate for a liquid crystal display device, which is characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1055344A JPH02234134A (en) | 1989-03-07 | 1989-03-07 | Active matrix substrate for liquid crystal display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1055344A JPH02234134A (en) | 1989-03-07 | 1989-03-07 | Active matrix substrate for liquid crystal display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02234134A true JPH02234134A (en) | 1990-09-17 |
Family
ID=12995891
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1055344A Pending JPH02234134A (en) | 1989-03-07 | 1989-03-07 | Active matrix substrate for liquid crystal display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02234134A (en) |
Cited By (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04177325A (en) * | 1990-11-13 | 1992-06-24 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device |
| JPH04177326A (en) * | 1990-11-13 | 1992-06-24 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device and driving method thereof |
| US5486939A (en) * | 1994-04-28 | 1996-01-23 | Xerox Corporation | Thin-film structure with insulating and smoothing layers between crossing conductive lines |
| US5721601A (en) * | 1994-09-29 | 1998-02-24 | Sanyo Electric Co., Ltd. | Display units having two insolating films and a planarizing film and process for producing the same |
| JPH10186399A (en) * | 1996-12-20 | 1998-07-14 | Sony Corp | Liquid crystal device |
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| US5933205A (en) * | 1991-03-26 | 1999-08-03 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and method for driving the same |
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| US6157428A (en) * | 1997-05-07 | 2000-12-05 | Sanyo Electric Co., Ltd. | Liquid crystal display |
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| US6204905B1 (en) | 1997-11-18 | 2001-03-20 | Sanyo Electric Co., Ltd. | Vertical alignment liquid crystal display device having planarized substrate surface |
| JP2001109402A (en) * | 1995-11-17 | 2001-04-20 | Semiconductor Energy Lab Co Ltd | Display device |
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| US6246458B1 (en) | 1997-11-18 | 2001-06-12 | Sanyo Electric Co., Ltd. | Method for manufacturing liquid crystal display |
| US6369788B1 (en) | 1990-11-26 | 2002-04-09 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and driving method for the same |
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| JP2003229282A (en) * | 2003-01-09 | 2003-08-15 | Idemitsu Kosan Co Ltd | Organic active el light emitting device |
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| US6893906B2 (en) | 1990-11-26 | 2005-05-17 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and driving method for the same |
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