JPH02231733A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPH02231733A
JPH02231733A JP5268589A JP5268589A JPH02231733A JP H02231733 A JPH02231733 A JP H02231733A JP 5268589 A JP5268589 A JP 5268589A JP 5268589 A JP5268589 A JP 5268589A JP H02231733 A JPH02231733 A JP H02231733A
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JP
Japan
Prior art keywords
layer
layers
forbidden band
gaas
sides
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5268589A
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Japanese (ja)
Inventor
Koji Tomita
孝司 富田
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Sharp Corp
Original Assignee
Sharp Corp
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Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP5268589A priority Critical patent/JPH02231733A/en
Publication of JPH02231733A publication Critical patent/JPH02231733A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve mutual conductance interruption frequency by arranging the constitution such that the thicknesses of the layers, which have narrow forbidden band widths, on both sides of a layer, which has wide forbidden band width are formed different from each other. CONSTITUTION:In an alternate layer 11, the thicknesses of layers, which have narrow forbidden band widths and are provided on both sides of a wide forbidden band width, are different. For this reason, the energy levels of minibands, which are formed in narrow forbidden band widths on both sides, are put in different conditions. Accordingly, even if a gate electrode 19 is deeply and negatively biased, electrons cases to overflow from an electric conductive layer to this alternate layer 11 causing real space transition. Hereby, short channel effect is suppressed, and mobility becomes great, and mutual conductance improves and also interruption frequency improves.

Description

【発明の詳細な説明】 く産業上の利用分野〉 この発明は電界効果トランジスタ、より詳しくはへテロ
構造を有する高電子移動度トランジスタ(以下、HEM
Tと称す)に関する。
[Detailed description of the invention] Industrial application field> This invention relates to a field effect transistor, more specifically a high electron mobility transistor having a heterostructure (hereinafter referred to as HEM).
(referred to as T).

く従来の技術〉 電界効果トランジスタ(PET)の重要な性能の一つに
遮断周波数ftがある。広く知られいるように、ゲート
長i2gを短かくすると、このhに逆比例して相互コン
ダクタンスglが増加し、同時に入力容11Cgsが低
減するため、f t (=gs/ 2 πCgs)を向
上させることが可能となって、例えば、マイクロ波帯増
幅に用いられるHEMTの場合、Qg=0.25u−の
ときft=70GHzのオーダとなる。
BACKGROUND ART One of the important performances of a field effect transistor (PET) is the cutoff frequency ft. As is widely known, when the gate length i2g is shortened, the mutual conductance gl increases in inverse proportion to this h, and at the same time, the input capacitance 11Cgs decreases, which improves f t (=gs/2 πCgs). For example, in the case of a HEMT used for microwave band amplification, when Qg=0.25u-, ft=on the order of 70 GHz.

しかし、ゲート長Qgをこれより短かくして0.1μ一
程度とした場合、g鵬がむしろ減少する現象、いわゆる
短チャネル効果が起って、PETのft向上の障害とな
っている。
However, when the gate length Qg is made shorter than this, to approximately 0.1μ, a phenomenon in which the g length actually decreases, a so-called short channel effect, occurs, which becomes an obstacle to improving the ft of PET.

従来、遮断周波数の向上を目指したHEMTには、第4
図または第5図に示すようなものがある。
Conventionally, HEMTs aiming to improve the cut-off frequency have a fourth
There are some as shown in Fig. 5 or Fig. 5.

第4図に示すHEMTは、GaAs基板31上に、1!
GaAs層37とGaAsチャネル層32と電子供給層
としてn  12GaAs層38とを順次積層し、この
n−A17GaAs層38上にソース電極47.ドレイ
ン1!fiJ8,ゲート電極49を設けた構造をしてい
る。このHEMTは、GaAsチャネル層32よりも大
きなエネルギギャップを有するAI2G aAs層37
によってヘテロ界面32aに電位障壁を形成して、Ga
Asチャネル層32中の電子5がこのAi2GaAs層
37へ溢れ出ないようにすることによって、上記短チャ
ネル効果を抑制しようとしている。
The HEMT shown in FIG. 4 has 1!
A GaAs layer 37, a GaAs channel layer 32, and an n 12 GaAs layer 38 as an electron supply layer are sequentially laminated, and a source electrode 47 is formed on this n-A 17 GaAs layer 38. Drain 1! It has a structure in which a fiJ8 and a gate electrode 49 are provided. This HEMT consists of an AI2G aAs layer 37 having a larger energy gap than the GaAs channel layer 32.
By forming a potential barrier at the hetero interface 32a, Ga
By preventing the electrons 5 in the As channel layer 32 from overflowing to the Ai2GaAs layer 37, the above short channel effect is suppressed.

一方、第5図に示すHEMTは、GaAs基板51上に
、AI2GaAs層57とGaAs層62との超格子か
らなる交互層6lを設け、GaAsチャネル層5 2 
,n − AI2GaAs層58.ソース電極67.ド
レイン電極68,ゲート電極69を設けた構造をしてい
る。そして、ヘテロ界面52aの電位障壁によって上記
短チャネル効果を抑制しようとしている。
On the other hand, in the HEMT shown in FIG. 5, alternating layers 6l consisting of a superlattice of an AI2GaAs layer 57 and a GaAs layer 62 are provided on a GaAs substrate 51, and a GaAs channel layer 52
,n-AI2GaAs layer 58. Source electrode 67. It has a structure in which a drain electrode 68 and a gate electrode 69 are provided. The short channel effect is suppressed by the potential barrier of the hetero interface 52a.

く発明が解決しようとする課題〉 しかしながら、第4図に示す従来のHEMTは、ヘテロ
界面32aの電位障壁を越えてl!GaAs層37内に
電子lOが侵入した場合、広く知られているようにA(
20aAsの結晶学的品質がGaAsよりも劣るため、
A12GaAs層37内の欠陥準位llに上記電子IO
が捕獲されて、しきい値電圧が変動したり、雑音電流が
増加するという問題がある。また、上記AQGaAs層
37が単層であって他の層より厚いため、GaAs層チ
ャンネル層32との間に格子不整が顕著に発生し、原子
層レベルでペテロ界面32aの平坦さが乱される。した
がって、上記GaAsチャネル層の結晶品質か悪くなっ
て、上記電子35の易動度が低下して、相互コンダクタ
ンスg畠が低下し、遮断周波数が改善されないという問
題がある。
Problems to be Solved by the Invention However, in the conventional HEMT shown in FIG. 4, l! When electrons lO enter the GaAs layer 37, as is widely known, A(
Since the crystallographic quality of 20aAs is inferior to that of GaAs,
The electron IO is placed in the defect level ll in the A12GaAs layer 37.
There are problems in that the threshold voltage fluctuates and the noise current increases. Furthermore, since the AQGaAs layer 37 is a single layer and is thicker than other layers, a significant lattice mismatch occurs between the AQGaAs layer 37 and the GaAs channel layer 32, which disturbs the flatness of the Peter interface 32a at the atomic layer level. . Therefore, the crystal quality of the GaAs channel layer deteriorates, the mobility of the electrons 35 decreases, the mutual conductance g decreases, and the cutoff frequency is not improved.

一方、第5図に示すH E M Tは、第4図のHEM
Tと異なり、AQGaAs層57とGaAs層62との
超格子からなる交互層61上にGaAsチャネル層52
を設けているので、格子不整合が緩和され、ヘテロ界面
52aが平坦になり、上記交互層6lの上側のAi2G
aAs層の不純物がこのヘテロ界面52aに閉じ込めら
れる。したがって、他に要因がなければ、上記GaAs
チャネル層52内の電子60の易動度が向上するはずで
ある。しかしながら、第6図に示すように、このHEM
Tは、ゲート電極が深く負バイアスされた場合に、交互
層6lの超格子構造によってGaAs層62内に形成さ
れるミニバン,ド63を通して電子60がこの交互層6
1に溢れ出す(実空間遷移効果)ため、電子60の易動
度が低下して、遮断周波数ftを改善することができな
い。また、このように電子が溢れた場合、しきい値電圧
が変動し、雑音電流も増加する。
On the other hand, HEM T shown in FIG.
Unlike T, a GaAs channel layer 52 is formed on an alternating layer 61 consisting of a superlattice of an AQGaAs layer 57 and a GaAs layer 62.
, the lattice mismatch is relaxed, the hetero interface 52a becomes flat, and the Ai2G above the alternating layer 6l
Impurities in the aAs layer are confined to this hetero interface 52a. Therefore, if there are no other factors, the above GaAs
The mobility of electrons 60 within channel layer 52 should be improved. However, as shown in Figure 6, this HEM
T means that when the gate electrode is deeply negatively biased, electrons 60 pass through the mini-bands 63 formed in the GaAs layer 62 by the superlattice structure of the alternating layers 6l.
1 (real space transition effect), the mobility of the electrons 60 decreases, making it impossible to improve the cutoff frequency ft. Furthermore, when electrons overflow in this way, the threshold voltage fluctuates and the noise current also increases.

そこで、この発明の目的は、交互層において上記実空間
遷移を起こさないようにすることによって、短チャネル
効果を抑制して、易動度を大きくして相互コンダクタン
スを向上させると共に遮断周波数を向上させたHEMT
を提供することにある。
Therefore, an object of the present invention is to suppress the short channel effect, increase the mobility, improve the mutual conductance, and improve the cutoff frequency by preventing the above-mentioned real space transition from occurring in the alternating layers. HEMT
Our goal is to provide the following.

く課題を解決するための手段〉 上記目的を達成するために、この発明のHEMTは、半
導体基板表面上に、上記表面に平行な電気伝導層を有す
ると共に、この電気伝導層と上記基板表面との間に、広
い禁制帯幅を有する層と狭い禁制帯幅を有する層を交互
に形成してなる半導体交互層を有する半導体装置におい
て、広い禁制帯幅を有する層の両側の狭い禁制帯幅を有
する層の層厚が互いに異なることを特徴としている。
Means for Solving the Problems> In order to achieve the above object, the HEMT of the present invention has an electrically conductive layer on the surface of a semiconductor substrate parallel to the surface, and a connection between this electrically conductive layer and the surface of the substrate. In a semiconductor device having an alternating semiconductor layer in which layers with a wide bandgap width and layers with a narrow bandgap width are alternately formed between the layers, narrow bandgap widths on both sides of the layer with a wide bandgap width are formed. It is characterized in that the layers have different thicknesses.

また、上記半導体交互層を構成する二つの層のうち一方
の層が上記電気伝導層と同一材料からなるのが望ましい
Further, it is preferable that one of the two layers constituting the alternating semiconductor layer is made of the same material as the electrically conductive layer.

く作用〉 交互層において、広い禁制帯幅を有する層の両側に設け
られた狭い禁制帯幅を有する層の層厚が互いに異なるた
め、上記両側の狭い禁制帯幅内に形成されるミニバンド
のエネルギ準位が互いに異なる状態になる。そのため、
ゲート電極が深く負バイアスされた場合であっても、電
気伝導層からこの交互層に電子が実空間遷移を起こして
溢れ出すことがなくなる。したがって、短チャネル効果
が抑制されて、易動度が大きくなって相互コンダクタン
スが向上すると共に遮断周波数が向上する。
In the alternating layers, since the layer thicknesses of the layers with narrow forbidden band widths provided on both sides of the layer with wide forbidden band widths are different from each other, the mini-bands formed within the narrow forbidden band widths on both sides are The energy levels become different from each other. Therefore,
Even if the gate electrode is deeply negatively biased, electrons will not overflow from the electrically conductive layer into this alternating layer due to real space transition. Therefore, short channel effects are suppressed, mobility is increased, mutual conductance is improved, and cut-off frequency is improved.

なお、電子が溢れ出すことがなくなって、しきい値電圧
の変動や雑音電流が低減する。
Note that since electrons no longer overflow, fluctuations in threshold voltage and noise current are reduced.

また、上記交互層を構成する二つの層のうち一方の層が
上記電気伝導層と同一材料からなる場合、この電気伝導
層と交互層との格子不整合が小さくなって、さらに易動
度が大きくなって相互コンダクタンスが向上し、遮断周
波数が向上する。
In addition, when one of the two layers constituting the alternating layers is made of the same material as the electrically conductive layer, the lattice mismatch between the electrically conductive layer and the alternating layers is reduced, and the mobility is further reduced. The larger the transconductance, the higher the cutoff frequency.

く実施例〉 以下、この発明のHEMTを図示の実施例により詳細に
説明する。
Embodiments> Hereinafter, the HEMT of the present invention will be explained in detail with reference to illustrated embodiments.

第1図に示すように、このHEMTは、半絶縁性GaA
s基板l表面上に、GaAsからなる層l2とl!Ga
Asからなる層7とを交互に2g+層(この場合、一=
5であって10層)積層してなる交互層l1と、電気伝
導層としてアンドーブGaAs層2と、スペーサ層とし
てアンドーブAQGaAs層l4と、電子供給層として
Siドープn−Ai2GaAs層8と、コンタクト抵抗
低減用キャップ層としてSiドープn−GaAslBと
、このn−GaAs層l6上にソース電極l7およびド
レイン電極18と、上記n−GaAs層l6の中央開口
部内にて上記n−AllGaAS層8上にゲート電極l
9とを順次備えている。
As shown in Figure 1, this HEMT consists of semi-insulating GaA
On the surface of the s-substrate l, layers l2 and l! made of GaAs are formed. Ga
2g+layers (in this case, 1=
5 and 10 layers), an undoped GaAs layer 2 as an electrically conductive layer, an undoped AQGaAs layer 14 as a spacer layer, a Si-doped n-Ai2GaAs layer 8 as an electron supply layer, and a contact resistance. Si-doped n-GaAslB is used as a reduction cap layer, a source electrode 17 and a drain electrode 18 are formed on the n-GaAs layer 16, and a gate is formed on the n-AllGaAS layer 8 within the central opening of the n-GaAs layer 16. electrode l
9 in sequence.

このHEMTは、次のようにして作製される。This HEMT is manufactured as follows.

■まず、予め洗浄したGaAs基板1表面上に、分子線
エビタキシャル成長法(MBE法)によって、GaAs
Ji l 2 ,AI2G.aAs層7の順ニコれらを
交互に積層する。このとき、(2k−1)番目(kの値
は2,3.・・・,(a−1)のいずれかとする)に成
長するGaAB層l2の層厚を、(2k−3)番目およ
び(2k+1)番目のGaAs層12の層厚とそれぞれ
異なるように成長させる。なお、各GaAs層12の層
厚はGaAsの格子定数の整数倍とするのが好ましい。
■First, GaAs is grown on the surface of the GaAs substrate 1 which has been cleaned in advance by the molecular beam epitaxial growth method (MBE method).
Ji l 2 , AI2G. The aAs layers 7 are stacked alternately. At this time, the layer thickness of the GaAB layer l2 grown at the (2k-1)th (the value of k is 2, 3, ..., (a-1)) is set to the (2k-3)th and The layers are grown to have different thicknesses from the (2k+1)th GaAs layer 12. Note that the thickness of each GaAs layer 12 is preferably an integral multiple of the lattice constant of GaAs.

一方、偶数番目に成長するAl2GaAs層7の層厚は
、それぞれ同一の20原子層とする。なお、AQGaA
sの組成は12xGa+−xAsと表わされる。上記A
QGaAs層7のAl2混晶比は0.25とする。
On the other hand, the layer thicknesses of the even-numbered Al2GaAs layers 7 are the same, 20 atomic layers. In addition, AQGaA
The composition of s is expressed as 12xGa+-xAs. A above
The Al2 mixed crystal ratio of the QGaAs layer 7 is set to 0.25.

このように、211番目まで各層を成長して積層し、交
互層2を形成する。
In this way, each layer is grown and laminated up to the 211th layer to form alternating layers 2.

■続いて、MBE法によって、アンドーブGaAsを4
0原子層だけ成長してアンドープGaAa層7、アンド
ープAl2GaAsを4原子層だけ成長してアンドープ
AI2GaAs層l4、キャリア濃度lX 1 0 ”
cR″″3となるようにSiドープしたn−AQGaA
s(1!混晶比は0.25)を100原子層だけ成長し
てn−Al2GaAs層8、キャリア濃度2xl016
G翼−3となるようにSiドーブしたn−GaAsを2
0原子層だけ成長・してn−GaAs層16をこの順に
連続的に形成する。
■Subsequently, by MBE method, undove GaAs was
An undoped GaAa layer 7 is grown by 0 atomic layer, an undoped AI2GaAs layer 14 is grown by 4 atomic layers of undoped Al2GaAs, and a carrier concentration 1X 1 0 ”
n-AQGaA doped with Si so that cR″″3
s (1! Mixed crystal ratio is 0.25) by growing 100 atomic layers to form an n-Al2GaAs layer 8, carrier concentration 2xl016
2 Si-doped n-GaAs to form G wing-3
The n-GaAs layer 16 is continuously formed in this order by growing only 0 atomic layer.

■次に、ホトレジストをエッチングマスクとしてメサエ
ッチングして素子間を分離する。上記ホトレジストを除
去した後、リフトオフ法によって、膜厚がそれぞれ10
00人,100人,tooo人のAu−Ge膜,Ni膜
,Au膜からなるソース電極l7およびドレイン電極l
8を形成する。そして、上記n − G aAslil
l 6とこれらの電極とがオーミツクに接触する゛・よ
うに、窒素ガス雰囲気中において400℃.■分間でシ
ンタを行う。
(2) Next, using the photoresist as an etching mask, mesa etching is performed to isolate the elements. After removing the above photoresist, the film thickness was reduced to 10% by lift-off method.
Source electrode l7 and drain electrode l made of Au-Ge film, Ni film, and Au film of 00, 100, and too many people.
form 8. And the above n-GaAslil
The temperature was set at 400°C in a nitrogen gas atmosphere so that the electrodes were in contact with the ohmic. ■Perform syntax in minutes.

■その後、電子ビーム露光法によって、素子の中央郎に
艮さ0.1μl,幅200μ慟の窓を有するレジストマ
スク2lを形成する。そして、化学エッチング液を用い
てn−GaAs層l6をリセスエツチングして、上記n
  Al2GaAs層8表面の中央部を露出させる。続
いて、第2図に示すように、Al2を全面に蒸着し、リ
フトオフ法によってゲート電極l9を形成して、作製を
完了する。なお、上記レジストマスク2lに対応して、
このHEMTのゲート長は0.1μ―.ゲート幅は20
0μ1となる。
(2) Thereafter, a resist mask 2l having a window of 0.1 .mu.l and width of 200 .mu.m is formed in the center of the element by electron beam exposure. Then, the n-GaAs layer 16 is recess-etched using a chemical etching solution, and the n-GaAs layer 16 is recessed.
The central portion of the surface of the Al2GaAs layer 8 is exposed. Subsequently, as shown in FIG. 2, Al2 is deposited on the entire surface and a gate electrode 19 is formed by a lift-off method to complete the fabrication. In addition, corresponding to the above resist mask 2l,
The gate length of this HEMT is 0.1μ. Gate width is 20
It becomes 0μ1.

このように、交互層1lにおいて、広い禁制帯幅のAl
2GaAaからなる層7の両側に設けた狭い禁制帯幅G
aAsからなる層l2の層厚が互いに異なっている場合
、第3図に示すように、上記両側のGaAsからなる層
12内に形成されるミニバンドのエネルギ準位l3が互
いに異なる状態になる。
In this way, in the alternating layers 1l, a wide forbidden band width of Al
Narrow forbidden band width G provided on both sides of layer 7 made of 2GaAa
When the thicknesses of the layers 12 made of aAs are different from each other, the energy levels 13 of the mini-bands formed in the layers 12 made of GaAs on both sides are different from each other, as shown in FIG.

そのため、ゲート電極19を深く負バイアスして動作さ
せる場合であっても、上記GaAs層2からこの交互層
11に電子が実空間遷移を起こして溢れ出すことがなく
なる。したがって、短チャネル効果を抑制することがで
き、易動度を大きくして相互コンダクタンスgmを向上
させると共に遮断周波数ftを向上させることができる
。これに伴なって、しきい値電圧の変動や雑音電流を低
減させることができる。
Therefore, even if the gate electrode 19 is operated with a deep negative bias, electrons will not overflow from the GaAs layer 2 to the alternating layers 11 due to real space transition. Therefore, the short channel effect can be suppressed, the mobility can be increased, the mutual conductance gm can be improved, and the cutoff frequency ft can be improved. Accordingly, fluctuations in threshold voltage and noise current can be reduced.

また、上記HEMTは、交互層I1を構成する二つの層
のうち一方の層l2を、電気伝導層であるGaAs層2
と同一材料で構成しているので、このGaAs層2と交
互層11とのへテロ界而2aでの格子不整合が小さくな
って、さらに易動度を大きくしてgmJrを向上させて
いる。
Further, in the above-mentioned HEMT, one layer l2 of the two layers constituting the alternating layer I1 is replaced with a GaAs layer 2 which is an electrically conductive layer.
Since the GaAs layer 2 and the alternating layer 11 are made of the same material, the lattice mismatch in the hetero interface 2a between the GaAs layer 2 and the alternating layer 11 is reduced, further increasing the mobility and improving gmJr.

なお、この実施例は交互層11を10層(層数2mにお
いて一一5)で構成したが、これに限られるものではな
く、GaAs層2との格子不整合が顕著にならない範囲
で他の層数としても良い。
In this embodiment, the alternating layers 11 are composed of 10 layers (115 in the number of layers of 2 m), but the structure is not limited to this, and other layers may be used as long as the lattice mismatch with the GaAs layer 2 does not become noticeable. It may also be the number of layers.

く発明の効果〉 以上より明らかなように、この発明は、半導体基板表面
上に、上記表面に平行な電気伝導層を有すると.共に、
この電気伝導層と上記基板表面との間に、広い禁制帯幅
を有する層と狭い禁制帯幅を有する層を交互に形成して
なる半導体交互層を有する半導体装置において、広い禁
制帯幅を有する層の両側の狭い禁制帯幅を有する層の層
厚が互いに異なるので、交互層において実空間遷移を起
こさないようにすることができ、したがって短チャネル
効果を抑制して、易動度を大きくして相互コンダクタン
スを向上させると共に遮断周波数を向上させることがで
きる。
Effects of the Invention> As is clear from the above, the present invention has an electrically conductive layer on the surface of a semiconductor substrate that is parallel to the surface. both,
A semiconductor device having alternating semiconductor layers formed by alternately forming layers having a wide bandgap and layers having a narrow bandgap between the electrically conductive layer and the surface of the substrate, the semiconductor device having a wide bandgap. Since the layer thicknesses of the layers with narrow forbidden band widths on both sides of the layers are different from each other, it is possible to avoid real space transitions in the alternating layers, thus suppressing the short channel effect and increasing the mobility. It is possible to improve the mutual conductance and cut-off frequency.

また、上記交互層を構成する二つの層のうち一方の層が
上記電気伝導層と同一材料からなる場合、この電気伝導
層と交互層との格子不整合を小さくすることができ、さ
らに易動度を大きくすることができ、相互コンダクタン
ス.遮断周波数を向上させることができる。
In addition, when one of the two layers constituting the alternating layers is made of the same material as the electrically conductive layer, the lattice mismatch between the electrically conductive layer and the alternating layers can be reduced, and even more easily moveable. The degree of mutual conductance can be increased. The cutoff frequency can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明のHEMTの一実施例を示す概略断面
図、第2図は上記HEMTの作製工程中の状態を示す概
略断面図、第3図は上記HEMTにおける電子のエネル
ギ帯を示す図、第4図.第5図はそれぞれ従来のHEM
Tを示す概略断面図、第6図は第5図に示す従来の}I
EMTにおける電子のエネルギ帯を示す図である。 l・・・半絶縁性GaAs基板、 2・・・GaAs電気伝導層、2a・・・ヘテロ界面、
?−A12GaAsからなる層、 訃・・n−12GaAs電子供給層、1l・・・交互層
、l2・・・GaAsからなる層、 1 4−−−A(lGaAaスペーサ層、16・・・r
(−GaA8コンタクト抵抗低減用キャップ層、 l7・・・ソース電極、18・・・ドレイン電極、19
・・・ゲート電極。 第1図
FIG. 1 is a schematic sectional view showing an embodiment of the HEMT of the present invention, FIG. 2 is a schematic sectional view showing the state of the HEMT during the manufacturing process, and FIG. 3 is a diagram showing the energy band of electrons in the HEMT. , Fig. 4. Figure 5 shows the conventional HEM
A schematic sectional view showing T, FIG. 6 is a conventional }I shown in FIG.
It is a diagram showing energy bands of electrons in EMT. l... Semi-insulating GaAs substrate, 2... GaAs electrically conductive layer, 2a... Hetero interface,
? -A layer made of GaAs, n-12GaAs electron supply layer, 1l...alternating layer, 12...layer made of GaAs, 1 4--A (lGaAa spacer layer, 16...r
(-GaA8 contact resistance reduction cap layer, l7...source electrode, 18...drain electrode, 19
...Gate electrode. Figure 1

Claims (2)

【特許請求の範囲】[Claims] (1)半導体基板表面上に、上記表面に平行な電気伝導
層を有すると共に、この電気伝導層と上記基板表面との
間に、広い禁制帯幅を有する層と狭い禁制帯幅を有する
層を交互に形成してなる半導体交互層を有する半導体装
置において、 上記広い禁制帯幅を有する層の両側の狭い禁制帯幅を有
する層の層厚が互いに異なることを特徴とする半導体装
置。
(1) Having an electrically conductive layer parallel to the surface on the surface of the semiconductor substrate, and a layer having a wide forbidden band width and a layer having a narrow forbidden band width between this electrically conductive layer and the surface of the substrate. A semiconductor device having alternating semiconductor layers formed alternately, characterized in that the layers having a narrow bandgap on both sides of the layer having a wide bandgap have different thicknesses.
(2)上記半導体交互層を構成する二つの層のうち一方
の層が上記電気伝導層と同一材料からなることを特徴と
する請求項1に記載の半導体装置。
(2) The semiconductor device according to claim 1, wherein one of the two layers constituting the alternating semiconductor layer is made of the same material as the electrically conductive layer.
JP5268589A 1989-03-03 1989-03-03 Semiconductor device Pending JPH02231733A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5268589A JPH02231733A (en) 1989-03-03 1989-03-03 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5268589A JPH02231733A (en) 1989-03-03 1989-03-03 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH02231733A true JPH02231733A (en) 1990-09-13

Family

ID=12921744

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5268589A Pending JPH02231733A (en) 1989-03-03 1989-03-03 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH02231733A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5254863A (en) * 1990-10-19 1993-10-19 U.S. Philips Corp. Semiconductor device such as a high electron mobility transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5254863A (en) * 1990-10-19 1993-10-19 U.S. Philips Corp. Semiconductor device such as a high electron mobility transistor

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