JPH0223117U - - Google Patents

Info

Publication number
JPH0223117U
JPH0223117U JP9721588U JP9721588U JPH0223117U JP H0223117 U JPH0223117 U JP H0223117U JP 9721588 U JP9721588 U JP 9721588U JP 9721588 U JP9721588 U JP 9721588U JP H0223117 U JPH0223117 U JP H0223117U
Authority
JP
Japan
Prior art keywords
transmission gate
input
conduction
output terminal
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9721588U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9721588U priority Critical patent/JPH0223117U/ja
Publication of JPH0223117U publication Critical patent/JPH0223117U/ja
Pending legal-status Critical Current

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  • Logic Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案によるリング・オシレータの一
実施例を示すレジスタレベル論理回路図、第2図
は第1図例で使用している反転手段の構成を具体
的に示すゲートレベル論理回路図、第3図は従来
のリング・オシレータを示すゲートレベル論理回
路図である。 1……インバータ、2……反転手段、3……入
力端子、4,5……伝送ゲート、6……電源電圧
入力端子、7……出力端子。
FIG. 1 is a register level logic circuit diagram showing an embodiment of the ring oscillator according to the present invention, FIG. 2 is a gate level logic circuit diagram specifically showing the configuration of the inverting means used in the example of FIG. 1, FIG. 3 is a gate level logic circuit diagram showing a conventional ring oscillator. DESCRIPTION OF SYMBOLS 1...Inverter, 2...Inverting means, 3...Input terminal, 4, 5...Transmission gate, 6...Power supply voltage input terminal, 7...Output terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力端子と、該入力端子を介して入力信号が供
給されるインバータと、上記入力信号及び上記イ
ンバータの出力信号によつて導通、非導通が制御
され、且つ、その入力端子に一方のレベルの電圧
が入力される第1の伝送ゲートと、該第1の伝送
ゲートと逆動作を行うように導通、非導通を制御
され、且つ、その入力端子に他方のレベルの電圧
が入力される第2の伝送ゲートと、上記第1の伝
送ゲートの出力端子及び上記第2の伝送ゲートの
出力端子が共通接続された出力端子とを設け、該
出力端子に上記入力信号の反転信号を得るように
した反転手段を奇数個、リング状に接続して成る
リング・オシレータ。
an input terminal, an inverter to which an input signal is supplied via the input terminal, conduction or non-conduction is controlled by the input signal and the output signal of the inverter, and a voltage of one level is applied to the input terminal. a first transmission gate to which is input, and a second transmission gate whose conduction or non-conduction is controlled so as to perform an operation opposite to that of the first transmission gate, and whose input terminal receives a voltage at the other level. An inversion device comprising a transmission gate and an output terminal to which an output terminal of the first transmission gate and an output terminal of the second transmission gate are commonly connected, and an inverted signal of the input signal is obtained at the output terminal. A ring oscillator consisting of an odd number of devices connected in a ring.
JP9721588U 1988-07-22 1988-07-22 Pending JPH0223117U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9721588U JPH0223117U (en) 1988-07-22 1988-07-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9721588U JPH0223117U (en) 1988-07-22 1988-07-22

Publications (1)

Publication Number Publication Date
JPH0223117U true JPH0223117U (en) 1990-02-15

Family

ID=31322492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9721588U Pending JPH0223117U (en) 1988-07-22 1988-07-22

Country Status (1)

Country Link
JP (1) JPH0223117U (en)

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