JPS61122574U - - Google Patents

Info

Publication number
JPS61122574U
JPS61122574U JP599785U JP599785U JPS61122574U JP S61122574 U JPS61122574 U JP S61122574U JP 599785 U JP599785 U JP 599785U JP 599785 U JP599785 U JP 599785U JP S61122574 U JPS61122574 U JP S61122574U
Authority
JP
Japan
Prior art keywords
inverter
variable resistor
channel mos
power supply
voltage detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP599785U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP599785U priority Critical patent/JPS61122574U/ja
Publication of JPS61122574U publication Critical patent/JPS61122574U/ja
Pending legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案による一実施例を示す回路図、
第2図は同実施例の動作を説明するためのタイミ
ングチヤート、第3図は電圧検出回路の基本回路
図、第4図は第3図の回路における各点と電源電
圧との関係を示す図である。 T,T:PチヤネルMOSトランジスタ、
,T:NチヤネルMOSトランジスタ、R
:可変抵抗、F,F,F:Dフリツプフロ
ツプ、S:サンプリング信号。
FIG. 1 is a circuit diagram showing an embodiment of the present invention;
Fig. 2 is a timing chart for explaining the operation of the same embodiment, Fig. 3 is a basic circuit diagram of the voltage detection circuit, and Fig. 4 is a diagram showing the relationship between each point in the circuit of Fig. 3 and the power supply voltage. It is. T 1 , T 2 : P channel MOS transistor,
T 3 , T 4 : N channel MOS transistor, R
: variable resistor, F 1 , F 2 , F 3 : D flip-flop, S: sampling signal.

Claims (1)

【実用新案登録請求の範囲】 a P及びNチヤネルMOSトランジスタが接続
されてなるインバータと、 b 上記インバータの入力側に接続された可変抵
抗と、 c 上記可変抵抗と電源に直列に接続されたスイ
ツチング素子と、 d 上記スイツチング素子に電圧検出のサンプリ
ングのタイミングを与えるサンプリング信号発生
回路とを備えてなることを特徴とする電圧検出回
路。
[Claims for Utility Model Registration] a. An inverter in which P and N channel MOS transistors are connected; b. A variable resistor connected to the input side of the inverter; c. A switching device connected in series with the variable resistor and a power supply. d) a sampling signal generation circuit that provides sampling timing for voltage detection to the switching element.
JP599785U 1985-01-18 1985-01-18 Pending JPS61122574U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP599785U JPS61122574U (en) 1985-01-18 1985-01-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP599785U JPS61122574U (en) 1985-01-18 1985-01-18

Publications (1)

Publication Number Publication Date
JPS61122574U true JPS61122574U (en) 1986-08-01

Family

ID=30483029

Family Applications (1)

Application Number Title Priority Date Filing Date
JP599785U Pending JPS61122574U (en) 1985-01-18 1985-01-18

Country Status (1)

Country Link
JP (1) JPS61122574U (en)

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