JPS6343213U - - Google Patents
Info
- Publication number
- JPS6343213U JPS6343213U JP13739586U JP13739586U JPS6343213U JP S6343213 U JPS6343213 U JP S6343213U JP 13739586 U JP13739586 U JP 13739586U JP 13739586 U JP13739586 U JP 13739586U JP S6343213 U JPS6343213 U JP S6343213U
- Authority
- JP
- Japan
- Prior art keywords
- inverter
- turned
- output terminals
- main circuit
- switching element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Control Of Electrical Variables (AREA)
- Power Conversion In General (AREA)
Description
第１図は本考案の一実施例を示す回路図、第２
図は同電圧・電流波形図、第３図は従来のインバ
ータ装置を示す原理的回路図、第４図は同電圧・
電流波形図である。
図面中、１０は商用電源、１５はインバータ主
回路、１６〜１９はトランジスタ（スイツチング
素子）、２０はモータ、２１，２４は抵抗、２２
，２５はトランジスタ（スイツチング素子）、２
３，２６は第１及び第２の無効電力消費回路であ
る。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure shows the same voltage and current waveforms, Figure 3 is a principle circuit diagram showing a conventional inverter device, and Figure 4 shows the same voltage and current waveforms.
It is a current waveform diagram. In the drawing, 10 is a commercial power supply, 15 is an inverter main circuit, 16 to 19 are transistors (switching elements), 20 is a motor, 21 and 24 are resistors, and 22
, 25 is a transistor (switching element), 2
3 and 26 are first and second reactive power consumption circuits.
Claims (1)
タイミングでオンオフさせることにより出力端子
間に交流電圧を出力するようにしたものにおいて
、前記出力端子間に抵抗とスイツチング素子とを
直列に有する無効電力消費回路を設け、そのスイ
ツチング素子を、前記インバータ主回路の各スイ
ツチング素子が全てオフ状態になつたときにオン
させるようにしたことを特徴とするインバータ装
置。 In an inverter that outputs an alternating current voltage between output terminals by turning on and off switching elements of the main circuit at predetermined timing, a reactive power consumption circuit having a resistor and a switching element in series is provided between the output terminals. An inverter device characterized in that the switching element is turned on when all the switching elements of the inverter main circuit are turned off.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13739586U JPS6343213U (en) | 1986-09-08 | 1986-09-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13739586U JPS6343213U (en) | 1986-09-08 | 1986-09-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6343213U true JPS6343213U (en) | 1988-03-23 |
Family
ID=31041405
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13739586U Pending JPS6343213U (en) | 1986-09-08 | 1986-09-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6343213U (en) |
-
1986
- 1986-09-08 JP JP13739586U patent/JPS6343213U/ja active Pending
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