JPH02222192A - Wiring pattern for printed board - Google Patents

Wiring pattern for printed board

Info

Publication number
JPH02222192A
JPH02222192A JP4486989A JP4486989A JPH02222192A JP H02222192 A JPH02222192 A JP H02222192A JP 4486989 A JP4486989 A JP 4486989A JP 4486989 A JP4486989 A JP 4486989A JP H02222192 A JPH02222192 A JP H02222192A
Authority
JP
Japan
Prior art keywords
land
soldering
divided
lands
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4486989A
Other languages
Japanese (ja)
Inventor
Atsushi Kozai
小財 淳
Makoto Shiomi
誠 塩見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP4486989A priority Critical patent/JPH02222192A/en
Publication of JPH02222192A publication Critical patent/JPH02222192A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To check an electric conductive state between lands, and to decide where soldering is defective or nondefective by using the land divided into two or more as one land to one terminal of a component and constituting the wiring pattern of a printed board. CONSTITUTION:A land 1 is divided into two as split lands 1a and 1b, and normal soldering to the land 1 of the terminal 2 of an electronic component is made sure by an electric conductive state between the lands 1a and 1b. Consequently, when the terminal 2 is soldered only to one land 1a due to the displacement of the electronic component, the lands 1a and 1b are not conducted, and defective soldering is decided. Accordingly, defective or nondefective soldering can be decided by checking the electric conductive state between the lands.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、面実装用のプリント基板の配線路パターンに
関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a wiring path pattern for a printed circuit board for surface mounting.

〔従来技術〕[Prior art]

面実装部品をプリント基板に実装するために従来より第
5図に示すように部品実装用ランドパターン(以下、ラ
ンドと呼ぶ)を使用し、このランド上にクリーム状の半
田を塗布し加熱することによって部品10の端子11と
該ランド12との半田付けを行うものであるが、部品の
ズレまたは浮きが発生した場合で特にそのズレまたは浮
きが部分的な場合にはそれらの欠陥を半田不良として検
出できないことが多かった。それらの事例は第6図(a
)及び第6図(b)に示す通りであり、まず、第6図(
a)は電子部品のズレによって端子a1とランドb1と
が接触しているものへ両者の半田付けは不充分である状
態を示し、この場合、−時的な電気的接触が端子a1−
ランドb1間にあるため検査工程で良品と判定されるも
後の工程か完成品の使用中に接触不良となってしまう恐
れがある。第6図(b)は電子部品の端子a2がランド
b2上で浮いている状態を示し、この場合にも第6図(
a)と同じ問題を持つものである。
Conventionally, in order to mount surface mount components on a printed circuit board, a component mounting land pattern (hereinafter referred to as a land) is used as shown in Figure 5, and creamy solder is applied and heated on this land. The terminal 11 of the component 10 and the land 12 are soldered by the method, but if the component shifts or lifts, especially if the shift or lift is only partial, these defects are treated as soldering defects. It was often undetectable. Those cases are shown in Figure 6 (a
) and Fig. 6(b). First, Fig. 6(
A) shows a state in which the terminal a1 and the land b1 are in contact with each other due to misalignment of the electronic components, and the soldering between the two is insufficient.
Since it is located between the lands b1, even if it is determined to be a good product in the inspection process, there is a risk that a contact failure will occur in a later process or during use of the finished product. FIG. 6(b) shows a state in which the terminal a2 of the electronic component is floating on the land b2, and in this case also, as shown in FIG.
This has the same problem as a).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本考案は、上述のように部品のズレまたは浮きが部分的
なものであってもそれらを半田不良として確実に検出で
きるようするものである。
As described above, the present invention allows parts to be reliably detected as solder defects even if they are partially displaced or lifted.

〔問題点を解決するための手段〕[Means for solving problems]

本発明では、部品の端子の一つに対して電気的に接続さ
れ少なくとも2つ以上に分割されたランドを1ランドど
してプリント基板の配線路パタンを構成することによっ
て上記の問題点を解決するものである。
In the present invention, the above-mentioned problem is solved by configuring the wiring path pattern of the printed circuit board by forming a land that is electrically connected to one of the terminals of the component and divided into at least two parts. It is something to do.

〔作用〕[Effect]

本発明では、分割されたランド間の電気導通状態をチエ
ツクすることによって端子−ランド間の半田付は状態の
良否を判定するものである。
In the present invention, the quality of the soldering between the terminal and the land is determined by checking the state of electrical continuity between the divided lands.

〔実施例〕〔Example〕

第1図は、本発明の実施例を示すものでランド1は分割
ランド1aと分割ランド1bに2分割されており同図示
のように電子部品の端子2がランド1と正常に半田例け
が為されていることは分割ランド1aと分割ランド1b
間に電気的導通状態があることをもって確認されるもの
である。第2図(a)、第2図(b)、第3図(a)、
第3図(b)は本発明の実施例を補足説明するた袷のも
ので、まず、第2図(a)及び第2図(b)は電子部品
のズレによって電子部品の端子2が一方の分割ランド1
aとのみ半田例けが為されている状態を示し、この場合
はその検査時に分割ランド1aと分割ランド1b間に電
気的導通状態がないことをもって半田付けが不良である
と判定される。また、第3図(a)及び第3図(b)電
子部品の浮きにより電子部品の端子2が一方の分割ラン
ド1aとのみ半田(−1けが為されている状態を示し、
この端子a2が分割ランドb21で浮いている状態を示
し、この場合においてもズレによる半田不良の場合と同
様に不良の判定がされろ。第4図は本発明の他の実施例
を示しランド3は分割ランド3a、分割ランド3b、分
割ランド3c、分割ランド3dとに4分割されており同
図示のように電子部品の端子4がランド3と正常に半田
(=Iけが為されているか否かは、全分割ランド3a乃
至3a間に総て電気的導通状態がある否かをもって確認
される。従って、この実施例によれば第1の実施例より
もシビャーな半田付は状態の良否の判定が出来るもので
ある。
FIG. 1 shows an embodiment of the present invention, in which a land 1 is divided into two parts, a divided land 1a and a divided land 1b, and as shown in the figure, the terminal 2 of an electronic component can be connected to the land 1 normally to avoid soldering injuries. What is done is divided land 1a and divided land 1b.
This is confirmed by the presence of electrical continuity between the two. Figure 2 (a), Figure 2 (b), Figure 3 (a),
FIG. 3(b) is a supplementary explanation of the embodiment of the present invention. First, FIGS. 2(a) and 2(b) show that the terminal 2 of the electronic component is shifted to one side due to misalignment of the electronic component. division land 1
Only the symbol "a" indicates a state in which the solder is damaged, and in this case, it is determined that the soldering is defective based on the fact that there is no electrical continuity between the divided lands 1a and 1b during the inspection. In addition, FIGS. 3(a) and 3(b) show a state in which the terminal 2 of the electronic component is soldered (-1) only to one divided land 1a due to the floating of the electronic component,
This shows a state in which the terminal a2 is floating on the divided land b21, and in this case as well, a defective determination is made in the same way as in the case of a soldering defect due to misalignment. FIG. 4 shows another embodiment of the present invention, and the land 3 is divided into four parts: a divided land 3a, a divided land 3b, a divided land 3c, and a divided land 3d.As shown in the figure, the terminal 4 of the electronic component is connected to the land. 3 and whether soldering (=I) has been performed normally is confirmed by checking whether or not there is electrical continuity between all the divided lands 3a to 3a. Therefore, according to this embodiment, the first The soldering is more severe than the embodiment described above, and it is possible to judge whether the condition is good or bad.

〔発明の効果〕〔Effect of the invention〕

以上のように、本発明によれば、プリント基板の配線路
パターンのラント部を互いに絶縁され2分割以上される
ものとして形成しそれら分割されたランド間の電気導通
状態をチエツクすることによって端子−ラント間の半田
イ」け状態の良否を判定するものであるから、部品のズ
レまたは浮きに起因する不完全な半田付は状態のものを
半田不良として確実に検出できるものである。
As described above, according to the present invention, the runt portions of the wiring path pattern of a printed circuit board are formed into two or more parts that are insulated from each other, and the electrical continuity between the divided lands is checked. Since the soldering condition between the runts is judged to be good or bad, incomplete soldering caused by misalignment or lifting of components can be reliably detected as defective soldering.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の実施例を示す斜視図、第2図(a)
、’第2図(b)、第3図(a)、第3図(b)は本発
明の実施例を補足説明するた杓のもので第2図(a)は
平面図、第2図(b)は側面断面図、第3図(a)は平
面図、第3図(b)は側面断面図であり、第4図は本発
明の他の実施例を示す斜視図、第5図は従来例を示す斜
視図、第6図(a)及び第6図(b)は従来例を説明す
るだめの断面図である。
FIG. 1 is a perspective view showing an embodiment of the present invention, FIG. 2(a)
,' Fig. 2(b), Fig. 3(a), and Fig. 3(b) are supplementary explanations of the embodiments of the present invention, and Fig. 2(a) is a plan view, and Fig. 2(a) is a plan view. 3(b) is a side sectional view, FIG. 3(a) is a plan view, FIG. 3(b) is a side sectional view, FIG. 4 is a perspective view showing another embodiment of the present invention, and FIG. 6 is a perspective view showing a conventional example, and FIGS. 6(a) and 6(b) are sectional views for explaining the conventional example.

Claims (1)

【特許請求の範囲】[Claims] (1)互いに絶縁され2分割以上されるランド部を備え
てなるプリント基板の配線路パターン。
(1) A wiring route pattern of a printed circuit board comprising land portions that are mutually insulated and divided into two or more parts.
JP4486989A 1989-02-22 1989-02-22 Wiring pattern for printed board Pending JPH02222192A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4486989A JPH02222192A (en) 1989-02-22 1989-02-22 Wiring pattern for printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4486989A JPH02222192A (en) 1989-02-22 1989-02-22 Wiring pattern for printed board

Publications (1)

Publication Number Publication Date
JPH02222192A true JPH02222192A (en) 1990-09-04

Family

ID=12703505

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4486989A Pending JPH02222192A (en) 1989-02-22 1989-02-22 Wiring pattern for printed board

Country Status (1)

Country Link
JP (1) JPH02222192A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0563345A (en) * 1991-09-03 1993-03-12 Nec Corp Printed board
JPH0528075U (en) * 1991-09-20 1993-04-09 日本電気株式会社 Printed wiring board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0563345A (en) * 1991-09-03 1993-03-12 Nec Corp Printed board
JPH0528075U (en) * 1991-09-20 1993-04-09 日本電気株式会社 Printed wiring board

Similar Documents

Publication Publication Date Title
US6729532B2 (en) Component mounting method
US6054720A (en) Apparatus and method for evaluating the surface insulation resistance of electronic assembly manufacture
JPH02222192A (en) Wiring pattern for printed board
JP2613981B2 (en) Inspection method of printed wiring board
JPH0744043Y2 (en) Printed wiring board
KR910006317Y1 (en) Printed circuit board
JP2002299805A (en) Method of checking circuit board and mounting position
WO2001097577A1 (en) Printed circuit board
JP2914980B2 (en) Surface mounting structure of multi-terminal electronic components
JP2003115648A (en) Printed circuit board and method for forming test land of printed circuit board
JPH0144035B2 (en)
JPS5844603Y2 (en) printed wiring board
JPH01120890A (en) Printed wiring board having modified wiring
JPH10294339A (en) Printed-circuit board for mounting bga-type mounted part
JPH0350889A (en) Printed wiring board
JPS5957491A (en) Printed board
JPS59225588A (en) Multilayer thick film circuit board
KR19980083195A (en) Bonding method of BGA package and printed circuit board
JPH07176857A (en) Electrode connecting structure of printed wiring board
JPH055765A (en) Detecting method of presence/absence of printing in printed circuit board
JPH0521924A (en) Printed wiring board with land for inspection
JPS62279693A (en) Printed board
JPH07123188B2 (en) Method for detecting misalignment of multilayer printed circuit board
JPH07307559A (en) Soldering structure and method of electronic component
JPH06268346A (en) Printed wiring board