JPS59225588A - Multilayer thick film circuit board - Google Patents
Multilayer thick film circuit boardInfo
- Publication number
- JPS59225588A JPS59225588A JP10040583A JP10040583A JPS59225588A JP S59225588 A JPS59225588 A JP S59225588A JP 10040583 A JP10040583 A JP 10040583A JP 10040583 A JP10040583 A JP 10040583A JP S59225588 A JPS59225588 A JP S59225588A
- Authority
- JP
- Japan
- Prior art keywords
- thick film
- wiring pattern
- multilayer thick
- circuit board
- film circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔発明の属する技術分野〕
本発明は集積回路素子搭載用に使用される多層厚膜配線
基板に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a multilayer thick film wiring board used for mounting integrated circuit elements.
従来、ハイブリッド集積回路に使用する多層厚膜配線基
板に於て、第１図に示すようにセラミック基板上１に下
部配線パターン２．絶縁層３．導電体４．上部配線パタ
ーン５．絶縁層６．導電体７の順で形成された製造途中
の段階で、製造不良によって発生する配線パターンの断
線及び短絡等を検査するために、接続検査が行なわれて
いる。Conventionally, in a multilayer thick film wiring board used for a hybrid integrated circuit, as shown in FIG. 1, a lower wiring pattern 2 is formed on a ceramic substrate 1. Insulating layer 3. Conductor 4. Upper wiring pattern 5. Insulating layer 6. A connection test is performed during the manufacturing process when the conductors 7 are formed in order to check for disconnections, short circuits, etc. in the wiring pattern caused by manufacturing defects.
そして、この接続検査結果に基づく、配線パターンの不
良箇所の発見及び修正に配線パターン２．５が絶縁層３
，６で覆われ半透明なため透過光が使用されている。Based on this connection inspection result, the wiring pattern 2.5 is connected to the insulating layer 3 to discover and correct defective parts of the wiring pattern.
, 6 and is semi-transparent, transmitted light is used.
第２図は従来の一例を示すもので、配線基板の ・裏
から光を照射した時の光の透過状態を示す部分拡大図で
あり、下部配線パターン２と上部配線パターン５が、同
じパターン巾で交差して見えるため上下配線パターンの
判別が難かしく、不良箇所の発見及び修正に長い時間が
必要であり、時には。Figure 2 shows an example of the conventional method, and is a partially enlarged view showing the state of light transmission when light is irradiated from the back side of the wiring board, and the lower wiring pattern 2 and the upper wiring pattern 5 have the same pattern width. Because they appear to intersect, it is difficult to distinguish between the upper and lower wiring patterns, and it sometimes takes a long time to find and correct defective locations.
誤って、目的以外の部分を修正することもあった。Sometimes I accidentally edited parts that were not intended.
又、配線パターンが微細な場合には、顕微鏡を使用する
が、このような場合は、特に視野も極めて狭くなり、上
拳下配線パターンの判別が非常に困難であった。Further, when the wiring pattern is minute, a microscope is used, but in such a case, the field of view becomes extremely narrow, making it extremely difficult to distinguish between upper and lower wiring patterns.
本発明は下部配線パターン巾と上部配線パターン巾を変
えることによって、上記欠点を除去し７た多層厚膜配線
基板を提供することにある。An object of the present invention is to provide a multilayer thick film wiring board that eliminates the above drawbacks by changing the width of the lower wiring pattern and the width of the upper wiring pattern.
本発明によると、光の透過可能な多層厚膜配線基板に於
いて、下部配線パターンと一ヒ部配腺パターンとの配線
パターン中を変えることを特徴と子る多層厚膜配線基板
が得られる。According to the present invention, there is obtained a multilayer thick film wiring board that is characterized by changing the wiring pattern between the lower wiring pattern and the partial gland wiring pattern in the multilayer thick film wiring board through which light can pass. .
次Ｋ、本発明の一実施例について図面を参照して詳細に
説明する。第３図は、本発明による配線基板の実施例の
ものの配線基板の下から光を照射したときの光の透過状
態金示す平面図である。本実施例の基板を作成するには
、配線基板形成時に、下部配線パターン２と上部配線パ
ターン５との配線パターン中を変えることで行なわれる
。Next, one embodiment of the present invention will be described in detail with reference to the drawings. FIG. 3 is a plan view showing the transmission state of light when light is irradiated from below the wiring board of an embodiment of the wiring board according to the present invention. The substrate of this embodiment is manufactured by changing the wiring pattern between the lower wiring pattern 2 and the upper wiring pattern 5 when forming the wiring board.
すなわち、上下で配線パターンの巾が異なっていれば、
透過光により上下配線パターンス５が同時に交差して見
えても、パターン巾の違いを認識することで上下配線パ
ターンの区別を容易に出来るため修正時の作票時間を短
縮し作業品質を向上させることができる。又、顕微鏡等
の拡大器を使用する場合管視野の極めて狭い時の効果は
大である。In other words, if the width of the upper and lower wiring patterns is different,
Even if the upper and lower wiring patterns 5 appear to intersect at the same time due to transmitted light, it is possible to easily distinguish between the upper and lower wiring patterns by recognizing the difference in pattern width, thereby shortening the preparation time during correction and improving work quality. be able to. Furthermore, when using a magnifying device such as a microscope, the effect is great when the field of view of the tube is extremely narrow.
本発明によると、以上説明したように、厚膜配線基板に
於いて、上下配線パターンの判別が容易になるため修正
時の作業時間の短縮と作業品質の向上という効果がある
。According to the present invention, as described above, in a thick film wiring board, it is easy to distinguish between upper and lower wiring patterns, so that there is an effect of shortening the work time during correction and improving the work quality.
第１図、第２図は従来の多層厚膜配線基板の断面図と、
配線基板の下から元を照射したときに見える配線基板上
部からの平面部分拡大図、第３図は本発明の一実施例の
ものの配線基板の下から光を照射したときに見える配線
基板上部からの平面部分拡大図である。１・・・・・・
基板、２・・・・・・下部配線パターン、３，６・・・
・・・絶縁層、５・・・・・・上部配線パターン、４．
７・・・・・・導電体。
代理人 弁理士 内 原 晋ｊFigures 1 and 2 are cross-sectional views of a conventional multilayer thick film wiring board,
FIG. 3 is an enlarged plan view of the upper part of the wiring board seen when the original is irradiated from below the wiring board, and FIG. FIG. 1...
Board, 2... Lower wiring pattern, 3, 6...
. . . Insulating layer, 5 . . . Upper wiring pattern, 4.
7... Conductor. Agent Patent Attorney Susumu Uchihara
Claims (1)
ターンと上部配線パターンとの配線パターン巾を変える
ことを特徴とする多層厚膜配線基板。A multilayer thick film wiring board through which light can pass, characterized in that the wiring pattern widths of a lower wiring pattern and an upper wiring pattern are changed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10040583A JPS59225588A (en) | 1983-06-06 | 1983-06-06 | Multilayer thick film circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10040583A JPS59225588A (en) | 1983-06-06 | 1983-06-06 | Multilayer thick film circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59225588A true JPS59225588A (en) | 1984-12-18 |
Family
ID=14273066
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10040583A Pending JPS59225588A (en) | 1983-06-06 | 1983-06-06 | Multilayer thick film circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59225588A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019172336A1 (en) * | 2018-03-08 | 2019-09-12 | 京セラ株式会社 | Light emitting element mounting substrate and light emitting device |
-
1983
- 1983-06-06 JP JP10040583A patent/JPS59225588A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019172336A1 (en) * | 2018-03-08 | 2019-09-12 | 京セラ株式会社 | Light emitting element mounting substrate and light emitting device |
| JPWO2019172336A1 (en) * | 2018-03-08 | 2021-03-25 | 京セラ株式会社 | Substrate for mounting light emitting element and light emitting device |
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