JP2605497Y2 - Printed wiring board for surface mounting - Google Patents

Printed wiring board for surface mounting

Info

Publication number
JP2605497Y2
JP2605497Y2 JP1993050779U JP5077993U JP2605497Y2 JP 2605497 Y2 JP2605497 Y2 JP 2605497Y2 JP 1993050779 U JP1993050779 U JP 1993050779U JP 5077993 U JP5077993 U JP 5077993U JP 2605497 Y2 JP2605497 Y2 JP 2605497Y2
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
package
surface mounting
pga
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1993050779U
Other languages
Japanese (ja)
Other versions
JPH0718462U (en
Inventor
奉正 佐山
秀行 田端
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Priority to JP1993050779U priority Critical patent/JP2605497Y2/en
Publication of JPH0718462U publication Critical patent/JPH0718462U/en
Application granted granted Critical
Publication of JP2605497Y2 publication Critical patent/JP2605497Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【考案の詳細な説明】[Detailed description of the invention]

【0001】[0001]

【産業上の利用分野】この考案は、プリント配線基板上
に電子部品等を表面実装した場合のハンダ接合部の検査
を容易にする表面実装用プリント配線基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board for surface mounting which facilitates inspection of a solder joint when electronic components or the like are surface mounted on the printed wiring board.

【0002】[0002]

【従来の技術】電子機器の小型軽量化、高性能化に伴
い、電子部品は益々軽薄短小化し、高密度実装技術も目
を見張る進歩をしている。特に半導体の高密度大規模集
積回路(以下「ULSI」という)の集積度は格段に向
上し小さなパッケージにULSIをモジュールし、多く
の接続リードピンが取り付けられている。例えば表面実
装用ゲートアレイLSIに、SM−PGA(Surface Mou
nt Type Pin Grid Array)パッケージにモールドされて
いるのがあり、その大きさは、35mm×35mmで、
リードピン数は441ピンのものや368ピンのものが
ある。リードピンは1.27mmピッチで、5列でもっ
て周囲を一周している。これを表面実装用プリント配線
基板上に実装する。プリント配線基板の実装部分には、
予め導体パターン(銅箔)が形成されており、この上に
ハンダが塗布されている。その上に予めリードピンに予
備ハンダされたSM−PGAパッケージを乗せて加熱す
ると、ハンダが熔けてハンダ付けされる。一方、ULS
I等の電子回路の動作は、正確なもので、1ケ所でもハ
ンダ不良の場所があると正常な動作はしないし、不良品
となる。従って通常はハンダ付けの後にその良否の判定
を必ず目視検査でチェックする。
2. Description of the Related Art As electronic devices have become smaller and lighter and have higher performance, electronic components have become lighter, thinner and shorter, and high-density packaging technology has made remarkable progress. In particular, the integration density of a semiconductor high-density large-scale integrated circuit (hereinafter, referred to as “ULSI”) is remarkably improved, and the ULSI is moduled in a small package, and many connection lead pins are attached. For example, an SM-PGA (Surface Mou)
(nt Type Pin Grid Array) There is molded in the package, its size is 35mm × 35mm,
The number of lead pins is 441 or 368. The lead pins have a pitch of 1.27 mm and make a round around the periphery in five rows. This is mounted on a printed wiring board for surface mounting. In the mounting part of the printed wiring board,
A conductor pattern (copper foil) is formed in advance, and solder is applied thereon. When an SM-PGA package preliminarily soldered is placed on a lead pin and heated, the solder melts and is soldered. On the other hand, ULS
The operation of the electronic circuit such as I is accurate, and if there is even one solder defective place, the circuit does not operate normally and becomes a defective product. Therefore, usually, after soldering, the quality determination is always checked by visual inspection.

【0003】図2にSM−PGAパッケージ1のハンダ
付け後の従来の検査方法を示す。SM−PGAパッケー
ジ1は、プリント配線基板4の導体パターンにリードピ
ン2を介してハンダ接続部3でハンダ付けされている。
SM−PGAパッケージ1とプリント配線基板4との間
隔は、1.5mm前後で、ここに、441ピンのリード
ピン2がハンダ付けされている。この状態では、通常の
方法では目視検査することができない。そこで、SM−
PGAパッケージ1の下面のハンダ接合部3を鏡6で反
射させ実体顕微鏡5を用いて上から覗きこみ、拡大観察
して、その良否を判断している。しかしながら、SM−
PGAパッケージ1の縦・横の寸法が大きくなればなる
程、また、リードピン2の長さが短くなればなる程、S
M−PGAパッケージ1下方の照明光が弱くなり、照明
光が不足して暗くなり、ハンダ接続部3の検査が困難に
なり、検査ミスが生じるようになってきた。また、この
ように照明光が不足するパッケージには、SM−PGA
パッケージ1の他に、Jリードパッケージ、SOJパッ
ケージやPLCCパッケージ等がある。
FIG. 2 shows a conventional inspection method after soldering of the SM-PGA package 1. The SM-PGA package 1 is soldered to a conductor pattern of a printed wiring board 4 via a lead pin 2 at a solder connection portion 3.
The distance between the SM-PGA package 1 and the printed wiring board 4 is about 1.5 mm, and 441 lead pins 2 are soldered here. In this state, visual inspection cannot be performed by a normal method. Then, SM-
The solder joint 3 on the lower surface of the PGA package 1 is reflected by a mirror 6 and peeped from above using a stereoscopic microscope 5 and magnified to judge the quality. However, SM-
The larger the vertical and horizontal dimensions of the PGA package 1 and the shorter the length of the lead pin 2,
The illumination light below the M-PGA package 1 is weakened, the illumination light is insufficient and the illumination becomes dark, and the inspection of the solder connection part 3 becomes difficult, and an inspection error occurs. In addition, such a package having insufficient illumination light includes SM-PGA.
In addition to the package 1, there are a J-lead package, an SOJ package, a PLCC package, and the like.

【0004】[0004]

【考案が解決しようとする課題】本考案は、SM−PG
Aパッケージ1等の下面の照明光を、出来得る限り明る
くする表面実装用プリント配線基板を提供する。
[Problems to be solved by the invention] The invention is based on SM-PG
Provided is a printed circuit board for surface mounting which makes illumination light on the lower surface of the A package 1 or the like as bright as possible.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
に、本考案は、SM−PGAパッケージ1の下方のプリ
ント配線基板に、電気配線に影響のない範囲で光の乱反
射が大きいものを、印刷、塗布または張り付けを行な
い、反射光を比較的明るくさせる。
In order to achieve the above-mentioned object, the present invention provides a printed circuit board under the SM-PGA package 1 which has a large irregular reflection of light within a range not affecting electric wiring. Print, apply or paste to make the reflected light relatively bright.

【0006】[0006]

【実施例】本考案の一実施例を図1(A)及び図1
(B)に示す。図1(A)は、横断面図であり、図1
(B)は上面図である。SM−PGAパッケージ1は、
リードピン2がパッケージの周辺を441ピンが5列で
もって一周している。従って中央部7にはピン無しの部
分が存在する。この部分を利用して、照明光が最も乱反
射しやすい物体を印刷あるいは張り付けする。
FIG. 1A and FIG. 1 show an embodiment of the present invention.
(B) shows. FIG. 1A is a cross-sectional view, and FIG.
(B) is a top view. SM-PGA Package 1 is
The lead pin 2 goes around the periphery of the package in five rows of 441 pins. Therefore, there is a portion without a pin in the central portion 7. Using this portion, an object to which the illumination light is most likely to be irregularly reflected is printed or pasted.

【0007】図1(A)及び図1(B)は、プリント基
板のSM−PGAパッケージ1の下方中央部7に白色ベ
タでシルク印刷した一例である。表面実装用プリント配
線基板4では、部品位置や部品記号を記すためシルク印
刷を通常行っている。従って白色ベタのシルク印刷を追
加しても工数増加にはならずにすむ。そして印刷表面の
凹凸により散乱光が生じ,SM−PGAパッケージ1の
下方が明るくなる。この状態で、鏡6を用いて上方から
実体顕微鏡5で目視検査すると、良く観察できる。
FIGS. 1A and 1B show an example in which the lower central portion 7 of the SM-PGA package 1 of the printed circuit board is silk-printed with a solid white color. On the printed wiring board 4 for surface mounting, silk printing is usually performed in order to mark a component position and a component symbol. Therefore, adding the white solid silk printing does not increase the number of steps. Then, scattered light is generated by the unevenness of the printing surface, and the area below the SM-PGA package 1 becomes bright. In this state, when the visual inspection is carried out with the stereo microscope 5 from above using the mirror 6, it is possible to observe well.

【0008】また、SM−PGAパッケージ1下方の中
央部7のプリント基板4の処理は、白色ベタのシルク印
刷でなくとも、色調の明るいシルク印刷でも同様の効果
が得られる。他の部品位置等のシルク印刷との関係から
最適な塗料を用いればよい。
In the processing of the printed circuit board 4 in the central portion 7 below the SM-PGA package 1, the same effect can be obtained not only in white solid silk printing but also in bright color silk printing. The most suitable paint may be used in relation to the silk printing such as the position of other parts.

【0009】他の方法として、色調の明るい白色のテー
プや金属箔を貼る方法もある。またプリント配線の関係
で、SM−PGAパッケージ1下方の中央部7の位置に
配線が無いときは、プリント配線基板の銅箔を残してお
き、メッキ処理しても同様な効果が得られる。
As another method, there is a method in which a light-colored white tape or metal foil is attached. Further, when there is no wiring at the position of the central portion 7 below the SM-PGA package 1 due to the printed wiring, the same effect can be obtained by leaving the copper foil of the printed wiring board and plating.

【0010】[0010]

【考案の効果】以上説明したように、本考案は、電子部
品、特にSM−PGAパッケージ1等の半導体高密度大
規模集積回路を表面実装するプリント配線基板におい
て、部品を表面実装した後にハンダ付けの良否を目視検
査で容易に確認でき、不良を事前に発見できて、製造ミ
スを無くすことができ、その効果ははなはだ大である。
As described above, according to the present invention, in a printed wiring board on which electronic components, particularly, a semiconductor high-density large-scale integrated circuit such as the SM-PGA package 1 are surface-mounted, the components are surface-mounted and then soldered. Can be easily checked by visual inspection, defects can be found in advance, and manufacturing errors can be eliminated, and the effect is extremely large.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本考案の一実施例の図である。FIG. 1 is a diagram of one embodiment of the present invention.

【図2】従来例の図である。FIG. 2 is a diagram of a conventional example.

【符号の説明】[Explanation of symbols]

1 SM−PGA(Surface Mount Type Pin Grid Arra
y)パッケージ 2 リードピン 3 ハンダ接合部 4 プリント配線基板 5 実体顕微鏡 6 鏡 7 中央部
1 SM-PGA (Surface Mount Type Pin Grid Arra
y) Package 2 Lead pin 3 Solder joint 4 Printed wiring board 5 Stereo microscope 6 Mirror 7 Central part

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H05K 1/02 H05K 1/18 H05K 3/34 512 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H05K 1/02 H05K 1/18 H05K 3/34 512

Claims (1)

(57)【実用新案登録請求の範囲】(57) [Scope of request for utility model registration] 【請求項1】 中央部にリードピンが無く、周辺部に複
数列のリードピンが有る電子部品が表面に実装される
リント配線基板において、前記電子部品が実装される際
に、前記リードピンが無い中央部と対向する前記プリン
ト配線基板の表面に光を乱反射する物体を付したことを
特徴とする表面実装用プリント配線基板。
(1) There is no lead pin at the center and multiple pins at the periphery.
When a printed circuit board on which electronic components having several rows of lead pins are mounted on the surface, the electronic components are mounted
The pudding facing the central part where the lead pins are not provided.
A printed wiring board for surface mounting, wherein an object that diffusely reflects light is attached to the surface of the wiring board.
JP1993050779U 1993-08-25 1993-08-25 Printed wiring board for surface mounting Expired - Lifetime JP2605497Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1993050779U JP2605497Y2 (en) 1993-08-25 1993-08-25 Printed wiring board for surface mounting

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1993050779U JP2605497Y2 (en) 1993-08-25 1993-08-25 Printed wiring board for surface mounting

Publications (2)

Publication Number Publication Date
JPH0718462U JPH0718462U (en) 1995-03-31
JP2605497Y2 true JP2605497Y2 (en) 2000-07-17

Family

ID=12868321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1993050779U Expired - Lifetime JP2605497Y2 (en) 1993-08-25 1993-08-25 Printed wiring board for surface mounting

Country Status (1)

Country Link
JP (1) JP2605497Y2 (en)

Also Published As

Publication number Publication date
JPH0718462U (en) 1995-03-31

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Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20000425