JPH02220330A - Gas discharge panel and method of driving same - Google Patents

Gas discharge panel and method of driving same

Info

Publication number
JPH02220330A
JPH02220330A JP1041251A JP4125189A JPH02220330A JP H02220330 A JPH02220330 A JP H02220330A JP 1041251 A JP1041251 A JP 1041251A JP 4125189 A JP4125189 A JP 4125189A JP H02220330 A JPH02220330 A JP H02220330A
Authority
JP
Japan
Prior art keywords
discharge
electrode
electrodes
pulse
electrode group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1041251A
Other languages
Japanese (ja)
Other versions
JP2629944B2 (en
Inventor
Tsutae Shinoda
傳 篠田
Masato Suzuki
正人 鈴木
Teruo Kurai
倉井 輝夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1041251A priority Critical patent/JP2629944B2/en
Publication of JPH02220330A publication Critical patent/JPH02220330A/en
Application granted granted Critical
Publication of JP2629944B2 publication Critical patent/JP2629944B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Gas-Filled Discharge Tubes (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of Gas Discharge Display Tubes (AREA)

Abstract

PURPOSE:To achieve improved picture-quality and reduction in cost with lesser number of discharge retaining electrodes by forming electrodes in such a manner that each of the discharge electrodes arranged in parallel provided a display cell line with its adjacent electrode on either side of it. CONSTITUTION:Discharge electrodes are arranged in parallel on a base 1 in such a manner that electrodes are led out individually on an alternate basis and X-electrodes are available on both sides of them. On the rear of the base 1 are installed address electrodes A1-A5 via an insulating layer over the discharge electrode group. A barrier 6 is is installed between the center line of each discharge electrode and an address electrode to form a display cell which is a space delimited by the barrier. One Y electrode can drive two lines, with a reduced number of discharge retaining electrodes in use. For driving, provisions are made so that twice the frequency and half the voltage level are provided for retaining voltage pulses to the Y electrode group in conjunction with retaining voltage pulses to each X electrode group.

Description

【発明の詳細な説明】 〔概 要〕 表示装置に用いられるガス放電パネルの改良に関し、特
にAC駆動型面放電型式のプラズマデイスプレィパネル
(F D P)に、おける新しい電極構造と、その駆動
方法に関し、 PDPの放電維持電極の数を減らし、これに伴う駆動回
路を減らしてコストを下げ、画質を向上させることを目
的とし、 絶縁物から成る第1基板と、 該第1基板上に平行に形成した複数本の放電電極と、 該放電電極を被覆する誘電体層と、 該誘電体層上で前記各放電電極の長平方向に沿って当該
放電電極を2分割する位置に形成した障壁と、 前記放電電極と交差する方向に形成したアドレス電極と
、 前記第1基板と対向してそれらの間にガス放電空間を規
定するように配置した第2基板とで構成する。
[Detailed Description of the Invention] [Summary] Regarding the improvement of gas discharge panels used in display devices, in particular, a new electrode structure in AC-driven surface discharge type plasma display panels (FDP) and its drive. Regarding the method, the purpose is to reduce the number of discharge sustaining electrodes of a PDP, reduce the accompanying drive circuit, lower costs, and improve image quality. a plurality of discharge electrodes formed on the discharge electrode, a dielectric layer covering the discharge electrode, and a barrier formed on the dielectric layer at a position dividing each discharge electrode into two along the longitudinal direction of the discharge electrode. , an address electrode formed in a direction intersecting the discharge electrode, and a second substrate disposed opposite to the first substrate so as to define a gas discharge space therebetween.

〔産業上の利用分野〕[Industrial application field]

本発明は、各種表示装置に用いられるガス放電パネルの
改良に関し、特にAC駆動型面放電型弐のプラズマデイ
スプレィパネル(FDP)における新しい電極構造と、
その駆動方法に関するものである。
The present invention relates to the improvement of gas discharge panels used in various display devices, and in particular to a new electrode structure in AC-driven surface discharge type plasma display panels (FDP).
The present invention relates to a driving method thereof.

〔従来の技術〕[Conventional technology]

第3図に従来の面放電型PDPの電極配置図を示す。 FIG. 3 shows an electrode arrangement diagram of a conventional surface discharge type PDP.

第3図に示すように従来の面放電型FDPは、ガス放電
空間を挟んで対向配置した一対の基板の内の一方の基板
上にのみ、2本ずつを対とした平行な放電用の電極X1
〜X、、Y、〜Y、(以下、nは最終の放電電極を表す
)を配列して誘電体層を被覆し、さらにこの電極X1〜
X、、Y、〜Y7と交差する方向に複数本のアドレス電
極Al 〜Ai  (図では1=5)を形成したもので
ある。
As shown in Figure 3, in a conventional surface discharge type FDP, two parallel discharge electrodes are placed only on one of a pair of substrates that are placed opposite each other with a gas discharge space in between. X1
~X,, Y, ~Y, (hereinafter, n represents the final discharge electrode) are arranged to cover the dielectric layer, and further this electrode X1~
A plurality of address electrodes Al to Ai (1=5 in the figure) are formed in a direction intersecting X, Y, to Y7.

このようなFDPでは、放電電極X、−X、1゜Y、〜
Y7のうち、隣接した対となる電極XY間での横方向の
面放電を利用して、表示を行うようにしている。表示の
最小単位は、図中斜線で示した障壁6で区切られた部分
が表示セルとして1ドツトを構成する。またこのような
電極支持基板に対向する形で他方の基板が配置され、そ
の内面に表示セル対応もしくはライン対応に紫外線励起
型の螢光体が設けられてカラー表示をなすようになって
いる。上記アドレス電極はこの他方の基板内面に形成さ
れる場合もある。
In such an FDP, the discharge electrodes X, -X, 1°Y, ~
Display is performed using horizontal surface discharge between adjacent pairs of electrodes XY of Y7. The minimum unit of display is the area divided by the barrier 6 shown by diagonal lines in the figure, which constitutes one dot as a display cell. Further, another substrate is disposed opposite to such an electrode supporting substrate, and an ultraviolet-excitable phosphor is provided on the inner surface of the substrate in correspondence with the display cells or lines so as to provide a color display. The address electrode may be formed on the inner surface of this other substrate.

目的とする情報をこのようなFDPに表示させるには、
第3図の各X、Y放電電極対で挟まれたライン(図中L
1〜Ln)の表示セル1行を一旦全面点灯させる。その
後、不必要に点灯している表示セルを選択消去するため
に、この表示セルを構成する電極対の一方の電極とそれ
に交差するアドレス電極との間で消去放電を起こして、
不必要に点灯している表示セルを消去する。
To display the desired information on such an FDP,
The line sandwiched between each X and Y discharge electrode pair in Figure 3 (L in the figure
1 to Ln) is once completely illuminated. Thereafter, in order to selectively erase display cells that are unnecessarily lit, an erase discharge is caused between one electrode of the pair of electrodes constituting this display cell and an address electrode that intersects with it.
Erase display cells that are unnecessarily lit.

次に、第4図にこの不必要な表示セルを選択消去する時
の各電極に対する印加電圧パルスのタイミングを示す。
Next, FIG. 4 shows the timing of voltage pulses applied to each electrode when selectively erasing unnecessary display cells.

まず、t、のタイミングで第1ラインL1の表示セルを
一旦全面点灯させるために、第1ラインを構成する放電
電極対間に放電開始電圧以上の電圧が加わるように、電
極X1とY、に書込みパルスV□+Vwyを印加する。
First, in order to once fully light up the display cells of the first line L1 at timing t, the electrodes X1 and Y are connected so that a voltage higher than the discharge starting voltage is applied between the pair of discharge electrodes constituting the first line. Apply write pulse V□+Vwy.

そして、この放電点灯を維持するために、X+ 、Y+
放電電極に交互に維持放電パルス■□+V*yを印加す
る。
In order to maintain this discharge lighting, X+, Y+
Sustaining discharge pulses □+V*y are applied alternately to the discharge electrodes.

次に、t2のタイミングで不必要に点灯している表示セ
ルを選択消去するために、その表示セル部分で交差する
アドレス電極AH(iは選択する任意アドレス)とY放
電電極Y、との間に細幅の選択消去パルスV。+v*y
を印加する。この細幅の選択消去パルスによって、不必
要に点灯している当該表示セルの壁電荷を打ち消して、
残った放電表示セルで目的とする情報を表示する。
Next, in order to selectively erase display cells that are unnecessarily lit at the timing t2, between the address electrode AH (i is an arbitrary address to be selected) and the Y discharge electrode Y, which intersect at the display cell portion. A narrow selective erase pulse V is applied. +v*y
Apply. This narrow selective erasing pulse cancels out the wall charge of the display cell that is unnecessarily lit.
The desired information is displayed on the remaining discharge display cells.

同様に、t3のタイミングで2行目L2の表示セルを構
成する電極対Xt、Yz間に書込みパルスを印加して当
該ラインを全点灯させた後、t4のタイミングで選択消
去を行う。
Similarly, at timing t3, a write pulse is applied between the pair of electrodes Xt and Yz constituting the display cells of the second row L2 to completely light up the line, and then selective erasing is performed at timing t4.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、第3図のように、電極を配置したPDPでは、
各表示ラインを2本ずつの電極対で構成しているために
X電極が9本あるとすると、Y電極も1本必ず必要であ
る。従って、大型で繊細な表示画面を得るには、一方の
基板上に配列する電極本数が表示ラインの2倍となり、
駆動回路及びこれに対する外部接続が複雑かつ高価にな
るといった問題を生じていた。
However, in a PDP with electrodes arranged as shown in Figure 3,
If there are nine X electrodes since each display line is composed of two pairs of electrodes, one Y electrode is also required. Therefore, in order to obtain a large and delicate display screen, the number of electrodes arranged on one substrate should be twice the number of display lines.
Problems have arisen in that the drive circuit and its external connections are complex and expensive.

また、X電極が1本に対し、Y電極も必ずn本必要であ
ることから、電極間の距離を狭める妨げとなっており、
画面の解像度が上がらず、画質が向上しないといった問
題もあった。
Additionally, n Y electrodes are always required for every one X electrode, which hinders narrowing the distance between the electrodes.
There were also problems such as the screen resolution not increasing and the image quality not improving.

従って、本発明はFDPの放電維持電極の数を減らし、
これに伴う駆動回路を減らしてコストを下げ、画質を向
上させることを目的とする。
Therefore, the present invention reduces the number of discharge sustaining electrodes of FDP,
The aim is to reduce the number of drive circuits associated with this, lower costs, and improve image quality.

〔課題を解決するための手段〕[Means to solve the problem]

第1図(a)は本発明による面放電PDPの電極配置の
一例を示す平面図である。
FIG. 1(a) is a plan view showing an example of the electrode arrangement of a surface discharge PDP according to the present invention.

本発明では第1図(a)のように、一方の基板上に平行
に配列した各放電電極を隣接した表示セルラインに共用
することを特徴としている。放電電極の中心上と、アド
レス電極の間には各セルを仕切るための障壁6が設けら
れる。そしてこれらの放電電極は、1本おきのY電極群
と該Y電極群の間に交互に挟まれるX1電極群およびX
2電極群の3つの電極群に分けられる。この結果1本お
きの各Y放電電極はXl、Xt放電電極によって挟まれ
、それぞれその両側に隣接する異群の電極との間で表示
セルラインを構成することになる。
The present invention is characterized in that discharge electrodes arranged in parallel on one substrate are shared by adjacent display cell lines, as shown in FIG. 1(a). A barrier 6 for partitioning each cell is provided between the center of the discharge electrode and the address electrode. These discharge electrodes include every other Y electrode group and the X1 electrode group and the X1 electrode group which are alternately sandwiched between the Y electrode groups.
It is divided into three electrode groups: two electrode groups. As a result, every other Y discharge electrode is sandwiched between the Xl and Xt discharge electrodes, and a display cell line is formed between each other and different groups of electrodes adjacent to each other on both sides.

アドレス電極A1〜A! (図では1=5)は従来同様
平行な放電電極の上か、対向する基板内面に設けられる
Address electrodes A1-A! (1=5 in the figure) are provided on the parallel discharge electrodes or on the inner surface of the opposing substrate as in the conventional case.

一方、その駆動方法としては、隣接放電電極間のライン
1行を一旦全面点灯させた後、不必要に点灯している表
示セルを選択消去して必要な表示セルのみを点灯させる
方式を採る。この時、各放電電極は両側の表示セルライ
ンに共用された構成であるので、−本おきのY電極群を
基準としてその一方の側に隣接するXIX電極群の間の
セルラインと、他方の側に隣接するX2電極群との間の
セルラインとで同時に逆向きの放電が行われるようyt
i群への維持電圧パルスを各X電極群への維持電圧パル
スに対して周波数が2倍で電圧レベルが半分になるよう
に設定して駆動する。
On the other hand, as a driving method, a method is adopted in which one line between adjacent discharge electrodes is once completely illuminated, and then unnecessarily illuminated display cells are selectively erased and only necessary display cells are illuminated. At this time, since each discharge electrode is shared by the display cell lines on both sides, the cell line between the XIX electrode group adjacent to one side with every other Y electrode group as a reference, and the cell line between the XIX electrode group adjacent to the other yt so that discharge in the opposite direction is simultaneously performed on the cell line between the X2 electrode group adjacent to the side.
The sustaining voltage pulse to the i group is set and driven so that the frequency is twice the frequency and the voltage level is half that of the sustaining voltage pulse to each X electrode group.

これによって既に点灯している前位ラインの表示セルを
消さないで順次アドレスのための選択的消去パルスの印
加タイミングが設定可能となる。
This makes it possible to set the application timing of selective erasing pulses for sequential addressing without erasing the display cells of the previous line that are already lit.

〔作 用〕[For production]

本発明のパネル構成においては、同一基板上に配設した
平行な放電電極の各々がその両側に隣接する電極との間
で表示セルラインを形成するので、少ない電極本数で高
解像度の表示を達成することができる。
In the panel configuration of the present invention, each of the parallel discharge electrodes disposed on the same substrate forms a display cell line with adjacent electrodes on both sides, so high resolution display is achieved with a small number of electrodes. can do.

また、本発明の駆動方法によれば、駆動のための電極端
子数を極力少なくして誤動作のない表示が可能となる。
Further, according to the driving method of the present invention, display without malfunction can be achieved by minimizing the number of electrode terminals for driving.

〔実施例〕 第1図(a)、  (b)及び第2図を用いて本発明の
一実施例を説明する。第1図(a)は本発明の一実施例
のFDPを、基板に対し垂直な方向からみた電極配置の
平面図であり、第1図(b)はその断面図である。また
、第2図は一実施例のPDPの駆動方法を説明するため
のタイムチャートである。
[Embodiment] An embodiment of the present invention will be described using FIGS. 1(a) and 2(b) and FIG. FIG. 1(a) is a plan view of the electrode arrangement of an FDP according to an embodiment of the present invention, viewed from a direction perpendicular to the substrate, and FIG. 1(b) is a sectional view thereof. Further, FIG. 2 is a time chart for explaining a method of driving a PDP according to an embodiment.

第1図(a)において、XI 、xz 、Y、 〜Y、
lの各放電電極は、隣接する電極間で互いに表示セルラ
インを構成するよう同一基板面上に平行に配列されてお
り、その上方に絶縁関係を保って交差する方向のアドレ
ス電極A1〜Asがある。また、Xl、Xi 、Y+−
Y−電極の中心上と、アドレス電極の間には、障壁6が
形成されており、この障壁で区切られた空間で放電が起
こって点灯する。
In FIG. 1(a), XI, xz, Y, ~Y,
The discharge electrodes A1 to As are arranged in parallel on the same substrate surface so that adjacent electrodes form a display cell line, and address electrodes A1 to As are arranged above them in an insulating relationship and intersecting with each other. be. Also, Xl, Xi, Y+-
A barrier 6 is formed between the center of the Y-electrode and the address electrode, and a discharge occurs in the space separated by this barrier, resulting in lighting.

つまり、この区切られた空間が最小単位である表示セル
を構成している。
In other words, this divided space constitutes a display cell, which is the minimum unit.

平行に配置した各放電電極のうち、−本おきの電極をY
電極群として個別に導出し、かつこのY電極で挟まれる
各放電電極を交互に共通接続してX、電極群とXt電極
群としである。かくして各Y電極は必ず両側をX、、X
、電極で挟まれ、1つのY電極で2行のラインを駆動さ
せることができる。そして、表示セルのラインを27本
駆動するために必要な放電電極の端子数はX電極群側が
2つ、Y電極群側がnで合計n+2個の電極端子で済む
。従来は同じ数の表示セルのライン2n本を構成するの
にX電極が2n本、Y電極も27本の合計47本の電極
と同数の端子を必要としていたので、雪掻本数は半分と
なり端子数は略1/4に減ることになる。
Among the discharge electrodes arranged in parallel, every other electrode is
The discharge electrodes are individually drawn out as an electrode group, and the discharge electrodes sandwiched between the Y electrodes are alternately connected in common to form an X electrode group and an Xt electrode group. Thus, each Y electrode must have both sides X, ,
, and two rows of lines can be driven with one Y electrode. The number of discharge electrode terminals required to drive 27 lines of display cells is two on the X electrode group side and n on the Y electrode group side, for a total of n+2 electrode terminals. Conventionally, to configure 2n lines of the same number of display cells, 2n X electrodes and 27 Y electrodes were required, totaling 47 electrodes and the same number of terminals, so the number of snow shovels was halved and the number of terminals The number will be reduced to approximately 1/4.

また、1つのYli極で2行のラインを駆動させること
で、表示セルの幅を放電電極−本分狭くすることができ
、画面の解像度を上げることができる。
Furthermore, by driving two lines with one Yli pole, the width of the display cell can be narrowed by the width of the discharge electrode, and the resolution of the screen can be increased.

次に、第1図(b)を用いて一実施例のパネルの構成を
説明する。
Next, the structure of the panel of one embodiment will be explained using FIG. 1(b).

X放電電極2,4とY、放電電極3,5は、ガラス製の
透明絶縁性の第1基板1の上に透明な!To膜をもって
形成され、その上を低融点ガラスの透明誘電体層7で被
覆する。各放電電極の長平方向に沿った中間位置に対応
した誘電体層の上には、絶縁物の障壁6を例えば厚膜印
刷技法を用いて形成する。一方、対向するガラス基板1
0の内面にはアドレス電極11と、該アドレス電極の表
面を覆う絶縁膜12並びにアドレス電極と平行に上記各
表示セルラインを列方向に仕切る障壁13が設けられ、
上下基板の障壁6.13同志が互いに交差する方向で衝
合し、それらの間にガス封入空間8を規定する形で封止
されている。またこの上面側の第2基板内面には表示セ
ルもしくはセルライン対応に図示しない多色螢光体層が
設けられる。この結果、障壁6と13で区切られた空間
が、単位表示セルDcとなり、例えば放電電極Y、とX
、、X、間では、図に示した矢印イイ゛のように電荷が
移動して表示用の面放電が発生し、また対向する電極A
t との間では矢印口のような消去用の対向放電が発生
する。第2基板内面に螢光体層を付加したパネルでは第
1基板1側からXY透明電極を通して表示を見ることに
より高輝度のカラー表示を得ることができる。
The X discharge electrodes 2 and 4 and the Y discharge electrodes 3 and 5 are mounted on a transparent insulating first substrate 1 made of glass! It is formed with a To film, and is covered with a transparent dielectric layer 7 made of low melting point glass. An insulating barrier 6 is formed on the dielectric layer corresponding to an intermediate position along the longitudinal direction of each discharge electrode using, for example, a thick film printing technique. On the other hand, the opposing glass substrate 1
0 is provided with an address electrode 11, an insulating film 12 covering the surface of the address electrode, and a barrier 13 parallel to the address electrode and partitioning each of the display cell lines in the column direction,
The barriers 6.13 of the upper and lower substrates abut each other in the cross direction, and are sealed to define a gas-filled space 8 between them. Further, on the inner surface of the second substrate on the upper surface side, a multicolor phosphor layer (not shown) is provided corresponding to the display cells or cell lines. As a result, the space separated by the barriers 6 and 13 becomes a unit display cell Dc, and for example, the discharge electrodes Y and X
, ,
An opposing discharge for erasing as shown by the arrowhead is generated between the t and t. In a panel in which a phosphor layer is added to the inner surface of the second substrate, a high-intensity color display can be obtained by viewing the display from the first substrate 1 side through the XY transparent electrodes.

次に、第2図のタイムチャートを用いて、第1図(a)
に示した一実施例のPDPの駆動方法を説明する。
Next, using the time chart in Figure 2,
A method of driving the PDP according to the embodiment shown in FIG.

まず、t、のタイミングで電極X、と電極Y。First, the electrodes X and Y at timing t.

との間に、放電開始電圧を越える電圧の書込みパルスV
 wx+ + V wyを印加して、第1ラインL1の
表示セルを一旦全面点灯させる。そして、点灯を続けさ
せるためにX+ 、Yr電極に交互に維持放電パルスV
 SXI とv8yを印加する。
A write pulse V with a voltage exceeding the discharge starting voltage is generated between
By applying wx+ + V wy, the display cells of the first line L1 are once completely illuminated. Then, in order to continue lighting, a sustaining discharge pulse V is applied alternately to the X+ and Yr electrodes.
Apply SXI and v8y.

次に、t2のタイミングにおいてラインLl上で不必要
に点灯している表示セルを選択消去する。
Next, at timing t2, display cells that are unnecessarily lit on line Ll are selectively erased.

これには、消去する表示セルの上を通るアドレス電極A
H(iは消去する表示セルのアドレス)とY、電極との
間に細幅の消去パルスV a i l とv、。
This includes an address electrode A passing over the display cell to be erased.
Narrow erase pulses V a i l and v, between the electrodes H (i is the address of the display cell to be erased) and Y.

1を印加して消去放電を起こし、壁電荷を打ち消して不
必要に点灯していた表示セルを消去する。
1 is applied to cause erasing discharge, canceling the wall charge and erasing the display cells that were unnecessarily lit.

これで第1セルラインLlでは必要な表示セルのみが点
灯している状態となる。
In this way, only the necessary display cells are lit on the first cell line Ll.

次に、タイミングt3でX2電極とX1電極に書込みパ
ルスV、yl とV wxtを印加して、第2セルライ
ンL2を一旦全面点灯させる。そして、点灯を続けさせ
るために、X2.Y、電極に交互に維持放電パルスVs
xffiと■。を印加する。
Next, at timing t3, write pulses V, yl and Vwxt are applied to the X2 electrode and the X1 electrode, and the second cell line L2 is once completely illuminated. Then, in order to continue lighting, X2. Y, sustain discharge pulses Vs alternately applied to the electrodes
xffi and ■. Apply.

次に、ライン上2上で不必要に点灯している表示セルを
選択消去する。タイミングt、でそのための消去放電を
アドレス電極A8とX1電極との間テ起こすべく消去パ
ルスV、、2と■。y2を印加するが、単にこのパルス
操作だけでは、既にラインL1で点灯している必要な表
示セルまでもが選択消去されてしまう。これを防ぐため
にt、より同時か僅か前のt4のタイミングで、Xl電
極に補助維持放電パルス■5.を印加して電極X1とY
、間で面放電を起こし、t、で起こるX1電極とA、電
極との消去放電の効果を打ち消してしまう。
Next, display cells that are unnecessarily lit on line 2 are selectively erased. At timing t, erase pulses V, 2 and 2 are applied to cause an erase discharge between the address electrode A8 and the X1 electrode. y2 is applied, but by simply performing this pulse operation, even the necessary display cells that are already lit on line L1 will be selectively erased. To prevent this, an auxiliary sustaining discharge pulse is applied to the Xl electrode at timing t4, which is the same as or slightly before t. is applied to electrodes X1 and Y
A surface discharge occurs between the electrodes X1 and A, which occurs at t, and cancels out the effect of the erase discharge between the X1 electrode and the A electrode.

こうすればラインL1で既に点灯している必要な表示セ
ルを消去することなく、ラインL2の不必要な表示セル
のみを消去することができる。
In this way, only unnecessary display cells on line L2 can be erased without erasing necessary display cells that are already lit on line L1.

次に、j&+  t?でLlの時と同様にL3を一旦全
面点灯させた後、不必要な表示セルを選択消去する。こ
の時の選択消去は、t、でのアドレス電極A、とX2電
極との消去放電により行うが、この消去放電はY、、X
、ii極で構成される第2ラインL2には及ばないので
、L2の選択消去の時のt4のような操作は必要ない。
Next, j&+t? Then, as in the case of Ll, L3 is once turned on completely, and then unnecessary display cells are selectively erased. Selective erasing at this time is performed by erasing discharge between the address electrode A and the X2 electrode at t, but this erasing discharge is
, ii poles, so the operation like t4 when selectively erasing L2 is not necessary.

次に、tlでL4を一旦全面点灯させた後、L2の時と
全く同様に、既にL3で点灯している必要な表示セルを
消去しないようにtlOでの消去放電と同時か僅か前の
t9でX2電極に補助維持放電パルスVSSを印加して
やる。
Next, after completely lighting up L4 at tl, in order to avoid erasing the necessary display cells that are already lit at L3, just as with L2, at t9, the erase discharge is performed at the same time as the erasing discharge at tlO or slightly before. Then, the auxiliary sustaining discharge pulse VSS is applied to the X2 electrode.

以上のように、第1図(a)のような放電電極構成の場
合、偶数番目のラインすなわちラインL2m(mは1〜
n/2)の選択消去を行う時に、その前のラインL2m
−1で既に点灯している必要な表示セルを消去しないよ
うな補助維持放電パルスの印加操作が必要となる。
As mentioned above, in the case of the discharge electrode configuration as shown in FIG.
n/2), the previous line L2m
-1, it is necessary to apply an auxiliary sustaining discharge pulse so as not to erase necessary display cells that are already lit.

それは、ラインL2m−1のX、電極またはX2電極に
ラインL2mのY1電極とアドレス電極A、との消去放
電と同時か僅か前に補助維持放電パルスVS3を印加し
てラインL2m−1側のY電極またはX電極とアドレス
電極A、との間でおこる不必要な消去放電の効果を打ち
消し、ラインL2m−1で既に必要に点灯している表示
セルが消去されないようにする。
This is done by applying an auxiliary sustaining discharge pulse VS3 to the X electrode or X2 electrode of line L2m-1 at the same time as or slightly before the erasing discharge between the Y1 electrode and address electrode A of line L2m. The effect of unnecessary erasing discharge occurring between the electrode or the X electrode and the address electrode A is canceled to prevent the display cells already lit as necessary on line L2m-1 from being erased.

また、本発明のFDPでは1つのY放電電極で2行のラ
インを駆動するので、Y放電電極の維持放電パルスは、
各X放電電極の2倍の数のパルスが必要となる。すなわ
ち、X電極群の維持放電パルスは、各X電極群の維持放
電パルスの2倍の周波数となっている。但しX電極群に
対する維持放電パルス■、yの位相は維持放電パルスV
、X、 、  Vmx2と交互に一致しておりXY電極
への電圧レベルの相違とあいまってY電極を共用した隣
接セルラインにこれらXY電極間の電位差として互いに
逆極性の交流電圧パルスが順次印加される関係となる。
In addition, in the FDP of the present invention, two lines are driven by one Y discharge electrode, so the sustain discharge pulse of the Y discharge electrode is
Twice as many pulses are required for each X discharge electrode. That is, the sustaining discharge pulse of the X electrode group has twice the frequency of the sustaining discharge pulse of each X electrode group. However, the phase of the sustaining discharge pulse ■ and y for the X electrode group is the sustaining discharge pulse V
, The relationship is as follows.

なお、パネル特性上の維持放電パルスの大きさは■。の
レベルで充分であるが、本発明ではX放電電極の維持放
電パルスv、8の大きさをY放電電極に印加する維持放
電パルスV3yの2倍の大きさに規定しである。この結
果Y電極を共用する一方のX1電極側に維持放電パルス
■8Xを出す時、Y放電電極でも1/2レベルの同極性
パルスが出され、当該X、電極側のセルラインではY電
極側が高電位、X電極側が低電位となる関係で維持電圧
が与えられる一方、X2電極側のセルラインでは、共用
したY電極側が低電位、X2電極側が高電位となる逆極
性の関係で維持電圧が与えられる。
In addition, the size of the sustaining discharge pulse in terms of panel characteristics is ■. However, in the present invention, the magnitude of the sustaining discharge pulse v,8 of the X discharge electrode is specified to be twice the magnitude of the sustaining discharge pulse V3y applied to the Y discharge electrode. As a result, when a sustain discharge pulse of 8X is issued to one of the X1 electrodes that shares the Y electrode, a pulse of the same polarity at 1/2 level is also issued to the Y discharge electrode, and in the cell line on the X electrode side, the Y electrode side A sustaining voltage is applied with a high potential and a low potential on the X electrode side, while in the cell line on the X2 electrode side, a sustaining voltage is applied with a reverse polarity relationship where the shared Y electrode side is a low potential and the X2 electrode side is a high potential. Given.

タイムチャート、 第3図は、従来例のPDPの電極配置を示す平面図、 第4図は、従来例のPDPの駆動方法を説明するための
タイムチャートである。
Time Chart FIG. 3 is a plan view showing the electrode arrangement of a conventional PDP. FIG. 4 is a time chart for explaining a driving method of a conventional PDP.

〔効 果〕〔effect〕

以上説明したように本発明によれば、X、Y放電電極の
全てを共有し合うことで、放電電極の数を従来よりも半
分近くに減らすことができ、これに伴う駆動回路も半分
近く減らすことができる効果を奏する。
As explained above, according to the present invention, by sharing all of the X and Y discharge electrodes, the number of discharge electrodes can be reduced by nearly half compared to the conventional method, and the drive circuit associated with this can also be reduced by nearly half. It has the effect that it can.

また、表示セルの幅を小さくすることにより、画面の解
像度を上げることができる。
Furthermore, by reducing the width of the display cell, the resolution of the screen can be increased.

図において、 1・・・第1基板、 3・・・Y、電極、 5・・・Y盈。、電極、 7・・・誘電体層、 9・・・アドレス電極、 ・・・XIX電極 ・・・X2電極、 ・・・障壁、 ・・・放電空間、 0・・・前面基板。In the figure, 1... first substrate, 3...Y, electrode, 5... Y Ei. ,electrode, 7...Dielectric layer, 9...address electrode, ...XIX electrode ...X2 electrode, ···barrier, ...discharge space, 0...Front board.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)は、本発明のPDPの電極配置を示す平面
図、 第1図(b)は、本発明のFDPの要部断面図、第2図
は、本発明の駆動方法を説明するための季麿9肛を緬股
電PDFq’li濾mts宿Ig 1 図(0] 斗遼沸:n飴被電PDPni都吋旬! 第1図+b+ のシ穀PDP哨電棲配屓閏 従未11W昨p RF3汀すぶ夕4を子ヤード第4図
FIG. 1(a) is a plan view showing the electrode arrangement of the PDP of the present invention, FIG. 1(b) is a sectional view of essential parts of the FDP of the present invention, and FIG. 2 illustrates the driving method of the present invention. To do this, the 9 anus of the Myanmar electrician PDF q'li filter mts inn Ig 1 Figure (0) Dou Liaofu: n candy electrified PDPni Tou Shun! Figure 1 + b +'s grain PDP transmitter distribution control Juwei 11W yesterday p RF3 Tsubu Yu 4 Child yard Figure 4

Claims (2)

【特許請求の範囲】[Claims] (1)絶縁物から成る第1基板(1)と、 該第1基板(1)上に平行に形成した複数本の放電電極
(2〜5)と、 該放電電極(2〜5)を被覆する誘電体層(7)と、 該誘電体層(7)上で前記各放電電極(2〜5)の長手
方向に沿って当該放電電極を2分割する位置に形成した
障壁(6)と、 前記放電電極(2〜5)と交差する方向に形成したアド
レス電極(9)と、 前記第1基板と対向してそれらの間にガス放電空間を規
定するように配置した第2基板(10)とを有すること
を特徴とするガス放電パネル。
(1) A first substrate (1) made of an insulator, a plurality of discharge electrodes (2 to 5) formed in parallel on the first substrate (1), and a covering to the discharge electrodes (2 to 5). a barrier (6) formed on the dielectric layer (7) at a position dividing each of the discharge electrodes (2 to 5) into two along the longitudinal direction; an address electrode (9) formed in a direction intersecting the discharge electrodes (2 to 5); and a second substrate (10) arranged to face the first substrate and define a gas discharge space therebetween. A gas discharge panel comprising:
(2)請求項(1)記載のガス放電パネルの駆動方法に
おいて、 前記放電電極(2〜5)を、1本おきのY電極群と、該
Y電極群の間に交互に挟まるX_1放電電極群およびX
_2放電電極群の3つの電極群に分け、該Y放電電極群
に対する維持放電パルスの周波数を各X放電電極群の2
倍に設定するとともに、該Y電極群に対するパルスの位
相を各X電極群に対するパルスの位相と交互に一致させ
、かつ両X放電電極群に対するパルスの大きさを前記Y
放電電極に対する所要維持電圧パルスの大きさの2倍に
設定して各Y電極を共用した隣接X_1、X_2電極と
の間の表示セルラインに交互に逆極性の交流維持電圧が
印加されるようにしたことを特徴とするガス放電パネル
の駆動方法。
(2) In the method for driving a gas discharge panel according to claim (1), the discharge electrodes (2 to 5) are arranged between every other Y electrode group and X_1 discharge electrodes that are alternately sandwiched between the Y electrode groups. group and X
_2 discharge electrode group is divided into three electrode groups, and the frequency of the sustaining discharge pulse for the Y discharge electrode group is set to 2 of each X discharge electrode group.
At the same time, the phase of the pulse for the Y electrode group is made to alternately match the phase of the pulse for each X electrode group, and the magnitude of the pulse for both X discharge electrode groups is set to
The AC sustaining voltage of opposite polarity is alternately applied to the display cell lines between the adjacent X_1 and X_2 electrodes that share each Y electrode by setting it to twice the magnitude of the required sustaining voltage pulse for the discharge electrode. A method for driving a gas discharge panel, characterized in that:
JP1041251A 1989-02-20 1989-02-20 Gas discharge panel and driving method thereof Expired - Lifetime JP2629944B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1041251A JP2629944B2 (en) 1989-02-20 1989-02-20 Gas discharge panel and driving method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1041251A JP2629944B2 (en) 1989-02-20 1989-02-20 Gas discharge panel and driving method thereof

Publications (2)

Publication Number Publication Date
JPH02220330A true JPH02220330A (en) 1990-09-03
JP2629944B2 JP2629944B2 (en) 1997-07-16

Family

ID=12603220

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1041251A Expired - Lifetime JP2629944B2 (en) 1989-02-20 1989-02-20 Gas discharge panel and driving method thereof

Country Status (1)

Country Link
JP (1) JP2629944B2 (en)

Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02288047A (en) * 1989-04-26 1990-11-28 Nec Corp Plasma display and its driving method
EP0855691A1 (en) * 1997-01-27 1998-07-29 Fujitsu Limited Plasma display panel
EP0865068A2 (en) * 1997-03-14 1998-09-16 Mitsubishi Denki Kabushiki Kaisha Plasma display panel
US6091380A (en) * 1996-06-18 2000-07-18 Mitsubishi Denki Kabushiki Kaisha Plasma display
US6127992A (en) * 1997-08-27 2000-10-03 Nec Corporation Method of driving electric discharge panel
KR20010009688A (en) * 1999-07-13 2001-02-05 김순택 Method for driving a plasma display panel
US6232935B1 (en) 1997-09-01 2001-05-15 Samsung Sdi Co., Ltd. Plasma display panel and method for driving the same
WO2001093297A1 (en) * 2000-05-31 2001-12-06 Nec Corporation Ac plasma display panel and driving method therefor
WO2001099139A1 (en) * 2000-06-23 2001-12-27 Orion Electric Co., Ltd. Method for measuring wall charge and wall voltage on plasma display panel
FR2811127A1 (en) * 2000-06-30 2002-01-04 Nec Corp Plasma display panel has two sustaining electrode groups which are placed above and below scanning electrodes which are partitioned by perpendicular wall
US6356017B1 (en) 1998-01-09 2002-03-12 Nec Corporation Method of driving a plasma display panel with improved luminescence efficiency
US6373451B1 (en) * 1999-03-02 2002-04-16 Samsung Sdi Co., Ltd. Method for driving AC plasma display panel
US6373452B1 (en) 1995-08-03 2002-04-16 Fujiitsu Limited Plasma display panel, method of driving same and plasma display apparatus
EP1217597A2 (en) * 2000-12-21 2002-06-26 Nec Corporation Plasma display panel and drive method for the same
US6420830B1 (en) 1998-01-26 2002-07-16 Lg Electronics Inc. Plasma display panel having three discharge sustain electrodes per two pixels
US6489939B1 (en) 1998-05-27 2002-12-03 Fujitsu Limited Method for driving plasma display panel and apparatus for driving the same
US6495957B2 (en) 1998-10-09 2002-12-17 Fujitsu Limited Plasma display panel with various electrode projection configurations
US6531994B1 (en) 1999-11-18 2003-03-11 Mitsubishi Denki Kabushiki Kaisha Method of driving AC-type plasma display panel and plasma display device
US6608609B1 (en) 1998-06-30 2003-08-19 Fujitsu Limited Method for driving plasma display panel
WO2005117068A1 (en) * 2004-05-26 2005-12-08 Harison Toshiba Lighting Corporation Flat type discharge lamp and lighting device
US7825596B2 (en) 1992-01-28 2010-11-02 Hitachi Plasma Patent Licensing Co., Ltd. Full color surface discharge type plasma display device
US7825875B2 (en) 1998-06-18 2010-11-02 Hitachi Plasma Patent Licensing Co., Ltd. Method for driving plasma display panel

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002014648A (en) 2000-06-28 2002-01-18 Nec Corp Driving method for plasma display panel

Cited By (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02288047A (en) * 1989-04-26 1990-11-28 Nec Corp Plasma display and its driving method
US7825596B2 (en) 1992-01-28 2010-11-02 Hitachi Plasma Patent Licensing Co., Ltd. Full color surface discharge type plasma display device
EP1262946A3 (en) * 1995-08-03 2007-06-20 Hitachi Plasma Patent Licensing Co., Ltd. Plasma display panel, method of driving the same and plasma display apparatus with discharges between a scan electrode and two adjacent sustain electrodes occurring in sequence
US6965359B2 (en) 1995-08-03 2005-11-15 Fujitsu Limited Method of driving plasma display panel by applying discharge sustaining pulses
EP1262945A2 (en) * 1995-08-03 2002-12-04 Fujitsu Limited Plasma display panel, method of driving same and plasma display apparatus with opposite phases of sustaining pulses for adjacent rows
US7705806B2 (en) 1995-08-03 2010-04-27 Hitachi Plasma Patent Licensing Co., Ltd Method for driving a plasma display panel
EP1262946A2 (en) * 1995-08-03 2002-12-04 Fujitsu Limited Plasma display panel, method of driving the same and plasma display apparatus with discharges between a scan electrode and two adjacent sustain electrodes occurring in sequence
US6373452B1 (en) 1995-08-03 2002-04-16 Fujiitsu Limited Plasma display panel, method of driving same and plasma display apparatus
EP1262945A3 (en) * 1995-08-03 2007-02-07 Hitachi, Ltd. Plasma display panel, method of driving same and plasma display apparatus with opposite phases of sustaining pulses for adjacent rows
US6091380A (en) * 1996-06-18 2000-07-18 Mitsubishi Denki Kabushiki Kaisha Plasma display
EP0855691A1 (en) * 1997-01-27 1998-07-29 Fujitsu Limited Plasma display panel
EP0865068A3 (en) * 1997-03-14 1999-04-07 Mitsubishi Denki Kabushiki Kaisha Plasma display panel
EP0865068A2 (en) * 1997-03-14 1998-09-16 Mitsubishi Denki Kabushiki Kaisha Plasma display panel
US6127992A (en) * 1997-08-27 2000-10-03 Nec Corporation Method of driving electric discharge panel
US6232935B1 (en) 1997-09-01 2001-05-15 Samsung Sdi Co., Ltd. Plasma display panel and method for driving the same
US6356017B1 (en) 1998-01-09 2002-03-12 Nec Corporation Method of driving a plasma display panel with improved luminescence efficiency
US6744200B2 (en) 1998-01-09 2004-06-01 Nec Corporation Plasma display panel
US6420830B1 (en) 1998-01-26 2002-07-16 Lg Electronics Inc. Plasma display panel having three discharge sustain electrodes per two pixels
US6489939B1 (en) 1998-05-27 2002-12-03 Fujitsu Limited Method for driving plasma display panel and apparatus for driving the same
US8018168B2 (en) 1998-06-18 2011-09-13 Hitachi Plasma Patent Licensing Co., Ltd. Method for driving plasma display panel
US7906914B2 (en) 1998-06-18 2011-03-15 Hitachi, Ltd. Method for driving plasma display panel
US7825875B2 (en) 1998-06-18 2010-11-02 Hitachi Plasma Patent Licensing Co., Ltd. Method for driving plasma display panel
US8018167B2 (en) 1998-06-18 2011-09-13 Hitachi Plasma Licensing Co., Ltd. Method for driving plasma display panel
US8022897B2 (en) 1998-06-18 2011-09-20 Hitachi Plasma Licensing Co., Ltd. Method for driving plasma display panel
US8344631B2 (en) 1998-06-18 2013-01-01 Hitachi Plasma Patent Licensing Co., Ltd. Method for driving plasma display panel
US8558761B2 (en) 1998-06-18 2013-10-15 Hitachi Consumer Electronics Co., Ltd. Method for driving plasma display panel
US8791933B2 (en) 1998-06-18 2014-07-29 Hitachi Maxell, Ltd. Method for driving plasma display panel
US6608609B1 (en) 1998-06-30 2003-08-19 Fujitsu Limited Method for driving plasma display panel
US6495957B2 (en) 1998-10-09 2002-12-17 Fujitsu Limited Plasma display panel with various electrode projection configurations
US6373451B1 (en) * 1999-03-02 2002-04-16 Samsung Sdi Co., Ltd. Method for driving AC plasma display panel
KR20010009688A (en) * 1999-07-13 2001-02-05 김순택 Method for driving a plasma display panel
US6531994B1 (en) 1999-11-18 2003-03-11 Mitsubishi Denki Kabushiki Kaisha Method of driving AC-type plasma display panel and plasma display device
WO2001093297A1 (en) * 2000-05-31 2001-12-06 Nec Corporation Ac plasma display panel and driving method therefor
US7145525B2 (en) 2000-05-31 2006-12-05 Pioneer Corporation AC plasma display panel and driving method therefor
WO2001099139A1 (en) * 2000-06-23 2001-12-27 Orion Electric Co., Ltd. Method for measuring wall charge and wall voltage on plasma display panel
FR2811127A1 (en) * 2000-06-30 2002-01-04 Nec Corp Plasma display panel has two sustaining electrode groups which are placed above and below scanning electrodes which are partitioned by perpendicular wall
FR2826768A1 (en) * 2000-06-30 2003-01-03 Nec Corp Plasma display panel has two sustaining electrode groups which are placed above and below scanning electrodes which are partitioned by perpendicular wall
US6795044B2 (en) 2000-06-30 2004-09-21 Nec Corporation Plasma display panel and driving method thereof
KR100508226B1 (en) * 2000-06-30 2005-08-17 파이오니아 가부시키가이샤 Plasma display panel and driving method thereof
EP1217597A2 (en) * 2000-12-21 2002-06-26 Nec Corporation Plasma display panel and drive method for the same
EP1217597A3 (en) * 2000-12-21 2002-11-27 Nec Corporation Plasma display panel and drive method for the same
WO2005117068A1 (en) * 2004-05-26 2005-12-08 Harison Toshiba Lighting Corporation Flat type discharge lamp and lighting device

Also Published As

Publication number Publication date
JP2629944B2 (en) 1997-07-16

Similar Documents

Publication Publication Date Title
JPH02220330A (en) Gas discharge panel and method of driving same
US6559815B1 (en) Plasma display panel with improved recovery energy efficiency and driving method thereof
KR100356729B1 (en) Plasma display device
JP2002175761A (en) Plasma display panel and its driving method
KR20000067805A (en) Plasma display panel and driving method thereof
JPH09245627A (en) Gas discharge display device, manufacture thereof and drive method of panel thereof
JPH052993A (en) Surface discharge type plasma display panel and method for driving it
JP3591971B2 (en) AC type PDP and driving method thereof
JPH11272232A (en) Plasma device panel and device using the same
JPS63309994A (en) Plasma display panel having four electrodes per pixel and control thereof
JP3036057B2 (en) Plasma display
JPH11238462A (en) Plasma display panel
US6278243B1 (en) Electrode division surface discharge plasma display apparatus
JP3559143B2 (en) Matrix type display device
JP3644789B2 (en) Plasma display panel and driving method thereof
JPH05190099A (en) Display device
US6747615B2 (en) Method of driving plasma display panel including and-logic and line duplication methods, plasma display apparatus performing the driving method and method of wiring the plasma display panel
US7586466B2 (en) Display panel including an improved electrode structure
JP4109144B2 (en) Plasma display panel
JPH05314911A (en) Plasma display panel
JP2004096387A (en) Plasma display panel
JP3436223B2 (en) Plasma display device and driving method thereof
JP3272396B2 (en) Plasma display device
KR20040065437A (en) adress electrode of plasma display pannel
JP3630576B2 (en) Plasma display panel

Legal Events

Date Code Title Description
S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R360 Written notification for declining of transfer of rights

Free format text: JAPANESE INTERMEDIATE CODE: R360

R371 Transfer withdrawn

Free format text: JAPANESE INTERMEDIATE CODE: R371

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

S131 Request for trust registration of transfer of right

Free format text: JAPANESE INTERMEDIATE CODE: R313131

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090418

Year of fee payment: 12

EXPY Cancellation because of completion of term