JP2004096387A - Plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plasma display panel capable of ensuring connection reliability even when a connection structure with respect to a drive circuit is changed for the purpose of cost reduction. <P>SOLUTION: A display electrode lead-out section 24 is formed for connection to a display driver circuit at both ends of a front panel 22 in an extending direction of a display electrode and an address electrode lead-out section 26 is formed for connection to an address driver circuit at both ends of a rear panel 23 in an extending direction of an address electrode to configure a panel main body 21, an FPC 28 interconnecting the address electrode and the address driver circuit is provided on one of the address electrode lead-out sections 26 of the panel main body 21 and both the address electrode lead-out sections 26 are coated with a moistureproof resin 29. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a plasma display panel (hereinafter, referred to as a PDP) known as a large-screen, thin, and lightweight display device.
[0002]
[Prior art]
PDPs are capable of high-speed display compared to liquid crystal panels, have a wide viewing angle, are easy to increase in size, and have high display quality due to their self-luminous type. Of particular interest recently.
[0003]
Generally, in this PDP, ultraviolet light is generated by gas discharge, and the phosphor is excited by the ultraviolet light to emit light, thereby performing color display. Then, a display cell partitioned by a partition is provided on the substrate, and a phosphor layer is formed on the display cell.
[0004]
This PDP is roughly classified into two types: an AC type and a DC type in terms of driving, and there are two types of discharge types, a surface discharge type and a counter discharge type. At present, the mainstream of PDPs is a three-electrode surface-discharge type, which has display electrodes parallel and adjacent on one substrate and intersects the display electrodes on the other substrate. It has address electrodes, partition walls, and a phosphor layer arranged in the directions, and can relatively thicken the phosphor layer, which is suitable for color display by the phosphor.
[0005]
[Problems to be solved by the invention]
Meanwhile, an AC surface discharge type PDP, which is a typical AC type, generally includes a front plate made of a glass substrate formed by arranging display electrodes performing surface discharge, and a glass substrate formed by arranging address electrodes. The panel body is configured by sealing the back plate parallel to each other so that both electrodes form a matrix and forms a discharge space in the gap, and the outer periphery is sealed with a sealing material such as glass frit. Have been. When the electrode terminals are led out from the front plate and the rear plate, an electrode lead portion is formed up to the vicinity of the end surface of the glass substrate so that a voltage can be externally applied to each electrode. This is done by connecting to an external drive circuit. The connection between the electrode lead-out portion and the drive circuit is performed by pressing the flexible wiring board to the electrode lead-out portion via an anisotropic conductive adhesive having anisotropy.
[0006]
An object of the present invention is to ensure the reliability of such a PDP even when the connection structure with a drive circuit is changed in order to reduce costs.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, according to the present invention, a flexible wiring board for connecting an address electrode and an address driver circuit is provided at one address electrode lead portion of a panel body, and both address electrode lead portions are covered with a resin. It was done.
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION
That is, according to the invention of claim 1 of the present invention, a front plate formed by arranging a plurality of display electrodes is opposed to each other so that a discharge space is formed between the front plates, and the outer peripheral portion is sealed. And a back plate formed by arranging a plurality of address electrodes so as to intersect with the display electrodes, and a display for connecting to a display driver circuit at both ends of the front plate in the extension direction of the display electrodes. An electrode lead portion is formed, and an address electrode lead portion for connecting to an address driver circuit is formed at both ends of the back plate in the extending direction of the address electrode to form a panel body, and one of the panel bodies is formed. A flexible wiring board for connecting an address electrode and an address driver circuit is provided in the address electrode lead portion, and both address electrode lead portions are covered with a resin. That.
[0009]
Hereinafter, a PDP according to an embodiment of the present invention will be described with reference to FIGS. 1 to 5, but embodiments of the present invention are not limited thereto.
[0010]
First, the structure of the panel body will be described with reference to FIG. As shown in FIG. 1, a plurality of rows of stripe-shaped display electrodes 2 formed of a pair of scan electrodes and sustain electrodes are formed on a transparent front substrate 1 such as a glass substrate, and cover the electrode group. A dielectric layer 3 is formed as described above, and a protective film 4 is formed on the dielectric layer 3.
[0011]
A plurality of rows of stripes covered with an overcoat layer 6 are provided on a rear substrate 5 opposed to the front substrate 1 so as to intersect with the display electrodes 2 of scan electrodes and sustain electrodes. Address electrodes 7 are formed. A plurality of partitions 8 are arranged on the overcoat layer 6 between the address electrodes 7 in parallel with the address electrodes 7, and the phosphor layers 9 are provided on the side surfaces between the partitions 8 and on the surface of the overcoat layer 6. I have.
[0012]
The substrate 1 and the substrate 5 are opposed to each other with a minute discharge space therebetween so that the display electrode 2 of the scan electrode and the sustain electrode and the address electrode 7 are substantially orthogonal to each other. One of helium, neon, argon, and xenon or a mixed gas is sealed as a discharge gas in the discharge space. The discharge space is partitioned into a plurality of partitions by partition walls 8, so that a plurality of discharge cells are provided at intersections between the display electrodes 2 and the address electrodes 7, and each of the discharge cells has a red, green, and blue color. The phosphor layers 9 are sequentially arranged for each color such that
[0013]
FIG. 2 shows the electrode arrangement of this panel body. As shown in FIG. 2, the scan electrodes, sustain electrodes, and address electrodes have a matrix configuration of M rows × N columns, and M rows of scan lines are arranged in the row direction. Electrodes SCN1 to SCNM and sustain electrodes SUS1 to SUSM are arranged, and N columns of address electrodes D1 to DN are arranged in the column direction.
[0014]
In a PDP having such an electrode configuration, an address discharge is performed between the address electrode and the scan electrode by applying a write pulse between the address electrode and the scan electrode. By applying a periodic sustain pulse that is alternately inverted between the electrodes, sustain discharge is performed between the scan electrode and the sustain electrode to perform a predetermined display.
[0015]
FIG. 3 shows a configuration of a display drive circuit of a PDP in the present embodiment. As shown in FIG. 3, the PDP 10, the address driver circuit 11, the scan driver circuit 12, the sustain driver circuit 13, the discharge control timing generation circuit 14, the power supply circuits 15, 16 and the A / D converter (analog A digital converter 17, a scan number converter 18, and a subfield converter 19.
[0016]
In the circuit of FIG. 3, first, the video signal VD is input to the A / D converter 17. The horizontal synchronizing signal H and the vertical synchronizing signal V are supplied to a discharge control timing generation circuit 14, an A / D converter 17, a scan number conversion unit 18, and a subfield conversion unit 19. The A / D converter 17 converts the video signal VD into a digital signal, and provides the image data to the scan number converter 18.
[0017]
The scanning number conversion unit 18 converts the image data into image data of the number of lines corresponding to the number of pixels of the PDP 10 and supplies the image data of each line to the subfield conversion unit 19. The subfield conversion unit 19 divides each pixel data of the image data for each line into a plurality of bits corresponding to a plurality of subfields, and serializes each bit of the pixel data for each subfield to the address driver circuit 11. Output to The address driver circuit 11 is connected to the power supply circuit 15, converts data serially provided for each subfield from the subfield conversion unit 19 into parallel data, and applies a voltage to a plurality of address electrodes based on the parallel data. Supply.
[0018]
The discharge control timing generation circuit 14 generates discharge control timing signals SC and SU with reference to the horizontal synchronization signal H and the vertical synchronization signal V, and supplies them to the scan driver circuit 12 and the sustain driver circuit 13, respectively. The scan driver circuit 12 has an output circuit 121 and a shift register 122. Further, the sustain driver circuit 13 includes an output circuit 131 and a shift register 132. These scan driver circuit 12 and sustain driver circuit 13 are connected to a common power supply circuit 16.
[0019]
The shift register 122 of the scan driver circuit 12 supplies the discharge control timing signal SC supplied from the discharge control timing generation circuit 14 to the output circuit 121 while shifting in the vertical scanning direction. The output circuit 121 sequentially supplies a drive signal voltage to the plurality of scan electrodes in response to a discharge control timing signal SC provided from the shift register 122.
[0020]
The shift register 132 of the sustain driver circuit 13 supplies the discharge control timing signal SU supplied from the discharge control timing generation circuit 14 to the output circuit 131 while shifting in the vertical scanning direction. The output circuit 131 sequentially supplies a drive signal voltage to the plurality of sustain electrodes in response to the discharge control timing signal SU given from the shift register 132.
[0021]
FIG. 4 is a plan view showing a panel body of the PDP, FIG. 5 is a view showing the panel body before attaching a flexible printed wiring board (FPC), and FIGS. It is the figure seen from the front side.
[0022]
The front plate 22 and the back plate 23 of the panel main body 21 are substantially rectangular and have long sides and short sides. As shown in FIG. 5A, a plurality of terminals connected to the scan electrodes or the sustain electrodes are provided on the outer edges of the sealing material at the right and left ends, which are the short sides of the front plate 22. The display electrode lead portions 24 are formed by being divided into blocks. That is, the display electrode lead-out section 24 is provided with a plurality of terminal blocks 25 each of which is constituted by a predetermined plurality of terminals, and each terminal block 25 is connected to an FPC (not shown). .
[0023]
Further, as shown in FIG. 5B, on the outer edge of the sealing material at both ends which are the long sides of the back plate 23, a plurality of terminals connected to the address electrodes are divided into a plurality of blocks. Thus, the address electrode lead-out portion 26 is formed. The address electrode lead-out portion 26 is provided with a plurality of terminal blocks 27 each of which is constituted by a predetermined plurality of terminals.
[0024]
By the way, in such a PDP, single scan drive is used in order to reduce the cost. In the case of this drive method, as shown in FIG. 4, only the address electrode lead-out portion 26 on one lower end side is provided. The FPC 28 that connects the address electrode and the address driver circuit is connected, the FPC 28 is not connected to the address electrode lead-out portion 26 on the upper end side, and the terminal block 27 of the address electrode lead-out portion 26 remains exposed.
[0025]
When a voltage is applied in a state where the terminal block 27 of the address electrode lead-out portion 26 is exposed in this manner, since the address electrodes are connected in the panel main body 21, the voltage between the electrodes of the address electrode lead-out portion 26 on the exposed upper end side is reduced. In this case, a potential difference occurs, so that the silver electrode constituting the address electrode causes a silver migration phenomenon due to moisture in the atmosphere.
[0026]
In the present invention, an FPC 28 for connecting an address electrode and an address driver circuit is provided in the address electrode lead-out section 26 on one lower end side, and both address electrode lead-out sections 26 are made of a light-curing, thermosetting, Since the structure is covered with a moisture-proof resin 29 such as thermoplastic, and both address electrode lead-out portions 26 are not exposed, there is no intrusion of moisture in the atmosphere due to the intrusion of silver and migration of silver. Even when the driving method is used, the reliability of the connection can be ensured.
[0027]
【The invention's effect】
As is clear from the above description, according to the present invention, even when a single scan driving method is used to reduce costs, it is possible to prevent migration of silver and secure connection reliability. The effect is obtained.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a schematic configuration of a panel of a PDP according to an embodiment of the present invention. FIG. 2 is an explanatory view showing an electrode arrangement of the PDP. FIG. 3 is a block diagram showing an example of a display drive circuit of the PDP. Circuit diagram FIG. 4 is a plan view showing the panel main body after mounting the FPC of the PDP. FIGS. 5A and 5B are plan views showing the panel main body before mounting the FPC of the PDP.
1, 5 substrate 2 display electrode 7 address electrode 10 PDP
21 Panel body 22 Front plate 23 Back plate 24 Display electrode lead-out part 26 Address electrode lead-out part 28 FPC
29 Moisture-proof resin

Claims (1)

A front plate formed by arranging a plurality of display electrodes, and a plurality of front plates are disposed so as to face each other such that a discharge space is formed between the front plates, and the outer peripheral portion is sealed and intersects the display electrodes. A back plate formed by arranging address electrodes, and a display electrode lead-out portion for connecting to a display driver circuit is formed at both ends of the front plate in the extension direction of the display electrode, and an address of the back plate is formed. An address electrode lead-out portion for connecting to an address driver circuit is formed at both ends in the electrode extension direction to form a panel body, and an address electrode and an address driver circuit are provided at one address electrode lead-out portion of the panel body. A plasma display panel comprising: a flexible wiring board to be connected; and both address electrode lead portions covered with a resin.

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