JPH02210513A - Microprogram control circuit - Google Patents

Abstract

PURPOSE:To reduce the power consumption by using a program instruction to designate the clock restart timing of a clock restart circuit. CONSTITUTION:A microprogram control circuit is constituted of an oscillation circuit 1, a dividing circuit 2, the AND gates 3 and 4, an OR gate 5, a key input control circuit 6, and a clock restart control circuit 9. Thus, a mask is changed for the control circuit according to its purpose of application and a proper restart timing is secured. Furthermore one of signal timings can be selected with a program instruction. Then the power consumption is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microprogram control circuit, and more particularly to a restart method when generation of a clock signal, which forms the basis of the operation of the microprogram control circuit, is inhibited.

SUMMARY OF THE INVENTION An object of the present invention is to provide a circuit that restarts a clock signal at an arbitrary timing when the generation of a clock signal is prohibited.

Conventionally, in microprogram control circuits that operate using microprograms, stopping part or all of the clock signal has rarely been done, but as a result of pursuing reductions in power consumption, ,
Methods of stopping clock signals are being used. In the conventional clock signal restart method, after the clock signal is stopped, the clock signal is restarted only at a fixed timing, and control by a microprogram or masking is not possible. FIG. 1 shows a conventional clock signal restart circuit. 1 is an oscillation circuit, 2 is a frequency dividing circuit, 3 and 4 are AND gates, 5 is an OR gate, and 6 is a key manual control circuit. In the conventional method, the signal given from the frequency divider circuit 2 to the AND gate 3 lasts for 1 second or 1/2 seconds.
It is fixed to 10 seconds or the like and cannot be selected. For this reason, as shown in the power consumption shown in Figure 2, in a microprogram control circuit that requires processing every 1/10 seconds, the clock signal is always activated at the clock timing of 1/10 seconds. Therefore, even in the program processing mode shown in Fig. 3, which does not require processing every 1/10 second,
Every second signal, the clock signal will be restarted,
This is a major disadvantage in reducing power consumption.

Needless to say, if it is fixed at 17100 seconds, it is a bigger disadvantage. Also, if it is fixed at 1 second, if you want to process every 1/10 second or 1/100 second, it will be impossible to stop the clock signal and the microprogram control circuit will continue to operate.
Power consumption increases significantly.

FIG. 4 shows the power consumption when the time is fixed at 1 second and processing is executed every 1/10 second. In FIGS. 2 to 4, 7 indicates the power effectively consumed by the microprogram control circuit, and 8 indicates the power consumed ineffectively by the microprogram control circuit without processing the program. As above,
Conventional clock restart circuits have a fixed clock restart timing, which poses a major problem in terms of reducing power consumption. In the present invention, in order to solve the above-mentioned problems, the clock restart timing can be set arbitrarily. As a method of setting the clock restart timing, a circuit as shown in FIG. 5 is used.

9 is a clock restart control circuit. Figure 6 shows the clock/restart control circuit. 10 is signal 1 from the frequency divider circuit
11 is a mask for obtaining several kinds of signals 13 from 2, and 11 is a PLA for selecting arbitrary signals from signals 10 and 14 by a microinstruction. By using the circuit configuration shown in Figures 5 and 6, the mask can be changed depending on the purpose of using the microprogram control circuit, and the restart timing can be set appropriately. It becomes possible to select one of the signal timings. As described above, after restarting the clock, check the mode with S-2, and if the clock processing mode requires restarting every second, perform the process with 3-3 and restart the clock for 1 second. The instruction, R3Tl: 3-4, stops the clock. After the clock is stopped, the clock is restarted from S-1 by manual keystroke or by a 1 second signal. In the case of 2Hz flashing that requires 1/2 second control, it is processed by S-5 and 1
72 seconds restart microinstruction R3T-2: The clock is stopped by s-a. The same applies to S-7 and S-8 in the case of 8 Hz alarm processing, and any other IHz or higher processing can be executed in S-3, 5, and 7 in the same manner as in the example. As described above, the present invention has great effects because the current consumption is reduced.

[Brief explanation of the drawing]

FIG. 1 is a diagram of a conventional clock signal restart circuit. Figure 2 shows
The figure which shows the state of power consumption during process execution every 1/10 second. FIG. 3 is a diagram showing power consumption when processing is executed every second in a microprogram control circuit that restarts every 1/10 seconds. Figure 4 shows 1/10 of the microprogram control circuit that restarts every second.
The figure which shows the state of power consumption when processing is performed every second. FIG. 5 is a clock signal restart circuit diagram according to the present invention. FIG. 6 is a clock restart control circuit diagram. FIG. 7 is a flowchart when using the clock signal restart circuit according to the present invention. Applicant Seiko Epson Co., Ltd. Agent Patent attorney Kizobe Suzuki and one other person Procedural amendment (voluntary)

Claims (1)

[Claims] (1) A microprogram consisting of a clock signal generation circuit that serves as the basis for the operation of various electronic circuits, a first memory circuit that stores microinstructions, a second memory circuit that stores various data, an arithmetic circuit, and an input/output circuit. In the control circuit, the clock signal generation circuit includes an inhibition circuit for stopping part or all of the clock signal, and has a microinstruction for controlling the inhibition circuit, and at the same time restarts part or all of the clock signal. 1. A microprogram control circuit comprising: a restart circuit for restarting the restart circuit; a clock restart timing of the restart circuit is specified by a microinstruction, thereby making it possible to restart the restart circuit at any timing.