JPH02201946A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH02201946A JPH02201946A JP2124589A JP2124589A JPH02201946A JP H02201946 A JPH02201946 A JP H02201946A JP 2124589 A JP2124589 A JP 2124589A JP 2124589 A JP2124589 A JP 2124589A JP H02201946 A JPH02201946 A JP H02201946A
- Authority
- JP
- Japan
- Prior art keywords
- island
- lead
- resin body
- mounting
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 239000011347 resin Substances 0.000 claims abstract description 12
- 229920005989 resin Polymers 0.000 claims abstract description 12
- 230000000149 penetrating effect Effects 0.000 claims 1
- 230000010354 integration Effects 0.000 abstract description 2
- 230000037431 insertion Effects 0.000 description 2
- 238000003780 insertion Methods 0.000 description 2
- 238000005452 bending Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置に関し、特に樹脂封止型の半導体
装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a resin-sealed semiconductor device.
従来の樹脂封止型半導体装置は、第２図に示すように、
半導体チップ１を搭載したアイランド２の周囲に配置し
て設けたリード４がこれらを封止する樹脂体８の左右両
方向に引き出され、樹脂体８の底面方向に曲げられ、さ
らにリード先端部を樹脂体８の底面と同一面内の外側方
向へ曲げて構成されていた。The conventional resin-sealed semiconductor device, as shown in FIG.
Leads 4 arranged around the island 2 on which the semiconductor chip 1 is mounted are pulled out in both the left and right directions of the resin body 8 that seals them, are bent toward the bottom surface of the resin body 8, and the lead tips are sealed with the resin. It was constructed by bending outward in the same plane as the bottom surface of the body 8.
上述した従来の半導体装置では、リード先端を含む占有
面積（実装面＠）が大きく回路基板への実装集積度を向
上できないという欠点があった。The above-mentioned conventional semiconductor device has a drawback that the occupied area (mounting surface @) including the lead tips is large, making it impossible to improve the degree of integration when mounted on a circuit board.
本発明の半導体装置は、半導体チップを搭載したアイラ
ンドと、前記アイランドの周囲に配列して設け前記半導
体チップと電気的に接続し且つコ字形に整形されたリー
ドと、前記リードの上部及び下部に設けた開孔部と、前
記リードの外側面以外の内側及び前記アイランドを含ん
で封止し且つ前記開孔部の間を貫通するスルーホールを
有する樹脂体とを有する。The semiconductor device of the present invention includes an island on which a semiconductor chip is mounted, leads arranged around the island and electrically connected to the semiconductor chip and shaped into a U-shape, and leads arranged above and below the leads. and a resin body that includes and seals the inside of the lead other than the outer surface thereof and the island, and has a through hole that penetrates between the openings.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第１図（ａ）、（ｂ）は本発明の一実施例を示す平面図
及びＡ−Ａ’線断面図である。FIGS. 1(a) and 1(b) are a plan view and a sectional view taken along the line AA', showing an embodiment of the present invention.
第１図（ａ）、（ｂ）に示すように、半導体チップ１を
搭載したアイランド２と、アイランド２の周囲に配列し
て設けて半導体チップ１の電極とボンディング線３によ
り電気的に接続され、且つコ字形に整形されたリード４
と、リード４の上部及び下部に設けた開孔部５，６と、
リード４の外側面以外の内側及びアイランド２を含んで
封止し且つ開孔部５，６の間を貫通するスルーホール７
を有する樹脂体８とを含んで半導体装置を構成する。As shown in FIGS. 1(a) and 1(b), an island 2 on which a semiconductor chip 1 is mounted, and an island 2 arranged around the island 2 and electrically connected to the electrodes of the semiconductor chip 1 by bonding wires 3. , and a lead 4 shaped into a U-shape.
and openings 5 and 6 provided at the upper and lower parts of the lead 4,
A through hole 7 that seals the inside of the lead 4 other than the outer surface thereof and the island 2 and penetrates between the openings 5 and 6.
A semiconductor device is configured including the resin body 8 having the following.
以上説明したように本発明は、リードが樹脂体の外壁に
沿って設けられ、かつ半導体装置のリード及び樹脂体を
貫通するスルーホールを有することにより、配線基板へ
の実装占有面積を減らすことができるなめ、高密度実装
が可能であり、かつ、配線基板上の半田付は及びリード
ソケット挿入及びプリント基板スルーホール挿入等に対
してパッケージの上面または下面のどちらでのリードを
使用しても搭載が可能となる効果がある。As explained above, according to the present invention, the lead is provided along the outer wall of the resin body, and the lead is provided with a through hole passing through the lead of the semiconductor device and the resin body, thereby reducing the mounting area on the wiring board. High-density mounting is possible, and it can be mounted using leads on either the top or bottom of the package for soldering on wiring boards, lead socket insertion, printed circuit board through hole insertion, etc. This has the effect of making it possible.
第１図（ａ）、（ｂ）は本発明の一実施例を示す平面図
及びＡ−Ａ′線断面図、第２図は従来の半導体装置の一
例を示す断面図である。
１・・・半導体チップ、２・・・アイランド、３・・・
ボンディング線、４・・・リード、５，６・・・開孔部
、７・・・スルーホール、８・・・樹脂体。FIGS. 1(a) and 1(b) are a plan view and a sectional view taken along the line A-A' showing an embodiment of the present invention, and FIG. 2 is a sectional view showing an example of a conventional semiconductor device. 1... Semiconductor chip, 2... Island, 3...
Bonding wire, 4... Lead, 5, 6... Opening part, 7... Through hole, 8... Resin body.
Claims (1)
の周囲に配列して設け前記半導体チップと電気的に接続
し且つコ字形に整形されたリードと、前記リードの上部
及び下部に設けた開孔部と、前記リードの外側面以外の
内側及び前記アイランドを含んで封止し且つ前記開孔部
の間を貫通するスルーホールを有する樹脂体とを有する
ことを特徴とする半導体装置。an island on which a semiconductor chip is mounted; leads arranged around the island and electrically connected to the semiconductor chip and shaped into a U-shape; and openings provided at the top and bottom of the leads; 1. A semiconductor device comprising: a resin body that includes and seals the inner side other than the outer surface of the lead and the island, and has a through hole penetrating between the openings.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2124589A JPH02201946A (en) | 1989-01-30 | 1989-01-30 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2124589A JPH02201946A (en) | 1989-01-30 | 1989-01-30 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02201946A true JPH02201946A (en) | 1990-08-10 |
Family
ID=12049675
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2124589A Pending JPH02201946A (en) | 1989-01-30 | 1989-01-30 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02201946A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5847930A (en) * | 1995-10-13 | 1998-12-08 | Hei, Inc. | Edge terminals for electronic circuit modules |
| WO1999000826A3 (en) * | 1997-06-27 | 1999-05-27 | Matsushita Electronics Corp | Resin molded type semiconductor device and a method of manufacturing the same |
| US6861735B2 (en) | 1997-06-27 | 2005-03-01 | Matsushita Electric Industrial Co., Ltd. | Resin molded type semiconductor device and a method of manufacturing the same |
-
1989
- 1989-01-30 JP JP2124589A patent/JPH02201946A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5847930A (en) * | 1995-10-13 | 1998-12-08 | Hei, Inc. | Edge terminals for electronic circuit modules |
| WO1999000826A3 (en) * | 1997-06-27 | 1999-05-27 | Matsushita Electronics Corp | Resin molded type semiconductor device and a method of manufacturing the same |
| US6861735B2 (en) | 1997-06-27 | 2005-03-01 | Matsushita Electric Industrial Co., Ltd. | Resin molded type semiconductor device and a method of manufacturing the same |
| US6900524B1 (en) | 1997-06-27 | 2005-05-31 | Matsushita Electric Industrial Co., Ltd. | Resin molded semiconductor device on a lead frame and method of manufacturing the same |
| US7538416B2 (en) | 1997-06-27 | 2009-05-26 | Panasonic Corporation | Resin molded type semiconductor device and a method of manufacturing the same |
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