JPH0220165B2 - - Google Patents

Info

Publication number
JPH0220165B2
JPH0220165B2 JP59036429A JP3642984A JPH0220165B2 JP H0220165 B2 JPH0220165 B2 JP H0220165B2 JP 59036429 A JP59036429 A JP 59036429A JP 3642984 A JP3642984 A JP 3642984A JP H0220165 B2 JPH0220165 B2 JP H0220165B2
Authority
JP
Japan
Prior art keywords
mixer
terminal
circuit
output
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59036429A
Other languages
Japanese (ja)
Other versions
JPS60180206A (en
Inventor
Kazuhiko Kubo
Akira Usui
Hiroyuki Nagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59036429A priority Critical patent/JPS60180206A/en
Publication of JPS60180206A publication Critical patent/JPS60180206A/en
Publication of JPH0220165B2 publication Critical patent/JPH0220165B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14Balanced arrangements
    • H03D7/1425Balanced arrangements with transistors
    • H03D7/1433Balanced arrangements with transistors using bipolar transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14Balanced arrangements
    • H03D7/1425Balanced arrangements with transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14Balanced arrangements
    • H03D7/1425Balanced arrangements with transistors
    • H03D7/1458Double balanced arrangements, i.e. where both input signals are differential
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D2200/00Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
    • H03D2200/0001Circuit elements of demodulators
    • H03D2200/0025Gain control circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Superheterodyne Receivers (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、チユーナーやコンバータに使用され
るミキサー及びそれに続く中間周波増幅器を集積
回路で構成する場合の高周波信号処理装置に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a high frequency signal processing device in which a mixer used in a tuner or a converter and an intermediate frequency amplifier following the mixer are constructed from an integrated circuit.

従来例の構成とその問題点 まず第1図に高周波信号の処理に関する部分の
ブロツク図を示す。第1図において、1は局部発
振器、2はRF信号を増幅する部分で、局部発振
器1、高周波増幅器2の信号は3のミキサー(混
合器)により混合され、高周波増幅器2のRF信
号は局部発振器1と高周波増幅器2の差の周波数
(中間周波数)に変換され、中間周波増幅器(以
下IFアンプと略称する)4により増幅され出力
される。
Configuration of a conventional example and its problems First, FIG. 1 shows a block diagram of a portion related to high frequency signal processing. In Fig. 1, 1 is a local oscillator, 2 is a part that amplifies the RF signal, the signals of the local oscillator 1 and the high frequency amplifier 2 are mixed by the mixer 3, and the RF signal of the high frequency amplifier 2 is amplified by the local oscillator. 1 and the high frequency amplifier 2 (intermediate frequency), and is amplified by the intermediate frequency amplifier (hereinafter abbreviated as IF amplifier) 4 and output.

最近では、デバイス技術の向上により、このよ
うなチユーナ回路のIC化が一般的に行われるよ
うになつてきており、その中でミキサーとIFア
ンプ部のIC化の従来例を第2図に示す。第2図
において、トランジスタQ1〜Q6によりダブルバ
ランス型ミキサーを構成し、図中端子,より
局部発振信号を入力し、端子,よりRF信号
を印加し、そのミキサー出力はトランジスタQ1
Q3及びトランジスタQ2,Q4のコレクタよりバラ
ンス出力として取出され、次段のIFアンプQ7
Q8のベースに印加される。IFアンプQ7,Q8のコ
レクタはICの外部端子A,Bに接続され、外部
端子A,B間に設けられたタンク回路5を通じ
て、差動出力として取り出される。本従来例にお
いては、Q1〜Q4のミキサー出力が直接Q7,Q8
IFアンプに接続されているため、ミキサーの利
得は固定化され、またミキサー、IF段の間にフ
イルタを挿入したい場合にも設計的な自由度がな
いという不都合がある。
Recently, with the improvement of device technology, it has become common to use ICs for such tuner circuits. Figure 2 shows a conventional example of using ICs for the mixer and IF amplifier sections. . In FIG. 2, a double-balanced mixer is configured by transistors Q 1 to Q 6 , a local oscillation signal is input from the terminal in the figure, an RF signal is applied from the terminal, and the output of the mixer is output from the transistors Q 1 ,
It is taken out as a balanced output from the collectors of Q 3 and transistors Q 2 and Q 4 , and is sent to the next stage IF amplifier Q 7 ,
Applied to the base of Q 8 . The collectors of the IF amplifiers Q 7 and Q 8 are connected to external terminals A and B of the IC, and are taken out as a differential output through a tank circuit 5 provided between the external terminals A and B. In this conventional example, the mixer outputs of Q 1 to Q 4 are directly connected to Q 7 and Q 8 .
Since it is connected to the IF amplifier, the gain of the mixer is fixed, and there is also the disadvantage that there is no freedom in design when it is desired to insert a filter between the mixer and the IF stage.

発明の目的 本発明は、このようなミキサーからIFアンプ
に至るIC化された高周波信号処理回路において、
その設計的自由度を与えるように構成することを
目的とするものである。
Purpose of the Invention The present invention provides an integrated circuit for high frequency signal processing circuits ranging from mixers to IF amplifiers.
The purpose of this is to provide a configuration that provides a degree of freedom in design.

発明の構成 本発明による高周波信号出力装置は、ダブルバ
ランス型ミキサーと、このミキサーの出力側に接
続されるところのエミツタホロア回路とを集積回
路にて構成し、上記ミキサーの差動出力の2つの
共通コレクタの一方のみを集積回路の外部に引出
す端子、およびこの端子より外部回路を経て上記
エミツタホロア回路に入力するための端子をそれ
ぞれ上記集積回路に設けるようにしたものであ
り、ミキサーの利得の調整が行なえ、またフイル
タ等の挿入も可能となり、設計の自由度が増すと
いう利点を有する。
Structure of the Invention The high-frequency signal output device according to the present invention comprises a double-balanced mixer and an emitter follower circuit connected to the output side of this mixer as an integrated circuit, and has two common differential outputs of the mixer. The integrated circuit is provided with a terminal for drawing out only one side of the collector to the outside of the integrated circuit, and a terminal for inputting from this terminal to the emitter follower circuit via an external circuit, and the gain of the mixer can be adjusted. It is also possible to insert filters and the like, which has the advantage of increasing the degree of freedom in design.

実施例の説明 第3図に本発明の一実施例を示す。第3図にお
いて、Q1〜Q6は第2図と同じくダブルバランス
型のミキサーであるが、ミキサー出力はシングル
出力即ち、トランジスタQ2とQ4の共通コレクタ
のみをICの外部端子Aに取出している。又、そ
の出力は外部回路(図示せず)を通じて外部端子
Bに接続し、この端子BよりIC内部に構成され
たエミツタホロアトランジスタQ7のベースに接
続されるように構成している。
DESCRIPTION OF EMBODIMENTS FIG. 3 shows an embodiment of the present invention. In Figure 3, Q 1 to Q 6 are double-balanced mixers as in Figure 2, but the mixer output is a single output, that is, only the common collector of transistors Q 2 and Q 4 is taken out to the external terminal A of the IC. ing. The output thereof is connected to an external terminal B through an external circuit (not shown), and is connected from this terminal B to the base of an emitter follower transistor Q7 formed inside the IC.

上記の如くの構成において、ICの外部に設け
た端子A,Bに接続する外部回路例を第4図に示
す。
FIG. 4 shows an example of an external circuit connected to terminals A and B provided outside the IC in the above configuration.

第4図のaは端子A,B間を結合コンデンサ6
で接続する最も簡単な例である。bは端子A,B
間に複同調回路7を挿入したもので、中間周波数
に対し、フイルタ特性をもたすものである。cは
端子A,E間に抵抗8を挿入することにより、
IC内のコレクタ負荷抵抗R1にこの抵抗8が並列
に入ることになり、ミキサー段のゲイン調整を行
なうことができる。
a in Figure 4 is a coupling capacitor 6 between terminals A and B.
This is the simplest example of connecting. b is terminal A, B
A double-tuned circuit 7 is inserted in between, and it has filter characteristics for intermediate frequencies. c is obtained by inserting a resistor 8 between terminals A and E.
This resistor 8 is connected in parallel to the collector load resistor R1 in the IC, and the gain of the mixer stage can be adjusted.

発明の効果 上記の如く、本発明によれば、ダブルバランス
ミキサーの出力をシングル出力としてICの外部
端子に取出すこと、又、次段に続くエミツタホロ
アのベース入力の端子をICの外部端子として設
けることにより、 (1) シングル出力であるので外部へは1端子出す
だけで済む。
Effects of the Invention As described above, according to the present invention, the output of the double balance mixer can be taken out as a single output to the external terminal of the IC, and the base input terminal of the emitter follower following the next stage can be provided as the external terminal of the IC. (1) Since it is a single output, only one terminal needs to be output to the outside.

(2) 端子A−B間に任意のフイルタを構成でき
る。即ち、端子Aの出力インピーダンス、端子
Bの入力インピーダンスが共に高い為、高い選
択度を有するフイルタを構成しやすい。従つて
局部発振信号の漏えい防止やイメージ除去の為
のフイルタ、又、中間周波帯の複同調フイルタ
等を容易に構成できる。
(2) An arbitrary filter can be configured between terminals A and B. That is, since both the output impedance of terminal A and the input impedance of terminal B are high, it is easy to configure a filter with high selectivity. Therefore, filters for preventing leakage of local oscillation signals and removing images, double-tuned filters for intermediate frequency bands, etc. can be easily constructed.

(3) ICの外部端子A,E間に抵抗を入れること
により、ミキサーのゲインを調節できる。これ
によりシステムトータルのゲイン調整や、後段
の歪性能に応じてゲイン調節することが可能に
なる。といつた効果が得られる。
(3) By inserting a resistor between external terminals A and E of the IC, the gain of the mixer can be adjusted. This makes it possible to adjust the gain of the total system and adjust the gain according to the distortion performance of the subsequent stage. You can get the same effect.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は高周波信号増幅装置に関する周辺回路
のブロツク図、第2図はそのミキサー及びIFア
ンプの従来例の回路図、第3図は本発明の一実施
例における高周波信号処理装置の回路図、第4図
a,b,cは第3図の外部端子に接続する回路例
を示す回路図である。 Q1〜Q6……ダブルバランス型ミキサー、Q7
…エミツタフオロアトランジスタ、A,B……外
部端子、6,7,8……外部回路。
FIG. 1 is a block diagram of a peripheral circuit related to a high frequency signal amplification device, FIG. 2 is a circuit diagram of a conventional example of the mixer and IF amplifier, and FIG. 3 is a circuit diagram of a high frequency signal processing device according to an embodiment of the present invention. 4a, b, and c are circuit diagrams showing examples of circuits connected to the external terminals of FIG. 3. FIG. Q 1 to Q 6 ...Double balance mixer, Q 7 ...
...Emitter follower transistor, A, B...External terminal, 6, 7, 8...External circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 ダブルバランス型ミキサーとこのミキサーの
次段に接続されるエミツタホロア回路を集積回路
にて構成し、上記ミキサーの差動トランジスタの
2つの共通コレクタの一方のみを集積回路の外部
に引出す端子と、外部回路を経て上記エミツタホ
ロア回路に入力するための別の入力端子を設けて
なる高周波信号処理装置。
1 A double-balanced mixer and an emitter follower circuit connected to the next stage of this mixer are configured using an integrated circuit, and a terminal for drawing out only one of the two common collectors of the differential transistors of the mixer to the outside of the integrated circuit, and an external A high frequency signal processing device provided with another input terminal for inputting to the emitter follower circuit via the circuit.
JP59036429A 1984-02-27 1984-02-27 High frequency signal processor Granted JPS60180206A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59036429A JPS60180206A (en) 1984-02-27 1984-02-27 High frequency signal processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59036429A JPS60180206A (en) 1984-02-27 1984-02-27 High frequency signal processor

Publications (2)

Publication Number Publication Date
JPS60180206A JPS60180206A (en) 1985-09-14
JPH0220165B2 true JPH0220165B2 (en) 1990-05-08

Family

ID=12469568

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59036429A Granted JPS60180206A (en) 1984-02-27 1984-02-27 High frequency signal processor

Country Status (1)

Country Link
JP (1) JPS60180206A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2806527B2 (en) * 1988-04-28 1998-09-30 松下電器産業株式会社 Double balance mixer
JP2004104414A (en) * 2002-09-09 2004-04-02 Nec Corp Push-pull amplifier and frequency conversion circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5511687A (en) * 1978-07-12 1980-01-26 Matsushita Electric Ind Co Ltd Frequency conversion circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5511687A (en) * 1978-07-12 1980-01-26 Matsushita Electric Ind Co Ltd Frequency conversion circuit

Also Published As

Publication number Publication date
JPS60180206A (en) 1985-09-14

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