JPH0548351A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPH0548351A
JPH0548351A JP3201690A JP20169091A JPH0548351A JP H0548351 A JPH0548351 A JP H0548351A JP 3201690 A JP3201690 A JP 3201690A JP 20169091 A JP20169091 A JP 20169091A JP H0548351 A JPH0548351 A JP H0548351A
Authority
JP
Japan
Prior art keywords
circuit
amplifier
output
amplifier circuit
balanced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3201690A
Other languages
Japanese (ja)
Inventor
Yoichi Aizu
要一 会津
Makoto Hasegawa
誠 長谷川
Yukio Hiraoka
幸生 平岡
Koji Higashida
康志 東田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3201690A priority Critical patent/JPH0548351A/en
Publication of JPH0548351A publication Critical patent/JPH0548351A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Abstract

PURPOSE:To obtain the compact semiconductor integrated circuit with an excellent characteristic having an amplifier circuit to drive a frequency divider circuit and to obtain a high frequency output level, and ensuring isolation when having a high frequency oscillation circuit provided in one and same chip, with respect to the semiconductor integrated circuit used for a radio communication equipment. CONSTITUTION:An amplifier circuit 2 to convert one unbalanced output of a high frequency oscillation circuit 1 into two pairs of balanced outputs is provided in the integrated circuit. Amplifiers 3, 5 amplify the respective balanced outputs. The output of the amplifier circuit 3 being a balanced output is inputted to a frequency divider circuit 4. An output of the amplifier circuit 5 being an unbalanced output is amplified further by an amplifier circuit 6. Moreover, the amplifier circuit 5 as a balanced differential amplifier not employing a capacitor is formed in the semiconductor integrated circuit together with the high frequency oscillation circuit 1.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、主として高周波発振回
路を内蔵した無線通信用の半導体集積回路の構成に関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention mainly relates to a structure of a semiconductor integrated circuit for radio communication, which has a built-in high frequency oscillation circuit.

【0002】[0002]

【従来の技術】従来より、集積回路内に構成する増幅回
路としては、信号のアイソレーションがよい、回路の動
作チェックなどの際に外部との入出力が容易等の理由か
ら、不平衡型差動増幅器が使われていた。
2. Description of the Related Art Conventionally, an unbalanced differential amplifier has been used as an amplifier circuit formed in an integrated circuit because of its good signal isolation and easy input / output with the outside when checking the operation of the circuit. A dynamic amplifier was used.

【0003】以下、図4を参照して、高周波発振回路内
蔵の集積回路内に不平衡型差動増幅器を用いて構成した
回路例について説明する。図4において、1は高周波発
振回路、4は分周回路、7,8,9,10は増幅回路で
ある。これらの増幅回路のうち、7,8,9は不平衡型
差動増幅器であり、差動増幅器を構成する1対のトラン
ジスタのうち、一方のベースをコンデンサにより接地し
ている。
An example of a circuit constructed by using an unbalanced differential amplifier in an integrated circuit having a built-in high frequency oscillation circuit will be described below with reference to FIG. In FIG. 4, 1 is a high frequency oscillator circuit, 4 is a frequency dividing circuit, and 7, 8, 9, and 10 are amplifying circuits. Of these amplifier circuits, 7, 8 and 9 are unbalanced differential amplifiers, and one base of a pair of transistors forming the differential amplifier is grounded by a capacitor.

【0004】[0004]

【発明が解決しようとする課題】しかし、以上のような
構成では、半導体集積回路で構成すると、接地されてい
る部分はサブストレートにあたるが、トランジスタ、コ
ンデンサ、抵抗等の素子にもサブストレートとの間に寄
生容量が存在する。キャリアの周波数が、例えば、VH
F帯以上のような高周波になると、サブ間容量のインピ
ーダンスが低くなり、サブストレートを経由して高周波
信号が流れやすくなる。とくに、高周波発振回路を内蔵
した場合は、上記の影響が大きくなり、アイソレーショ
ン特性の劣化を生じるという課題を有していた。
However, in the above-mentioned structure, when the semiconductor integrated circuit is used, the grounded portion corresponds to the substrate, but elements such as transistors, capacitors and resistors are also connected to the substrate. There is a parasitic capacitance between them. The frequency of the carrier is, for example, VH
When the frequency becomes higher than the F band, the impedance of the inter-sub capacitance becomes low, and the high frequency signal easily flows through the substrate. In particular, when a high-frequency oscillation circuit is built in, the above-mentioned influence becomes large, and there is a problem that the isolation characteristic deteriorates.

【0005】本発明は上記課題を解決するもので、目的
は、高周波信号に対してもアイソレーション特性を確保
することである。
The present invention solves the above problems, and an object thereof is to ensure isolation characteristics even for high frequency signals.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するた
め、本発明の技術的解決手段は、増幅回路を構成するす
べての利得を得る増幅器を、コンデンサを用いない平衡
型差動増幅器とし、各段を平衡信号で接続したものであ
る。
In order to achieve the above object, the technical solution of the present invention is to use a balanced differential amplifier that does not use a capacitor as an amplifier that obtains all the gains of the amplifier circuit. The stages are connected by a balanced signal.

【0007】[0007]

【作用】本発明は上記構成により、従来の不平衡型のよ
うな差動増幅器のトランジスタとサブストレートを結ぶ
コンデンサをなくした平衡形の差動増幅器を用い、平衡
信号で接続するので、サブストレートとの結合経路は素
子に寄生するサブ間容量のみとなり、高周波発振回路か
らサブストレートを流れて差動増幅器にまわりこむ高周
波信号の影響を減らすことができ、高周波発振回路から
の高周波信号に対するアイソレーション特性の劣化を軽
減することが可能となる。
According to the present invention, since the balanced type differential amplifier having the above-described structure eliminates the capacitor connecting the transistor and the substrate of the conventional unbalanced type differential amplifier and is connected by the balanced signal, the substrate is The coupling path with and is only the inter-sub capacitance parasitic in the element, and it is possible to reduce the influence of the high-frequency signal that flows from the high-frequency oscillation circuit to the differential amplifier and flows into the substrate. It is possible to reduce deterioration of characteristics.

【0008】[0008]

【実施例】(実施例1)以下、本発明の第1の実施例に
ついて図面を参照しながら説明する。
(Embodiment 1) A first embodiment of the present invention will be described below with reference to the drawings.

【0009】図1は、本発明における第1の実施例のブ
ロック図である。図1において、1は高周波発振回路、
2,3,5,6は増幅回路、4は分周回路である。
FIG. 1 is a block diagram of the first embodiment of the present invention. In FIG. 1, 1 is a high-frequency oscillator circuit,
2, 3, 5, and 6 are amplifier circuits, and 4 is a frequency dividing circuit.

【0010】以上のような構成において、以下その動作
を説明する。まず、高周波発振回路1は雑音特性の確保
のため、不平衡出力形式とし、増幅回路2で不平衡出力
信号を2対の平衡信号に変換し、増幅回路3と増幅回路
5に供給する。次に、増幅回路3は増幅回路2からの平
衡出力を緩衝増幅し、分周回路4を駆動する。また、も
う一方の増幅回路5は、増幅回路2からの平衡出力を所
要のレベルに増幅して不平衡出力として増幅回路6に出
力し、増幅回路6は増幅回路5の出力を緩衝増幅して高
周波不平衡出力を行う。
The operation of the above arrangement will be described below. First, the high-frequency oscillation circuit 1 has an unbalanced output format in order to ensure noise characteristics, and the amplifier circuit 2 converts the unbalanced output signal into two pairs of balanced signals and supplies them to the amplifier circuit 3 and the amplifier circuit 5. Next, the amplifier circuit 3 buffer-amplifies the balanced output from the amplifier circuit 2 and drives the frequency dividing circuit 4. The other amplifier circuit 5 amplifies the balanced output from the amplifier circuit 2 to a required level and outputs it as an unbalanced output to the amplifier circuit 6, and the amplifier circuit 6 buffers and amplifies the output of the amplifier circuit 5. Performs high frequency unbalanced output.

【0011】図1に示したブロック図を、具体的に実現
した一例の回路図が図2である。従来と異なるのは、増
幅回路3や増幅回路5をコンデンサを使わない平衡型の
差動増幅器で構成している点である。
FIG. 2 is a circuit diagram showing an example of a concrete implementation of the block diagram shown in FIG. The difference from the prior art is that the amplifier circuit 3 and the amplifier circuit 5 are configured by balanced differential amplifiers that do not use capacitors.

【0012】従来の不平衡型では、信号の周波数が高周
波になると、サブ間容量の影響が大きくなり、トランジ
スタを接地するコンデンサと合わせてサブストレート経
由で高周波信号がまわりこみ、アイソレーション特性が
劣化するという問題があったが、本実施例では、すべて
の増幅器がコンデンサを用いない平衡型となっており、
サブストレートとの結合径路を減らすことにより、アイ
ソレーション特性を改善している。
In the conventional unbalanced type, when the frequency of a signal becomes high frequency, the influence of inter-sub capacitance becomes large, and a high frequency signal circulates through the substrate together with a capacitor that grounds the transistor, and the isolation characteristic deteriorates. However, in this embodiment, all the amplifiers are of the balanced type that do not use capacitors,
Isolation characteristics are improved by reducing the coupling path with the substrate.

【0013】以上の説明から明かなように、本実施例に
よれば、高周波の信号に対するアイソレーション特性の
劣化を不平衡型差動増幅器に比べて軽減することができ
る。
As is clear from the above description, according to this embodiment, the deterioration of the isolation characteristic for high frequency signals can be reduced as compared with the unbalanced differential amplifier.

【0014】(実施例2)以下、本発明の第2の実施例
について図面を参照しながら説明する。
(Second Embodiment) A second embodiment of the present invention will be described below with reference to the drawings.

【0015】図3は、本発明における第2の実施例を示
したもので、第1の実施例と異なるのは、高周波発振回
路1と第1の増幅回路2の間に第5の増幅回路7を設け
たことと、分周回路4の出力にPLL回路を接続して、
高周波発振回路1の制御信号を得ることができるように
した点である。
FIG. 3 shows a second embodiment of the present invention. The difference from the first embodiment is that a fifth amplification circuit is provided between the high frequency oscillation circuit 1 and the first amplification circuit 2. 7 is provided, and a PLL circuit is connected to the output of the frequency dividing circuit 4,
The point is that the control signal of the high-frequency oscillator circuit 1 can be obtained.

【0016】[0016]

【発明の効果】以上のように本発明は、発振器を内蔵す
る集積回路において、2対の平衡出力信号を有する平衡
型差動増幅器を使用することにより、利得を有する増幅
器をすべて平衡差動型で構成でき、高周波発振回路とそ
の他の回路との信号のアイソレーションを確保すること
ができる。そのため、高周波ICの高機能化が実現で
き、それにともなう装置の小型化、低価格化等に対す
る、その工業的な効果は大きい。
As described above, according to the present invention, by using a balanced differential amplifier having two pairs of balanced output signals in an integrated circuit incorporating an oscillator, all amplifiers having gain are balanced differential type. It is possible to secure the signal isolation between the high frequency oscillation circuit and other circuits. Therefore, the high-performance of the high-frequency IC can be realized, and its industrial effect is large with respect to the downsizing and cost reduction of the device.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例における半導体集積回路
のブロック結線図
FIG. 1 is a block connection diagram of a semiconductor integrated circuit according to a first embodiment of the present invention.

【図2】本発明の第1の実施例における主要部である増
幅回路部の回路図
FIG. 2 is a circuit diagram of an amplifier circuit section which is a main part in the first embodiment of the present invention.

【図3】本発明の第2の実施例における半導体集積回路
のブロック結線図
FIG. 3 is a block connection diagram of a semiconductor integrated circuit according to a second embodiment of the present invention.

【図4】従来の不平衡型差動増幅器を用いた増幅回路部
の回路図
FIG. 4 is a circuit diagram of an amplifier circuit unit using a conventional unbalanced differential amplifier.

【符号の説明】[Explanation of symbols]

1 高周波発振回路 2 第1の増幅回路 3 第2の増幅回路 4 分周回路 5 第3の増幅回路 6 第4の増幅回路 1 High Frequency Oscillation Circuit 2 1st Amplifier Circuit 3 2nd Amplifier Circuit 4 Divider Circuit 5 3rd Amplifier Circuit 6 4th Amplifier Circuit

───────────────────────────────────────────────────── フロントページの続き (72)発明者 東田 康志 神奈川県横浜市港北区綱島東四丁目3番1 号 松下通信工業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Yasushi Higashida 4-3 Tsunashima Higashi 4-chome, Kohoku Ward, Yokohama City, Kanagawa Matsushita Communication Industrial Co., Ltd.

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 不平衡出力を有する高周波の発振回路
と、前記高周波発振回路の不平衡出力を第1、第2の2
対の平衡出力に変換を行う第1の増幅回路と、前記第1
の増幅回路の第1の平衡出力に接続され、緩衝増幅され
た平衡出力を得るための第2の増幅回路と、前記第2の
増幅回路に接続される分周回路と、前記第1の増幅回路
の第2の平衡出力に接続され緩衝増幅された信号を得る
ための第3の増幅回路と、高周波不平衡出力を得るため
の第4の増幅回路とを同一チップ内に有することを特徴
とする半導体集積回路。
1. A high-frequency oscillator circuit having an unbalanced output, and an unbalanced output of the high-frequency oscillator circuit having a first and a second output.
A first amplifier circuit for converting into a pair of balanced outputs;
A second amplifier circuit connected to the first balanced output of the amplifier circuit for obtaining a buffered amplified balanced output, a frequency divider circuit connected to the second amplifier circuit, and the first amplifier circuit. A third amplifier circuit connected to the second balanced output of the circuit for obtaining a buffer-amplified signal, and a fourth amplifier circuit for obtaining a high-frequency unbalanced output in the same chip. Integrated circuit.
【請求項2】 第1、第3の増幅回路が、平衡差動型増
幅回路であることを特徴とする請求項1記載の半導体集
積回路。
2. The semiconductor integrated circuit according to claim 1, wherein the first and third amplifier circuits are balanced differential amplifier circuits.
【請求項3】 第2の増幅回路が、平衡信号を各々の入
力とする2つのエミッタフォロアからなり、1対の平衡
出力を得ることを特徴とする請求項1記載の半導体集積
回路。
3. The semiconductor integrated circuit according to claim 1, wherein the second amplifier circuit is composed of two emitter followers each having a balanced signal as an input, and obtains a pair of balanced outputs.
【請求項4】 第4の増幅回路が、不平衡信号を入力と
し、不平衡出力を得るエミッタフォロアからなることを
特徴とする請求項1記載の半導体集積回路。
4. The semiconductor integrated circuit according to claim 1, wherein the fourth amplifier circuit comprises an emitter follower that receives an unbalanced signal and obtains an unbalanced output.
【請求項5】 請求項1記載の回路に加えて、高周波発
振回路と第1の増幅回路の間に、前記高周波発振回路の
不平衡出力を入力とし、不平衡出力を得るエミッタフォ
ロアからなる緩衝増幅回路をもつ半導体集積回路。
5. In addition to the circuit according to claim 1, a buffer comprising an emitter follower between the high frequency oscillator circuit and the first amplifier circuit, which receives the unbalanced output of the high frequency oscillator circuit as an input and obtains an unbalanced output. A semiconductor integrated circuit having an amplifier circuit.
【請求項6】 請求項1記載の回路と、周波数シンセサ
イザを構成するための、前記分周回路と接続して前記高
周波発振回路の制御信号を得るPLL回路とを同一チッ
プ内に有することを特徴とする半導体集積回路。
6. The circuit according to claim 1 and a PLL circuit for forming a frequency synthesizer, which is connected to the frequency dividing circuit and obtains a control signal of the high frequency oscillation circuit, in the same chip. Semiconductor integrated circuit.
JP3201690A 1991-08-12 1991-08-12 Semiconductor integrated circuit Pending JPH0548351A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3201690A JPH0548351A (en) 1991-08-12 1991-08-12 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3201690A JPH0548351A (en) 1991-08-12 1991-08-12 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPH0548351A true JPH0548351A (en) 1993-02-26

Family

ID=16445292

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3201690A Pending JPH0548351A (en) 1991-08-12 1991-08-12 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPH0548351A (en)

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