JPH0220055A - Multilayer ic package - Google Patents

Abstract

PURPOSE:To obtain a compact multilayer package capable of being housed in a socket by extending leads which are attached to the periphery of a board for mounting a first IC in the direction of the board thickness, bringing them into contact with second leads which are provided on the periphery of a second board for mounting a second IC and arranging them so as to surround the second board. CONSTITUTION:A plate-like cover 81 is put on boards 210, 220 after an IC package is housed in a socket 31. Recessed parts 81a are provided on a cover 81 so as not to touch the sealant of the boards 210, 220. When a socket is closed, the lower face of the cover 81 abuts to the upper face of the leads 41 and the upper face of the cover 81 is nearly in the same plane as the upper part end face of the socket 31. Further an outer cover 91 is put on the upper face of the cover 81 by hooking L-shaped parts of the edges of arms 91a, 91b provided on the corner parts of the outer cover 91 formed from a metal plate to the cutting parts 33 provided in the corner parts of the peripheral lower face of the socket 31. The cover 81 and packages 21, 22 pushes and presses down by a predetermined force of a spring force and are housed in the socket 31 in a stable state by a pair of spring pieces 93 provided on the outer cover 91 and bent downward.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a package structure in which an IC package is multilayered.

[Summary of the invention]

The present invention is a multi-layer package structure that can package a plurality of ICs in a multi-layer structure, which allows the number of input bits of the IC to be easily increased from 8 bits to 16 bits or from 8 bits to 24 bits. It concerns panpackages that can be changed.

[Conventional technology]

Conventionally, when making a multilayer package, ICs 11 and 12 are mounted in a ceramic package 13, 14 using ceramic or the like as shown in FIG. The leg end portion 17a of the lead frame 17 attached to the outer periphery of the ceramic package 13 and extending in the thickness direction of the package is connected to the lead frame 18 of the lower ceramic package 14.
This retaining portion is brazed or soldered to form a two-layer package.

[Problem to be solved by the invention]

However, such a conventional multilayer package structure increases the size of the entire puff cage, making it inconvenient to use. That is, when attempting to mount such a package on a small micro board, the package itself is very large, resulting in a disadvantage that the entire device becomes large.

Therefore, the wiring length (such as the length of the lead frame of the package) becomes long, and noise is easily carried, which is disadvantageous in terms of electrical characteristics.

The present invention was invented by focusing on the above-mentioned drawbacks of the conventional technology.
The purpose is to obtain a small and compact multilayer 1c package.

[Means to solve the problem]

A first board on which a first IC is mounted, a first lead terminal attached to the outer periphery of this first board, a second board on which a second IC is mounted, and a second board on which a second IC is mounted; a second lead attached to the outer periphery of the substrate;
The multilayer IC package is arranged such that the leads extend in the thickness direction of the substrate and are in corresponding contact with the second leads so as to surround the second substrate.

[Effect]

That is, 1st. Each IC is bonded to the second substrate by a bonding means such as wire bonding or gigantic bonding, and the IC portion and the bonded portion are sealed with a sealant sealant. Then, lead terminals having, for example, a U-shaped cross section are attached to the outer periphery of these boards, and the lead terminals of one board are extended and dimensioned so that they correspond to and contact the lead terminals of the other board. By elastically wrapping or sandwiching the other board between the lead terminals of one, a multilayer package can be obtained in which the two can be made into one unit that can be disassembled.

〔Example〕

Hereinafter, the present invention will be described based on an embodiment shown in the accompanying drawings.

First, in FIG. 1, in this embodiment, a multilayer 1c package 21, 22 according to the present invention is connected to a package socket 3.
This example describes the case where the storage device is stored in 1.

This multilayer IC package 21, 22 has a two-layer structure,
A first board 210 on which a first IC is mounted, a lead terminal 41 having a sandwiching part 41a with a U-shaped cross section attached to the outer periphery of the board 210 with solder or conductive adhesive, and a second board 210. Second board 2 with IC mounted
20 and the first substrate 21 on the outer periphery of this substrate 220.
0, and a second lead terminal 51 having a U-shaped cross section and attached by the same joining means as 0.

The first substrate 210 is a rectangular, for example, glass epoxy resin substrate, and as shown in FIG. 3, a concave portion 21a is formed in the center of the substrate, and a 4FROMIC 61 (for example, 8 pins) is mounted in this portion. has been done. This IC
61 is a wire 61b that connects the bonding pattern of the printed wiring arranged on the top surface of the board 210 and the bonding pad 61a of the IC 61 (see FIG. 4), and the output and input terminals of the IC 61 are , a terminal attachment pattern 21c provided on the outer periphery of the substrate 210 is guided.

That is, these patterns 21C correspond to the shape of the lead terminal 41, and the width of the pattern 21C is determined according to the width of the lead terminal 41. Then, by sandwiching the U-shaped cross section of the lead terminal 41 between the pattern 21C on the outer periphery of the board 210, the lead terminal 41 is temporarily fixed to the board 210, and the paste solder that has been pre-coated on the pattern 21c is removed. Alternatively, the attached solder placed in a solder bath is heated and melted, thereby firmly fixing the lead terminal 41 to the pattern 2IC with the solder 42.

Further, the second substrate 220 is substantially the same as the first substrate 21.
The structure is the same as that of 0, and the same parts will be explained with corresponding symbols and will be explained intermittently. In the case of this second board 220, the second lead 51 is different from the first lead 41, and the first lead 41 is in the thickness direction of the board 210, that is, in the lower surface direction of the board 210. This second lead 5 has an extended portion 21d.
1 is different in that it does not have this extension. In addition, the second
The substrate 220 has a planar dimension smaller than that of the first substrate 210 by the thickness of the lead 41.

That is, the first of these. The second substrates 210 and 220 have a cross-sectional view shown in FIG. 2 in an assembled state. In this case, the first substrate 210 is surrounded by first glue dots 41 evenly spaced around the circumference of the first board 210, and a second The second glue 51 provided on the outer periphery of the substrate 220 is placed in contact with the inner surface of the first glue 41, and in this state, the first glue 51 is placed in contact with the inner surface of the first glue 41. 2nd lead 41.5
1 are arranged to coincide and overlap with each other.

In this case, 1. The pattern wiring of the second substrates 210 and 220 has common terminals (IC61,
62 common output terminals or common input terminals) from the pad of the IC to the first. Wiring is done up to the second lead 41.51, but for non-common terminals (output and input terminals specific to each IC61 and 62), the wiring from the pad of each IC is common to the lead 41.51. So as not to,
For example, if the wiring from the IC band reaches the lead 41 on the substrate 210, the lead 51 is not wired in that portion on the substrate 220.

For example, when writing or reading is being performed on the first IC 51, the second IC 62 is chimp-disenabled and the upper and lower ICs are driven in a time-division manner. (In order to standardize the Ic terminals, the number of leads on the outer periphery of the board is reduced.

The IC packages 21 and 22 of this embodiment are assembled in this manner and housed in the socket 31.

The stored state is as shown in Figure 2. That is, the leads 41 of the first board 210 are pushed in against the spring force of the spring pieces 32 that elastically protrude from the inner peripheral portion of the socket, and are elastically clamped.

As a result, the IC packages 21 and 22 are housed in the socket 31 while being held almost evenly by the inwardly protruding spring pieces 32 provided in series on all four sides of the socket. In this state, the lead tip 216 of the first lead 41 is pressed in the direction of the arrow, so the contact pressure with the second lead 51 is increased, weakening the contact resistance and ensuring electrical continuity. It can be made into something.

In this case, the first. As a spacer for maintaining the distance between the second substrates 41 and 51, a cylindrical screw pin indicated by reference numeral 71 may be used. Is this screw pin 71 a screw? 2a and 71b to the substrates 210 and 220, so that the gap B between the substrates is determined by the screw pin 71. In this case, if you want the screw pin 71 to be used only for the spacer, one screw 72b can be omitted and the brush 1. Second board 2
10.220 can always be freely disassembled and assembled. Generally, the first. Second substrate 210, 22
1st of 0. If the outer circumferential dimensions of the second leads 41 and 51 are made with high precision, the second board 220 can be snugly housed within the leads 41 of the first board 210.
I purposely used two screws T2a and 72b to fix the first. It is not necessary to firmly bond the second substrate 210, 220, especially when the IC is an EFROM, the encapsulant should be transparent and UV-enabled, and the first. Second substrate 210, 22
Since it is better to be able to easily disassemble 0, one side of the board is shown in Figure 5 (
The number of lead terminals is written as small. ), or instead of using the screw pin 71, the first and second leads 41, 51 may be brought into contact with each other at the C portion to provide a gap between the boards.

In this manner, with the IC pancage of the present invention housed in the socket 31, the plate-shaped lid 81 is placed over the first substrates 210 and 220, as shown in FIG.

In this case, a recess 81a is provided in the lid 81 to prevent it from coming into contact with the sealant on the upper surface of the substrates 210, 220, thereby closing the socket. In this state, the lower surface of the lid 81 is in contact with the upper surface of the lead 41, and the upper surface of the lid 81 is substantially flush with the upper end surface of the socket 31.

In this state, as shown in FIG. 1, arms 91a and 91b provided at the corners of the outer lid body 91 formed of a metal plate are inserted into the notches 33 provided at the corners of the lower outer circumference of the socket 31. By hooking the tip-shaped portion 92, the outer lid body 91 is placed over the top surface of the lid body 81.

In this state, the lid 81 and the package 21.22 are pressed downward with a predetermined spring force by a pair of downwardly bent spring pieces 93.93 provided on the outer lid 91, and are stabilized in the socket 31. It will be stored in the condition.

In the above embodiments of the present invention, an example of a 211C pancage has been shown, but the structure is not limited to two layers, and based on the same idea, a layer with a lead of 4 minutes from the first substrate 210 can be formed on top of the first substrate 210. By providing a larger third substrate and attaching leads similar to those of the first substrate 210, this third substrate is further stacked on top of the first substrate 210.
Of course, it is possible to form a layered package, and according to the same idea, it is also possible to obtain a multiple package by stacking four or five layers.

Further, the substrate may be made of ceramic, and the IC molding resin may be opaque.

〔Effect of the invention〕

According to the configuration of the present invention, the structure is such that the second board 220 is housed within the leads 41 provided on the outer periphery of the first board 210, so that the structure can be made smaller and compact enough to be stored in a socket. A multi-layer package can be obtained. This allows the multilayer puff cage to be compactly assembled onto a mounting board via the socket.

Furthermore, since the wiring length from the rc to the external terminal can be shortened, a package that is less affected by external noise can be obtained.

Furthermore, manufacturing costs are low because an inexpensive substrate such as a Gala Evo substrate can be used.

In addition, the ICs housed in the package part of the Biggie Bassockage, which is one of the CPU support tools, are multilayered.
Even when the number of bits is doubled using an existing IC, it is extremely easy to use and has a great effect.

[Brief explanation of the drawing]

1 to 5 show an embodiment of the present invention. Figure 1 is a perspective view, Figure 2 is a partially assembled sectional view, Figure 3 is an assembled sectional view of the pan cage section, Figure 4 is a partial (1/4) plan view of the package assembled into the socket, and Figure 5 is a partial (1/4) plan view of the package assembled into the socket. The figure is a perspective view of a puff cage showing another example of the first package;
FIG. 6 is an assembled sectional view of a conventional ceramic package. 21・ 22・ 41・ 51・ 61・ 62・ First package Second package First lead Second lead First IC Second IC First board Second board Above Applicant: Seiko Electronic Industries Co., Ltd.

Claims (1)

[Claims] A first board on which a first IC is mounted, a first lead terminal attached to the outer periphery of this first board, a second board on which a second IC is mounted, and a second board on which a second IC is mounted; a second lead attached to the outer periphery of the substrate;
The multilayer IC package is arranged such that the leads extend in the thickness direction of the substrate and are in corresponding contact with the second leads so as to surround the second substrate.