JPH02189937A - Manufacture of charge-coupled device - Google Patents

Manufacture of charge-coupled device

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Publication number
JPH02189937A
JPH02189937A JP921089A JP921089A JPH02189937A JP H02189937 A JPH02189937 A JP H02189937A JP 921089 A JP921089 A JP 921089A JP 921089 A JP921089 A JP 921089A JP H02189937 A JPH02189937 A JP H02189937A
Authority
JP
Japan
Prior art keywords
layer
oxide film
gate oxide
transfer electrode
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP921089A
Other languages
Japanese (ja)
Inventor
Takeshi Ando
安藤 岳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP921089A priority Critical patent/JPH02189937A/en
Publication of JPH02189937A publication Critical patent/JPH02189937A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To increase the quantity of storable transferable charges while improving insulating properties between transfer electrodes by separately forming first layer and second layer gate oxide films and an insulating oxide film, and thinning the gate oxide films while sufficiently thickening the insulating oxide film. CONSTITUTION:A first layer gate oxide film 3, an insulating oxide film 6 and a second layer gate oxide film 7 are shaped respectively. Each gate oxide film 3, 7 is thinned while the insulating oxide film 6 is formed in thick size. Consequently, insulating properties between transfer electrodes 5A, 8 are improved while the two contradictive conditions of the increase of the quantity of storable transferable charges can be satisfied. Since the first layer transfer electrode 5A is coated with the insulating oxide film 6 when the second layer gate oxide film 7 is manufactured in the manufacture, a polycrystalline silicon film containing an impurity is not exposed, thus preventing the generation of partial defective transfer due to the outer diffusion of the impurity.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電荷結合装置(CCD)の製造方法に関し、特
に2層に配列した転送電極の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a charge coupled device (CCD), and more particularly to a method for manufacturing transfer electrodes arranged in two layers.

〔従来の技術〕[Conventional technology]

従来、この種の電荷結合装置の製造方法として、第3図
(a)乃至第3図(e)に示す方法がある。
Conventionally, as a method for manufacturing this type of charge-coupled device, there is a method shown in FIGS. 3(a) to 3(e).

これらの図は、電荷結合装置の電荷の転送方向の縦断面
図である。
These figures are longitudinal cross-sectional views of the charge-coupled device in the direction of charge transfer.

先ず、第3図(a)のように、シフトレジスタのウェル
2が形成されたシリコン基板1上に数百人の1層目のゲ
ート酸化膜3を熱酸化法により成長する。そして、この
ゲート酸化膜3上に、第3図(b)のように、数千人の
1層目の多結晶シリコン膜5を化学気相成長法により堆
積する。
First, as shown in FIG. 3(a), several hundred first layer gate oxide films 3 are grown by thermal oxidation on a silicon substrate 1 on which wells 2 of a shift register are formed. Then, as shown in FIG. 3(b), several thousand first layer polycrystalline silicon films 5 are deposited on this gate oxide film 3 by chemical vapor deposition.

次いで、第3図(C)のように、図外のフォトレジスト
等を用いたフォトリソグラフ法により1層目の多結晶シ
リコン膜5を選択エツチングして1層目の転送電極5A
を形成する。これと同時に、これら1層目の転送電極5
A間の基板表面、即ち2層目の多結晶シリコン転送電極
形成領域のシリコン基板を露出させる。
Next, as shown in FIG. 3(C), the first layer polycrystalline silicon film 5 is selectively etched by photolithography using a photoresist or the like (not shown) to form the first layer transfer electrode 5A.
form. At the same time, these first layer transfer electrodes 5
The surface of the substrate between A, that is, the silicon substrate in the region where the second layer polycrystalline silicon transfer electrode is to be formed is exposed.

続いて、第3図(d)のように、数百穴の2層目のゲー
ト酸化膜9を熱酸化法により成長させる。
Subsequently, as shown in FIG. 3(d), a second layer gate oxide film 9 with several hundred holes is grown by thermal oxidation.

その後、全面に2層目の多結晶シリコン膜を化学気相成
長法により堆積させ、これをフォトリソグラフィ法によ
り選択エツチングすることで、第3図(e)のように、
2層目の転送電極8を形成する。
After that, a second layer of polycrystalline silicon film is deposited on the entire surface by chemical vapor deposition, and selectively etched by photolithography, as shown in FIG. 3(e).
A second layer of transfer electrodes 8 is formed.

なお、2層目のゲート酸化膜9は1層目の転送電極5A
と2層目の転送電極8との間の絶縁膜として機能する。
Note that the second layer gate oxide film 9 is the first layer transfer electrode 5A.
It functions as an insulating film between the transfer electrode 8 and the second layer transfer electrode 8.

[発明が解決しようとする課題〕 前述した従来の電荷転送装置の製造方法では、1層目及
び2層目の各転送電極5A、8間の絶縁性を高めるため
に2層目のゲート酸化B’!、9の膜厚を厚くすると、
蓄積、転送可能な電荷量が減少してしまう。一方、蓄積
、転送可能な電荷量を増すために2層目」のデー1−酸
化膜9の膜厚を薄くすれば、両転逆電極5A18間の絶
縁性が劣化してしまう。このため、転送電極間の絶縁性
を高め、かつ蓄積、転送可能な電荷量を増すという2つ
の要請を同時に満たずことができないという問題がある
[Problems to be Solved by the Invention] In the conventional method for manufacturing a charge transfer device described above, gate oxidation B in the second layer is '! , 9 becomes thicker.
The amount of charge that can be stored and transferred decreases. On the other hand, if the thickness of the "second layer" D1-oxide film 9 is made thinner in order to increase the amount of charge that can be stored and transferred, the insulation between the bi-inverting and reverse electrodes 5A18 will deteriorate. Therefore, there is a problem in that it is not possible to simultaneously satisfy the two requirements of increasing the insulation between the transfer electrodes and increasing the amount of charge that can be stored and transferred.

また、電気伝導度を高めるために[層I」の転送電極5
Aに導入した不純物が、2層目のゲーI・酸化膜9を熱
酸化法により成長させる段階におい゛C外方拡散し、こ
の不純物が露出したシリコン基板1に入す込み易い。こ
のため、シフトレシスクのウェル2の濃度むらを生し、
局所的な転送不良が生じ易くなるという問題もある。
In addition, in order to increase the electrical conductivity, the transfer electrode 5 of [layer I] is
The impurity introduced into A diffuses outward during the step of growing the second layer I/oxide film 9 by thermal oxidation, and this impurity easily enters the exposed silicon substrate 1. This results in uneven concentration in well 2 of the shiftless disk.
There is also the problem that local transfer failures are more likely to occur.

本発明は上述した矛盾する問題を解消し、かつ転送不良
を防止する電荷転送装置の製造方法を提供することを目
的とする。
An object of the present invention is to provide a method of manufacturing a charge transfer device that solves the above-mentioned contradictory problems and prevents transfer failures.

〔課題を解決するための手段] 本発明の電荷転送装置の製造方法は、半導体基板」二に
1層目のデー1〜酸化膜を形成し、かつこの1層目のゲ
ート酸化膜−にの2層目の転送電極形成領域に選択的に
窒化膜を形成する工程と、前記1層目のゲート酸化膜上
に多結晶シリコンにより1層目の転送電極を選択的に形
成する工程と、前記1層目の転送電極の表面に厚い絶縁
酸化膜を成長させる工程と、前記窒化膜及び1層目のデ
ー1−酸化膜を除去して2層目の転送電極形成領域の前
記半導体基板の表面を露出さ一已る工程と、少なくとも
この露出された半導体基板の表面に2層目のゲート酸化
膜を成長する工程と、この2層目のゲト酸化股上に2層
目の転送電極を形成する工程とを含んでいろ。
[Means for Solving the Problems] A method for manufacturing a charge transfer device of the present invention includes forming a first layer of oxide film on a semiconductor substrate, and forming a first layer of gate oxide film on the first layer of gate oxide film. a step of selectively forming a nitride film in a second layer transfer electrode formation region; a step of selectively forming a first layer transfer electrode of polycrystalline silicon on the first layer gate oxide film; A step of growing a thick insulating oxide film on the surface of the first layer transfer electrode, and removing the nitride film and the first layer D1-oxide film to form a second layer transfer electrode on the surface of the semiconductor substrate. a step of exposing the semiconductor substrate, a step of growing a second layer of gate oxide film on at least the exposed surface of the semiconductor substrate, and a step of forming a second layer of transfer electrode on the top of this second layer of gate oxide. Include the process.

〔作用〕[Effect]

」二速した製造方法では、1層目及び2層目のゲート酸
化膜と、絶縁酸化膜とは個別に製造でき、各ゲート酸化
膜を薄く形成する一方で、絶縁酸化膜を充分に厚(形成
できる。また、2層目のゲート酸化膜の成長時には、1
層目の転送電極を絶縁酸化膜で被覆し、該転送電極から
の不純物の拡散が防止できる。
In the two-speed manufacturing method, the first and second gate oxide films and the insulating oxide film can be manufactured separately, and each gate oxide film can be formed thinly, while the insulating oxide film can be formed sufficiently thick ( Also, when growing the second layer gate oxide film,
By covering each transfer electrode with an insulating oxide film, diffusion of impurities from the transfer electrode can be prevented.

[実施例] 次に、本発明を図面を参照して説明する。[Example] Next, the present invention will be explained with reference to the drawings.

第11m(a)乃至第1図(h)は本発明の一実施例を
製造工程順に示す図であり、転送方向に平行な縦断面図
である。
11m(a) to 1(h) are views showing one embodiment of the present invention in the order of manufacturing steps, and are longitudinal sectional views parallel to the transfer direction.

先ず、第1図(a)のように、シフトレジスクのウェル
2が形成されたシリコン基板11に、数百穴の1層目の
ゲート酸化膜3を熱酸化法により成長し、更に数百穴の
窒化膜4を化学気相成長法により堆積する。その後、図
外のフォトレジスト等を用いたフォトリソグラフ法によ
り、第1図(b)のように、1層目の転送電極形成領域
における前記窒化膜4を選択的に除去し、後に2層1」
の転送電極を形成する領域にのみ残す。
First, as shown in FIG. 1(a), a first layer gate oxide film 3 with several hundred holes is grown by thermal oxidation on a silicon substrate 11 on which wells 2 of a shift resist are formed, and then several hundred holes are grown. A nitride film 4 is deposited by chemical vapor deposition. Thereafter, as shown in FIG. 1(b), the nitride film 4 in the first layer transfer electrode formation region is selectively removed by photolithography using a photoresist or the like (not shown), and later the second layer 1 is removed. ”
Leave only the area where the transfer electrode will be formed.

次いで、この上に第1図(C)のように、数千人の1層
目の多結晶シリコン膜5を化学気相成長法により堆積す
る。そして、図外のフォ1へレジスト等を用いたフォト
リソグラフ法により1層目の多結晶シリコン膜5を選択
エツチングし〜第1図(d)のように、1層目の転送電
極5Aを形成する。このとき、前記窒化膜4を除去した
際に用いたマスクをそのまま利用すれば、前記窒化膜4
が存在しない領域にのみ1層目の転送電極5Aを容易に
形成できる。
Then, as shown in FIG. 1C, several thousand first layer polycrystalline silicon films 5 are deposited thereon by chemical vapor deposition. Then, the first layer of polycrystalline silicon film 5 is selectively etched by a photolithography method using a resist or the like on photo 1 (not shown) to form the first layer of transfer electrode 5A as shown in FIG. 1(d). do. At this time, if the mask used when removing the nitride film 4 is used as is, the nitride film 4
It is possible to easily form the first layer transfer electrode 5A only in the region where the transfer electrode 5A does not exist.

更に、第1図(e)のように、1層目の転送電極5Aの
表面に、熱酸化法により数千人の充分に厚い絶縁酸化膜
6を成長させる。このとき窒化膜4の耐酸化性から窒化
膜4上には絶縁酸化膜6はほとんど成長しない。
Furthermore, as shown in FIG. 1(e), a sufficiently thick insulating oxide film 6 of several thousand layers is grown on the surface of the first layer transfer electrode 5A by thermal oxidation. At this time, the insulating oxide film 6 hardly grows on the nitride film 4 due to the oxidation resistance of the nitride film 4.

次いで、第1図(f)のように、前記窒化膜4を選択的
にエツチング除去し、その後酸化膜3及び6のエツチン
グを行う。このとき、絶縁酸化膜6は充分に厚いため、
1層目のゲート酸化膜3をエツチング除去して2層目の
転送電極形成領域のシリコン基板1を露出させた後も、
絶縁酸化膜6は1層目の転送電極5A上では数百乃至数
千人の膜厚を有する。
Next, as shown in FIG. 1(f), the nitride film 4 is selectively etched away, and then the oxide films 3 and 6 are etched. At this time, since the insulating oxide film 6 is sufficiently thick,
Even after the first layer gate oxide film 3 is etched away to expose the silicon substrate 1 in the second layer transfer electrode formation region,
The insulating oxide film 6 has a thickness of several hundred to several thousand layers on the first layer transfer electrode 5A.

続いて、第1図(g 、)のように、数百人の2層目の
ゲート酸化膜7を熱酸化法により全面に成長する。そし
て、全面に2層目の多結晶シリコン膜を成長させ、これ
を選択的にエツチングすることで、第1図(h)のよう
に、2層目の転送電極8を形成する。
Subsequently, as shown in FIG. 1(g), several hundred second layer gate oxide films 7 are grown over the entire surface by thermal oxidation. Then, by growing a second layer of polycrystalline silicon film over the entire surface and selectively etching it, a second layer of transfer electrode 8 is formed as shown in FIG. 1(h).

このようにして形成された転送電極の構造では、1層目
のゲート酸化膜3.絶縁酸化膜6.及び2層目のゲート
酸化膜7を夫々個別に形成しているので、各ゲート酸化
膜3,7を薄くする一方で絶縁酸化膜6を厚く形成する
ことが可能となり、転送電極5A、8間の絶縁性を高め
る一方で、蓄積転送可能な電荷量を増すという2つの矛
盾する条件を満足することが可能となる。
In the structure of the transfer electrode formed in this way, the first layer of gate oxide film 3. Insulating oxide film 6. Since the gate oxide film 7 and the second layer gate oxide film 7 are formed separately, it is possible to make the insulating oxide film 6 thick while making each gate oxide film 3 and 7 thinner, so that the gate oxide film 7 between the transfer electrodes 5A and 8 can be made thicker. It becomes possible to satisfy the two contradictory conditions of increasing the amount of charge that can be stored and transferred while improving the insulation properties of the semiconductor device.

また、この製造方法では、2層目のゲート酸化膜7を製
造する際には、1層目の転送電極5Aを絶縁酸化膜6で
被覆しているので、これにより不純物を含む多結晶シリ
コン膜が露呈されることがなく、不純物の外方拡散によ
る局所的な転送不良の発生を防止することもできる。
In addition, in this manufacturing method, when manufacturing the second layer gate oxide film 7, the first layer transfer electrode 5A is covered with the insulating oxide film 6, so that the polycrystalline silicon film containing impurities is coated with the insulating oxide film 6. It is also possible to prevent local transfer failures due to outward diffusion of impurities.

第2図は本発明の他の実施例を示しており、製造工程の
一部、即ち、第1図(d)に対応する工程を示す縦断面
図である。
FIG. 2 shows another embodiment of the present invention, and is a longitudinal sectional view showing a part of the manufacturing process, that is, a step corresponding to FIG. 1(d).

この実施例では、第1図(a)乃至第1図(c)に示し
たように1層目のゲー゛ト酸化膜3.窒化膜4、及び1
層目の多結晶シリコン膜5を形成した後に、1層目の転
送電極5Aを形成するが、この際に1層目の転送電極5
Aの一部が窒化膜4上に重なるようにして形成する点に
特徴を有している。
In this embodiment, as shown in FIGS. 1(a) to 1(c), the first layer of gate oxide film 3. Nitride films 4 and 1
After forming the first layer of polycrystalline silicon film 5, the first layer of transfer electrode 5A is formed.
It is characterized in that a portion of A is formed so as to overlap with the nitride film 4.

その後、第1図(c)乃至第1図(h)と同様の工程に
より転送電極構造を完成する。
Thereafter, the transfer electrode structure is completed by the same steps as in FIGS. 1(c) to 1(h).

この実施例では、1層目の転送電極5Aの一部を窒化膜
4に重ねているため、1層目の転送電極5A形成時に水
平方向の位置ずれが生じても、2層1]の転送電極形成
領域のシリコン基板1の表面が露呈されることを防ぎ、
シリコン基板1への不純物の侵入を確実に防止すること
ができる。したがって、1層目の転送電極5Aの形成時
における自由度を高めることが可能となる。
In this example, since a part of the first layer transfer electrode 5A is overlapped with the nitride film 4, even if a horizontal positional shift occurs when forming the first layer transfer electrode 5A, the transfer of the second layer 1] Preventing the surface of the silicon substrate 1 in the electrode formation region from being exposed,
Intrusion of impurities into the silicon substrate 1 can be reliably prevented. Therefore, it is possible to increase the degree of freedom in forming the first layer transfer electrode 5A.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、1層目及び2層目のゲー
ト酸化膜と、絶縁酸化膜とは個別に製造するので、これ
らのゲート酸化膜を薄く形成する一方で、絶縁酸化膜を
充分に厚く形成でき、蓄積。
As explained above, in the present invention, since the first and second gate oxide films and the insulating oxide film are manufactured separately, these gate oxide films can be formed thinly, while the insulating oxide film can be formed sufficiently. It can form thickly and accumulate.

転送可能な電荷量を増す一方で、転送電極間の絶縁性を
高めることができる。また、2層目のゲート酸化膜の成
長時には、1層目の転送電極を絶縁酸化膜で被覆してい
るので、該転送電極から不純物がシリコン基板に拡散す
ることが防止でき、シフトレジスタのウェルにおける濃
度むらを防ぎ、局所的な転送不良の発生を防止すること
ができる効果がある。
While increasing the amount of charge that can be transferred, it is possible to improve the insulation between the transfer electrodes. In addition, when growing the second layer gate oxide film, the first layer transfer electrode is covered with an insulating oxide film, which prevents impurities from diffusing from the transfer electrode into the silicon substrate. This has the effect of preventing density unevenness in the area and preventing local transfer failures from occurring.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)乃至第1図(h)は本発明の一実施例を製
造工程順に示す縦断面図、第2図は本発明の他の実施例
の製造工程の一部を示す縦断面図、第3図(a)乃至第
3図(e)は従来の製造方法を製造工程順に示す縦断面
図である。 ■・・・シリコン基板、2・・・ウェル、3・・・1層
目のゲート酸化膜、4・・・窒化膜、5・・・1層目の
多結晶シリコン膜、5A・・・1層目の転送電極、6・
・・絶縁酸化膜、7・・・2層目のゲート酸化膜、8・
・・2層目の転送電極、9・・・2層目のゲート酸化膜
。 第 ■ 図 第3 図
FIG. 1(a) to FIG. 1(h) are vertical cross-sectional views showing one embodiment of the present invention in the order of manufacturing steps, and FIG. 2 is a vertical cross-sectional view showing a part of the manufacturing process of another embodiment of the present invention. 3(a) to 3(e) are vertical sectional views showing a conventional manufacturing method in the order of manufacturing steps. ■...Silicon substrate, 2...Well, 3...1st layer gate oxide film, 4...Nitride film, 5...1st layer polycrystalline silicon film, 5A...1 Layer transfer electrode, 6.
... Insulating oxide film, 7... Second layer gate oxide film, 8.
...Second layer transfer electrode, 9...Second layer gate oxide film. Figure ■ Figure 3

Claims (1)

【特許請求の範囲】[Claims] 1、半導体基板上に1層目のゲート酸化膜を形成し、か
つこの1層目のゲート酸化膜上の2層目の転送電極形成
領域に選択的に窒化膜を形成する工程と、前記1層目の
ゲート酸化膜上に多結晶シリコンにより1層目の転送電
極を選択的に形成する工程と、前記1層目の転送電極の
表面に厚い絶縁酸化膜を成長させる工程と、前記窒化膜
及び1層目のゲート酸化膜を除去して2層目の転送電極
形成領域の前記半導体基板の表面を露出させる工程と、
少なくともこの露出された半導体基板の表面に2層目の
ゲート酸化膜を成長する工程と、この2層目のゲート酸
化膜上に2層目の転送電極を形成する工程とを含むこと
を特徴とする電荷結合装置の製造方法。
1. Forming a first layer of gate oxide film on a semiconductor substrate, and selectively forming a nitride film in a region where a second layer of transfer electrode is to be formed on this first layer of gate oxide film; a step of selectively forming a first layer transfer electrode using polycrystalline silicon on the gate oxide film of the first layer; a step of growing a thick insulating oxide film on the surface of the first layer transfer electrode; and a step of growing the nitride film. and removing the first layer gate oxide film to expose the surface of the semiconductor substrate in the second layer transfer electrode formation region;
The method includes at least the steps of growing a second layer of gate oxide film on the exposed surface of the semiconductor substrate, and forming a second layer of transfer electrode on this second layer of gate oxide film. A method for manufacturing a charge-coupled device.
JP921089A 1989-01-18 1989-01-18 Manufacture of charge-coupled device Pending JPH02189937A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP921089A JPH02189937A (en) 1989-01-18 1989-01-18 Manufacture of charge-coupled device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP921089A JPH02189937A (en) 1989-01-18 1989-01-18 Manufacture of charge-coupled device

Publications (1)

Publication Number Publication Date
JPH02189937A true JPH02189937A (en) 1990-07-25

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP921089A Pending JPH02189937A (en) 1989-01-18 1989-01-18 Manufacture of charge-coupled device

Country Status (1)

Country Link
JP (1) JPH02189937A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5858811A (en) * 1994-11-28 1999-01-12 Nec Corporation Method for fabricating charge coupled device (CCD) as semiconductor device of MOS structure
WO2007086204A1 (en) * 2006-01-30 2007-08-02 Matsushita Electric Industrial Co., Ltd. Double gate isolation structure for ccds and corresponding fabricating method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5858811A (en) * 1994-11-28 1999-01-12 Nec Corporation Method for fabricating charge coupled device (CCD) as semiconductor device of MOS structure
WO2007086204A1 (en) * 2006-01-30 2007-08-02 Matsushita Electric Industrial Co., Ltd. Double gate isolation structure for ccds and corresponding fabricating method
US7964451B2 (en) 2006-01-30 2011-06-21 Panasonic Corporation Solid state imaging device and method for fabricating the same

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