JP3036747B2 - Method for manufacturing solid-state imaging device - Google Patents
Method for manufacturing solid-state imaging deviceInfo
- Publication number
- JP3036747B2 JP3036747B2 JP63237707A JP23770788A JP3036747B2 JP 3036747 B2 JP3036747 B2 JP 3036747B2 JP 63237707 A JP63237707 A JP 63237707A JP 23770788 A JP23770788 A JP 23770788A JP 3036747 B2 JP3036747 B2 JP 3036747B2
- Authority
- JP
- Japan
- Prior art keywords
- imaging device
- state imaging
- gate insulating
- insulating film
- polycrystalline silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Solid State Image Pick-Up Elements (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は固体撮像素子の製造方法に関し、特に2層多
結晶シリコン構造を有する電荷結合素子(CCD)の製造
方法に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a solid-state imaging device, and more particularly, to a method for manufacturing a charge-coupled device (CCD) having a two-layer polycrystalline silicon structure.
従来、この種の2層多結晶シリコン電極構造の電荷結
合素子を用いた固体撮像素子は、第3図に平面図、第4
図(a)に第3図のI−I′面の断面図、第4図(b)
に第3図のII−II′面の断面図を示した様に、P型半導
体基板1にP−N接合により形成した複数個の光電変換
部2と、信号電荷を転送するN型領域6、ゲート絶縁膜
10及び2層の多結晶シリコン膜11,12から成る電荷転送
部3と、光電変換部2から電荷転送部3へ信号電荷を読
み出すトランスファゲート部4と隣接した光電変換部2
及び電荷転送部3を電気的に分離するチャンネルストッ
プ5とを有していた。Conventionally, this type of solid-state imaging device using a charge-coupled device having a two-layer polycrystalline silicon electrode structure is shown in FIG.
FIG. 4A is a cross-sectional view taken along the line II ′ of FIG. 3, and FIG.
As shown in the sectional view taken along the line II-II 'of FIG. 3, a plurality of photoelectric converters 2 formed by a PN junction on a P-type semiconductor substrate 1 and an N-type region 6 for transferring signal charges. , Gate insulating film
A charge transfer section 3 composed of 10 and two layers of polycrystalline silicon films 11 and 12; and a photoelectric conversion section 2 adjacent to a transfer gate section 4 for reading signal charges from the photoelectric conversion section 2 to the charge transfer section 3.
And a channel stop 5 for electrically separating the charge transfer unit 3.
第5図は従来の固体撮像素子の主な製造工程における
電荷転送部の断面図の一例である。P型半導体基板1内
に選択的に光電変換部2と、電荷転送部3の埋込チャン
ネルとなるN型層6及びチャンネルストップ5となる高
濃度のP型層7を形成した後P型半導体基板1を酸化し
て第1のゲート絶縁膜8を形成し、第1の多結晶シリコ
ン膜11を堆積させ、第1の多結晶シリコン膜の比抵抗を
下げる為及びP型半導体基板1の裏面に高濃度のりんを
入れて結晶欠陥を裏面に意図的に発生させゲッタリング
を行う為に前記第1の多結晶シリコン膜11にリンを拡散
する(第5図(a))。FIG. 5 is an example of a cross-sectional view of a charge transfer section in main manufacturing steps of a conventional solid-state imaging device. After selectively forming a photoelectric conversion unit 2, an N-type layer 6 serving as a buried channel of a charge transfer unit 3 and a high-concentration P-type layer 7 serving as a channel stop 5 in a P-type semiconductor substrate 1, The substrate 1 is oxidized to form a first gate insulating film 8, a first polycrystalline silicon film 11 is deposited, the specific resistance of the first polycrystalline silicon film is reduced, and the back surface of the P-type semiconductor substrate 1 is formed. Then, phosphorus is diffused into the first polycrystalline silicon film 11 in order to perform high gettering by intentionally generating crystal defects on the back surface by adding high concentration phosphorus (FIG. 5A).
次に写真食刻法及びプラズマエッチング法により第1
の多結晶シリコン膜をパターニングし、前記第1のゲー
ト絶縁膜8をフッ酸系エッチング液にて基板表面までエ
ッチングする(第5図(b))。第2の絶縁膜9をP型
半導体基板1及び第1の多結晶シリコン膜11を酸化する
ことにより形成する(第5図(c))。第2の多結晶シ
リコン膜12を堆積させ、上述した第1の多結晶シリコン
膜11の場合と同様にして、写真食刻法及びプラズマエッ
チング法によりパターニングして形成する(第5図
(d))。しかる後、層間酸化硅素膜15を常圧CVD法に
て形成し、アルミニウム配線16及び保護酸化硅素膜17を
施して第3図,第4図の固体撮像素子を得る。Next, the first photolithography and plasma etching methods are used.
Is patterned, and the first gate insulating film 8 is etched down to the substrate surface with a hydrofluoric acid-based etchant (FIG. 5B). A second insulating film 9 is formed by oxidizing the P-type semiconductor substrate 1 and the first polycrystalline silicon film 11 (FIG. 5C). A second polycrystalline silicon film 12 is deposited and patterned by photolithography and plasma etching in the same manner as in the case of the first polycrystalline silicon film 11 described above (FIG. 5D). ). Thereafter, an interlayer silicon oxide film 15 is formed by a normal pressure CVD method, and an aluminum wiring 16 and a protective silicon oxide film 17 are applied to obtain the solid-state imaging device shown in FIGS.
上述した従来の固体撮像素子は第1の多結晶シリコン
膜11をパターニングし第1のゲート絶縁膜8をP型半導
体基板1表面までエッチングした後、P型半導体基板1
及び第1の多結晶シリコン膜11を熱酸化し、第2のゲー
ト絶縁膜9を形成しているため、第2のゲート絶縁膜9
形成時に第1の多結晶シリコン膜11及びP型半導体基板
1の裏面から飛び出した(アウトディフュージョン)り
んが、基板表面の光電変換部2或は電荷転送部3のN型
層6に付着し、局部的にN+層を形成する為、光電変換部
2に付着した場合には再生画面上点欠陥を生じ、電荷転
送部3のN型層6に付着した場合には、付着した地点の
濃度は他の地点より濃いN+層を形成する為その点の表面
電位は、深くなり転送されて来た電荷はその地点で一部
トラップされる形となり、電荷の転送損失をもたらすと
いう欠点があった。In the above-described conventional solid-state imaging device, after the first polycrystalline silicon film 11 is patterned and the first gate insulating film 8 is etched to the surface of the P-type semiconductor substrate 1,
Since the first polycrystalline silicon film 11 is thermally oxidized to form the second gate insulating film 9, the second gate insulating film 9
At the time of formation, phosphorus (out diffusion) that has jumped out of the first polycrystalline silicon film 11 and the back surface of the P-type semiconductor substrate 1 adheres to the N-type layer 6 of the photoelectric conversion unit 2 or the charge transfer unit 3 on the substrate surface. Since the N + layer is locally formed, a point defect on the reproduction screen occurs when the N + layer adheres to the photoelectric conversion unit 2, and when the N + layer adheres to the N-type layer 6 of the charge transfer unit 3, the concentration at the point of attachment occurs. is the surface potential for the point of forming a thick N + layer than the other points, the charge came deeply be transferred becomes the form which is trapped a portion at that point, there is a drawback that results in the transfer charge loss Was.
本発明の固体撮像素子の製造方法は、裏面にリンを含
む第1導電型の半導体基板の表面にそれぞれ設けられた
第2導電型領域の光電変換部と、第1のゲート絶縁膜
と、リンを含む第1の多結晶シリコン電極と、第2のゲ
ート絶縁膜と、第2の多結晶シリコン電極及び第2導電
型領域からなる電荷転送部と、前記光電変換部から前記
電荷転送部への電荷転送を行うトランスファゲートと、
前記各領域を電気的に分離する高濃度の第1導電型のチ
ャネルストップ領域とを有する固体撮像素子の製造方法
において、前記第2のゲート絶縁膜が、プラズマCVD法
により酸化珪素膜を形成する工程と、前記酸化珪素膜を
熱酸化する工程とにより形成されることを特徴としてい
る。The method for manufacturing a solid-state imaging device according to the present invention includes a method of manufacturing a solid-state imaging device, comprising: a photoelectric conversion portion of a second conductivity type region provided on a surface of a first conductivity type semiconductor substrate containing phosphorus on a back surface; a first gate insulating film; , A second gate insulating film, a second polycrystalline silicon electrode and a charge transfer section including a second conductivity type region, and a charge transfer section from the photoelectric conversion section to the charge transfer section. A transfer gate for performing charge transfer;
In the method of manufacturing a solid-state imaging device having a high-concentration first conductivity type channel stop region that electrically separates the respective regions, the second gate insulating film forms a silicon oxide film by a plasma CVD method. And a step of thermally oxidizing the silicon oxide film.
次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第1図は本発明の一実施例の主な製造工程における電
荷転送部の断面図である。FIG. 1 is a sectional view of a charge transfer section in a main manufacturing process according to one embodiment of the present invention.
P型半導体基板1内に選択的に光電変換部2と電荷転
送部3の埋込チャンネルとなるN型層6及びチャンネル
ストップ5となる高濃度のP型層7を形成した後P型半
導体基板1を酸化して第1のゲート絶縁膜8を形成し、
第1の多結晶シリコン膜11を堆積させ、第1の多結晶シ
リコン11の比抵抗を下げる為及びP型半導体基板1の裏
面に高濃度のりんを入れて結晶欠陥を裏面に意図的に発
生させゲッタリングを行う為に前記第1の多結晶シリコ
ン膜11にりんを拡散する(第1図(a))。After selectively forming an N-type layer 6 serving as an embedded channel of the photoelectric conversion unit 2 and the charge transfer unit 3 and a high-concentration P-type layer 7 serving as a channel stop 5 in the P-type semiconductor substrate 1, 1 is oxidized to form a first gate insulating film 8,
A first polycrystalline silicon film 11 is deposited to reduce the specific resistance of the first polycrystalline silicon 11 and high-concentration phosphorus is added to the back surface of the P-type semiconductor substrate 1 to intentionally generate crystal defects on the back surface. In order to perform gettering, phosphorus is diffused into the first polycrystalline silicon film 11 (FIG. 1A).
次に写真食刻法及びプラズマエッチング法により、第
1の多結晶シリコン膜11をパターニングし前記第1のゲ
ート絶縁膜8をフッ酸系エッチング液にて基板表面まで
エッチングする(第1図(b))。Next, the first polycrystalline silicon film 11 is patterned by photolithography and plasma etching, and the first gate insulating film 8 is etched to the substrate surface with a hydrofluoric acid-based etchant (FIG. 1 (b)). )).
プラズマCVD法を用いて酸化硅素膜13を約10nmから50n
m堆積させる(第1(c)図)。Approximately 10nm to 50n silicon oxide film 13 using plasma CVD
m is deposited (FIG. 1 (c)).
プラズマCVD法にて堆積させた酸化硅素膜13に熱酸化
を施し第2のゲート絶縁膜9を形成する(第1図
(d))。The silicon oxide film 13 deposited by the plasma CVD method is subjected to thermal oxidation to form a second gate insulating film 9 (FIG. 1 (d)).
第2の多結晶シリコン膜12を堆積させ上述した第1の
多結晶シリコン膜11の場合と同様にして写真食刻法及び
プラズマエッチング法によりパターニングする(第1図
(e))。A second polycrystalline silicon film 12 is deposited and patterned by photolithography and plasma etching as in the case of the first polycrystalline silicon film 11 described above (FIG. 1E).
しかる後、層間酸化膜層を常圧CVD法にて形成しアル
ミニウム配線及び保護酸化膜を施して固体撮像素子を得
る。Thereafter, an interlayer oxide film layer is formed by a normal pressure CVD method, and an aluminum wiring and a protective oxide film are applied to obtain a solid-state imaging device.
第2図は本発明の参考例の主な製造工程における電荷
転送部の断面図である。FIG. 2 is a cross-sectional view of the charge transfer section in the main manufacturing process of the reference example of the present invention.
第2図(c)においてプラズマCVD法において窒化硅
素膜14を約10nmから30nm堆積させている以外は第1図に
示した実施例と同一である。2 (c) is the same as the embodiment shown in FIG. 1 except that the silicon nitride film 14 is deposited to a thickness of about 10 to 30 nm by the plasma CVD method.
第2図(e)において第2の多結晶シリコン膜12のパ
ターニング終了後、層間酸化膜層を常圧CVD法にて形成
し、アルミニウム配線及び保護酸化膜を施して固体撮像
素子を得る。In FIG. 2E, after the patterning of the second polycrystalline silicon film 12 is completed, an interlayer oxide film layer is formed by a normal pressure CVD method, and an aluminum wiring and a protective oxide film are applied to obtain a solid-state imaging device.
以上説明した様に、本発明によれば固体撮像素子の製
造工程において、第2のゲート絶縁膜をプラズマCVD法
で形成した酸化硅素膜を熱酸化し、形成することによ
り、第2のゲート絶縁膜形成時に第1の多結晶シリコン
膜及びP型半導体基板の裏面からアウトディフュージョ
ンしたりんが基板表面の光電変換部或は電荷転送部のN
型層に付着し、局部的なN+層を形成するのを抑制するこ
とが出来、テレビジョンカメラシステムとして使用した
場合前記局部的なN+層に起因する再生画面上の点欠陥及
び電荷の転送損傷による棒状欠陥を抑制することが出来
るという効果がある。As described above, according to the present invention, in the manufacturing process of the solid-state imaging device, the second gate insulating film is formed by thermally oxidizing the silicon oxide film formed by the plasma CVD method. At the time of film formation, phosphorus outdiffused from the back surface of the first polycrystalline silicon film and the P-type semiconductor substrate forms N in the photoelectric conversion portion or the charge transfer portion on the substrate surface.
It is possible to suppress the formation of a local N + layer by adhering to the mold layer, and when used as a television camera system, a point defect and a charge on the reproduction screen caused by the local N + layer. There is an effect that rod-like defects due to transfer damage can be suppressed.
第1図(a)〜(e)は本発明の一実施例の主な製造工
程における電荷転送部の断面図、第2図(a)〜(e)
は本発明の他の実施例の主な製造工程における電荷転送
部の断面図である。 第3図は従来技術の一例である2層多結晶シリコン電極
構造の電荷結合素子を用いた固体撮像素子の平面図、第
4図(a)は第3図I−I′面の断面図、第4図(b)
は第3図II−II′面の断面図、第5図は従来の固体撮像
素子の主な製造工程における電荷転送部の断面図であ
る。 1……P型半導体基板、2……光電変換部、3……電荷
転送部、4……トランスファゲート部、5……チャンネ
ルストップ、6……N型層、7……P型層、8……第1
のゲート絶縁膜、9……第2ゲート絶縁膜、10……ゲー
ト絶縁膜、11……第1の多結晶シリコン膜、12……第2
の多結晶シリコン膜、13……プラズマCVD酸化硅素膜、1
4……プラズマCVD窒化硅素膜、15……常圧CVD層間酸化
硅素膜、16……アルミニウム配線、17……保護酸化硅素
膜。1 (a) to 1 (e) are cross-sectional views of a charge transfer section in a main manufacturing process according to an embodiment of the present invention, and FIGS. 2 (a) to 2 (e).
FIG. 9 is a cross-sectional view of a charge transfer section in a main manufacturing process according to another embodiment of the present invention. FIG. 3 is a plan view of a solid-state image pickup device using a charge-coupled device having a two-layer polycrystalline silicon electrode structure as an example of the prior art, FIG. 4 (a) is a cross-sectional view taken along the line II 'of FIG. FIG. 4 (b)
FIG. 3 is a cross-sectional view taken along the line II-II 'of FIG. 3, and FIG. 5 is a cross-sectional view of a charge transfer section in main manufacturing steps of a conventional solid-state imaging device. DESCRIPTION OF SYMBOLS 1 ... P-type semiconductor substrate, 2 ... Photoelectric conversion part, 3 ... Charge transfer part, 4 ... Transfer gate part, 5 ... Channel stop, 6 ... N-type layer, 7 ... P-type layer, 8 ... 1st
Gate insulating film, 9 ... second gate insulating film, 10 ... gate insulating film, 11 ... first polycrystalline silicon film, 12 ... second
Polycrystalline silicon film, 13 ... Plasma CVD silicon oxide film, 1
4 ... Plasma CVD silicon nitride film, 15 ... Normal pressure CVD interlayer silicon oxide film, 16 ... Aluminum wiring, 17 ... Protective silicon oxide film.
Claims (1)
の表面にそれぞれ設けられた第2導電型領域の光電変換
部と、第1のゲート絶縁膜と、リンを含む第1の多結晶
シリコン電極と、第2のゲート絶縁膜と、第2の多結晶
シリコン電極及び第2導電型領域からなる電荷転送部
と、前記光電変換部から前記電荷転送部への電荷転送を
行うトランスファゲートと、前記各領域を電気的に分離
する高濃度の第1導電型のチャネルストップ領域とを有
する固体撮像素子の製造方法において、前記第2のゲー
ト絶縁膜が、プラズマCVD法により酸化珪素膜を形成す
る工程と、前記酸化珪素膜を熱酸化する工程とにより形
成されることを特徴とする固体撮像素子の製造方法。A second conductive type region provided on a surface of a first conductive type semiconductor substrate containing phosphorus on a back surface thereof; a first gate insulating film; A crystalline silicon electrode, a second gate insulating film, a charge transfer portion including a second polycrystalline silicon electrode and a second conductivity type region, and a transfer gate for transferring charge from the photoelectric conversion portion to the charge transfer portion And a method of manufacturing a solid-state imaging device having a high-concentration first-conductivity-type channel stop region that electrically separates the respective regions, wherein the second gate insulating film is formed of a silicon oxide film by a plasma CVD method. A method for manufacturing a solid-state imaging device, comprising: a forming step; and a step of thermally oxidizing the silicon oxide film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63237707A JP3036747B2 (en) | 1988-09-21 | 1988-09-21 | Method for manufacturing solid-state imaging device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63237707A JP3036747B2 (en) | 1988-09-21 | 1988-09-21 | Method for manufacturing solid-state imaging device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0284768A JPH0284768A (en) | 1990-03-26 |
JP3036747B2 true JP3036747B2 (en) | 2000-04-24 |
Family
ID=17019313
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63237707A Expired - Lifetime JP3036747B2 (en) | 1988-09-21 | 1988-09-21 | Method for manufacturing solid-state imaging device |
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JP (1) | JP3036747B2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2965061B2 (en) * | 1996-04-19 | 1999-10-18 | 日本電気株式会社 | Charge coupled device and method of manufacturing the same |
CN103400847B (en) * | 2013-08-14 | 2015-08-05 | 中国电子科技集团公司第四十四研究所 | Make the technique of CCD bis-times or the above polysilicon of secondary |
CN109256441B (en) * | 2018-09-20 | 2021-01-05 | 北方电子研究院安徽有限公司 | Method for manufacturing multi-layer polysilicon gate structure of EMCCD device |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5841659B2 (en) * | 1977-08-30 | 1983-09-13 | 株式会社東芝 | Method of forming an insulating film |
JPS5851673A (en) * | 1981-09-22 | 1983-03-26 | Sharp Corp | Solid-state image pickup device |
JPS60263437A (en) * | 1984-06-12 | 1985-12-26 | Ise Electronics Corp | Manufacture of thin film transistor |
JPS61156885A (en) * | 1984-12-28 | 1986-07-16 | Fujitsu Ltd | Polycrystalline semiconductor device and manufacture thereof |
JPH0644621B2 (en) * | 1985-03-19 | 1994-06-08 | 日本電気株式会社 | Solid-state imaging device and driving method thereof |
-
1988
- 1988-09-21 JP JP63237707A patent/JP3036747B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
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JPH0284768A (en) | 1990-03-26 |
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