JPH02181492A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH02181492A JPH02181492A JP151289A JP151289A JPH02181492A JP H02181492 A JPH02181492 A JP H02181492A JP 151289 A JP151289 A JP 151289A JP 151289 A JP151289 A JP 151289A JP H02181492 A JPH02181492 A JP H02181492A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- power
- wiring
- wire
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 229910052751 metal Inorganic materials 0.000 claims abstract description 10
- 239000002184 metal Substances 0.000 claims abstract description 10
- 239000004020 conductor Substances 0.000 abstract description 13
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 3
- 239000010931 gold Substances 0.000 abstract description 3
- 229910052737 gold Inorganic materials 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract description 2
- 229910001111 Fine metal Inorganic materials 0.000 abstract 2
- 239000011347 resin Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/145—Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/328—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置に関し、特に制御用の素子と、電
力用の素子とを有する半導体装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device having a control element and a power element.
第２図は従来の半導体装置の構造を示す断面図である。 FIG. 2 is a sectional view showing the structure of a conventional semiconductor device.
図において、（１）は金属よりなるベース板、（２）は
このベース板（１）上に設けられる絶縁板、（３）はこ
の絶縁板（２）上に、アルミニウム膜により形成される
導体パターンのパワ一部門線である。（４）はこのパワ
一部配線（３）上に設けられる複数のパワー素子、（５
）はこのパワー素子（４）の電極部と前記パワー部配（
３）とを電気的に接続する、金等よりなる金属細線（以
下、ワイヤと称す）である。（６）は前記ベース板（１
）の上部に配設され、表面部に導体パターン（図示省略
）が形成される絶縁材よりなる制御基板、（７）はこの
制御基板（６）に取付けられるｉｔｊ制御素子である。In the figure, (1) is a base plate made of metal, (2) is an insulating plate provided on this base plate (1), and (3) is a conductor formed of an aluminum film on this insulating plate (2). This is the power division line of the pattern. (4) is a plurality of power elements provided on this power part wiring (3), (5)
) is the electrode part of this power element (4) and the power part arrangement (
3) is a thin metal wire (hereinafter referred to as a wire) made of gold or the like that electrically connects the wire. (6) is the base plate (1
), the control board is made of an insulating material and has a conductor pattern (not shown) formed on its surface, and (7) is an ITJ control element attached to this control board (6).
（８）は前記ベース板（１）、制御基板（６１の周囲を
取囲むように形成される、絶縁物よりなるケース、（９
）は前記パワ一部配線（３）と前記制御基板（６３の導
体パターンの一部とを電気的に接続する接続端子である
。（ＩＧは一端が前記パワ一部配線（３］の一部と接続
され、他端が前記ケース（８）の外側に導出される出力
端子、ａυは一端が前記制御基板（６）の導体パターン
の一部と接続され、他端が前記ケース（８）の外側に導
出される信号入力端子（以下、入力端子と称す）である
。σ４は前記ケース（８）内を埋込む封止用のｔＭ脂、
□はバク一部、０４１は制御部である。(8) is a case made of an insulator formed to surround the base plate (1) and the control board (61);
) is a connection terminal that electrically connects the power part wiring (3) and a part of the conductor pattern of the control board (63). (One end of IG is a part of the power part wiring (3) The output terminal aυ is connected to a part of the conductor pattern of the control board (6) and the other end is connected to a part of the conductor pattern of the control board (6), and the other end is connected to the outside of the case (8). It is a signal input terminal (hereinafter referred to as an input terminal) led out to the outside. σ4 is a tM resin for sealing embedded in the case (8);
□ is the back part, and 041 is the control part.
このように構成される半導体装置は次のように組立てら
れる。まず、前記ベース板（１）上に前記絶縁板（２）
が固着され、この後、前記絶縁板＋２ν上に所定形状の
前記パワ一部配線（３）が形成される。このパワ一部配
線（３）上の所定部にパワー素子（４）が載置された後
、このパワー素子（４）の電極部と前記パワ一部配線（
３）のパターンの所定部分が前記ワイヤ（５）で接続さ
れる。次いで、前記パワ一部配線（３）の周辺部の所定
部セ接続端子（９）の一端が接続される。The semiconductor device constructed in this manner is assembled as follows. First, place the insulating plate (2) on the base plate (1).
is fixed, and then the partial power wiring (3) having a predetermined shape is formed on the insulating plate +2ν. After a power element (4) is placed on a predetermined portion on this power part wiring (3), the electrode part of this power element (4) and the power part wiring (
Predetermined portions of the pattern 3) are connected with the wire (5). Next, one end of the connection terminal (9) at a predetermined portion on the periphery of the power partial wiring (3) is connected.
このような状態のベース板（１）が準備されると、この
ベース板（１）は前記ケース（８）の底面に接着剤によ
り取付けられる。次に、予め、この場合、両面に所定形
状の導体パターンが形成された制御基板（６）が準備さ
れ、この制御基板（６）に複数の前記制御素子（７）が
取付けられる一方、前記入力端子Ｑυの一端が前記制御
基板（６）上の周辺部の導体パターンの所定部に接続さ
れる。このような状態になされた前記制御基板（６３は
、前記ケース（８）の内部に設けられた突起部分の上面
に載置され、固着される。次に、前記制御基板ｔ６Ｊの
図示下側における導体パターンに、前記接続端子（９）
の他端とが半田で一気的に接続される。これにより、前
記パワ一部的と制御部σ慢とが電気的に接続される。こ
の後、前記ケース（８）内に前記樹脂四が前記ケース（
８）の上端まで注入される。この樹脂０；ンは熱硬化性
のものであり、この後、所定部間に加熱することにより
硬化させる。Once the base plate (1) in such a state is prepared, this base plate (1) is attached to the bottom surface of the case (8) with an adhesive. Next, in this case, a control board (6) on which a conductor pattern of a predetermined shape is formed on both sides is prepared in advance, and a plurality of the control elements (7) are attached to this control board (6), while the input One end of the terminal Qυ is connected to a predetermined portion of the peripheral conductor pattern on the control board (6). The control board (63) in this state is placed on the upper surface of the protrusion provided inside the case (8) and fixed. Next, the control board (63) is placed on the upper surface of the protrusion provided inside the case (8) and fixed. The connection terminal (9) is attached to the conductor pattern.
The other end is connected all at once with solder. Thereby, the power part and the control part σ are electrically connected. After this, the resin 4 is placed inside the case (8).
8) Injected to the top. This resin is thermosetting, and is then cured by heating between predetermined parts.
前記ケース（８３内が封止された状態ではＤＵ記出力端
子ＱＱ１入力端子ａυの各他端側は前記嗣脂Ｑ３の外に
出ている。このようにして、前記半導体装置が完成され
る。When the inside of the case (83) is sealed, the other ends of the DU output terminal QQ1 input terminal aυ are exposed to the outside of the shroud Q3. In this way, the semiconductor device is completed.
このような半導体装置は、例えば、モータの駆動に用い
られるもので、入力端子（６）に入力された信号に従っ
て、制御部α４が制御信号をパワ一部餞へ入力し、この
制御信号に従って、パワ一部的がモータの接続された出
力端子σｑに電圧を出力する。Such a semiconductor device is used, for example, to drive a motor, and the control unit α4 inputs a control signal to the power supply unit according to a signal input to the input terminal (6), and according to this control signal, Part of the power outputs a voltage to the output terminal σq connected to the motor.
従来の半導体装置は、以上のように構成されており、パ
ワ一部側と制御部−とが分かれた二層の構造であるため
、これら両者を上下に電気的に接続するための長い接続
端子（９）を必要とした。このような半導体装置では、
前記接続端子（９）の両端を半田付けしなければならず
、組立て作業が煩雑になってしまうなどの欠点があった
。Conventional semiconductor devices are constructed as described above, and have a two-layer structure in which the power section and control section are separated, so long connection terminals are required to electrically connect these two vertically. (9) was required. In such semiconductor devices,
Both ends of the connection terminal (9) must be soldered, which has the disadvantage of complicating the assembly process.
本発明は、上記のような欠点を解消するためになされた
もので、パワ一部と制御部との電気的接続を容易に行え
、信頼性の高い半導体装置を得ることを目的とする。The present invention has been made in order to eliminate the above-mentioned drawbacks, and an object of the present invention is to provide a highly reliable semiconductor device in which electrical connection between a power section and a control section can be easily established.
本発明に係る半導体装置は、所定領域に開口が設けられ
、この開口を除く主表面部の領域に、導電パターンが配
設あれ、その一部に制御用の素子が載置される第１の基
板と、主表面部昏ζ導電パターンが配設され、この導電
パターンの一部に載置される電力用の素子が前記開口内
に位置するように前記第１の基板の地表面部を当接させ
て支持する第２の基板と、前記開口を介して前記第１の
基板部と前記第２の基板部とを電気的に接続し、前記制
御用の素子から電力用の素子へ信号を伝達させる金属細
線とを備えたものである。In the semiconductor device according to the present invention, an opening is provided in a predetermined region, a conductive pattern is provided in a region of the main surface excluding the opening, and a first conductive pattern is provided on which a control element is placed on a part of the conductive pattern. A ground surface portion of the first substrate is arranged such that a conductive pattern is disposed on a main surface portion of the first substrate, and a power element placed on a portion of the conductive pattern is located within the opening. A second substrate supported in contact with the first substrate portion and the second substrate portion are electrically connected through the opening, and a signal is transmitted from the control element to the power element. It is equipped with a thin metal wire for transmitting data.
本発明における第２の基板は、所定領域に開口が設けら
れ、この開口を除く主表面部の領域に導電パターンが形
成され、その所定部に制御用の素子が載置されるように
なされている。前記第２の基板に当接し、支持する第１
の基板上に載置される電力用の素子は、前記開口内に位
置するようになされ、前記第１の基板部と前記第２の基
板部とは前記開口を介して金属細線で接続できるため、
接続が容易になり、かつ、接続部を短（できる作用を有
する。In the second substrate of the present invention, an opening is provided in a predetermined region, a conductive pattern is formed in a region of the main surface excluding the opening, and a control element is placed in the predetermined portion. There is. a first substrate that abuts and supports the second substrate;
A power element mounted on the substrate is positioned within the opening, and the first substrate section and the second substrate section can be connected by a thin metal wire through the opening. ,
It has the effect of making the connection easier and making the connection part shorter.
以下、本発明の実施例を図について説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
第１図は１本発明の一実施例の半導体装置の構造を示す
断面図である。図において、第２図と同一部分または相
当部分には同一符号を付する。四は金属よりなる第２の
基板、αＱはこの第２の基板（２）上に設けられる絶縁
板、αηはこの絶縁板００上にアルミニウム膜により形
成される導体パターンのパワ一部配線である。（ト）は
金等よりなる金属細線（以下、ワイヤと称す）であり、
前記パワー素子（４）の電極部と前記パワ一部配線肋と
を電気的に接続する第１のワイヤ（１８ａ）と、前記パ
ワー素子（４）の電極部と他の部分とを電機的に接続す
る第２のワイヤｎ５ｂ）とからなる。Ｑｌは前記パワ一
部配線αη上にＣ１置し、前記パワー素子（４）、ワイ
ヤに）が存すべき所定部分が開口された形状を有し、絶
縁基板よりなる第１の基板である。（１）は制御部配線
であり、前記第２の基板ａ場の主表面部の一方に、金属
により導体パターンが形成されてあり、その所定部に複
数の制御素子（７）が設けられている。前記第２のワイ
ヤ（１８ｂ）により、前記パワー素子（４）の電極部と
前記他の部分に相当する前記制御部配線（１）とが接続
される。（２）は前記第２の基板部の周囲を取り囲むよ
うに形成される絶縁物よりなるケース、四は一端が前記
パワ一部配線σηの一部と接続され、他端が前記ケース
（財）の外側に導出される出力端子、−は一端が前記制
御部配線翰の一部と接続され、他端が前記ケースＯ！υ
の外側に導出される入力端子である。FIG. 1 is a sectional view showing the structure of a semiconductor device according to an embodiment of the present invention. In the figure, the same or equivalent parts as in FIG. 2 are given the same reference numerals. 4 is a second substrate made of metal, αQ is an insulating plate provided on this second substrate (2), and αη is a power part wiring of a conductor pattern formed on this insulating plate 00 with an aluminum film. . (g) is a thin metal wire (hereinafter referred to as wire) made of gold or the like,
A first wire (18a) electrically connects the electrode part of the power element (4) and the power partial wiring rib, and electrically connects the electrode part of the power element (4) and other parts. and a connecting second wire n5b). Ql is a first substrate made of an insulating substrate, which is placed on the power part wiring αη, has a shape in which a predetermined portion where the power element (4) (wire) is to be located is opened. (1) is control wiring, in which a conductor pattern is formed of metal on one of the main surfaces of the second substrate a field, and a plurality of control elements (7) are provided in predetermined portions of the conductor pattern. There is. The second wire (18b) connects the electrode section of the power element (4) and the control section wiring (1) corresponding to the other section. (2) is a case made of an insulator formed so as to surround the second board portion; and (4), one end is connected to a part of the power partial wiring ση, and the other end is connected to the case (goods). One end of the output terminal led out to the outside of the case O! is connected to a part of the control wiring wire, and the other end is connected to the case O! υ
is an input terminal derived outside of.
このように構成される半導体装置は次のように組立てら
れる。まず、前記第２の基板四重に前記絶縁板αＱが固
着され、この後、前記絶縁板ａＱ上に所定形状の前記パ
ワ一部配線ａηが形成される。前記パワ一部配線曹上の
所定部に前記パワー素子（４）が載置される。このよう
な状態の第２の基板部が準備される。次に第１の基板Ｑ
場に所定部分が開口され、その後、主表面の一方に所定
形状の導体パターンが形成される。さらに、この第１の
基板ａｌ上に複数の制御素子（７）が取付けられる。こ
のような状態の第１の基板Ｑｌを、前に準備された前記
第２の基板に）上に位置合せして重ね置く。次いで、前
記パワー素子（４）の電極部と前記パワ一部配線αηと
を前記第１のワイヤ（１８ａ）で、前記制御部配線曽と
前記パワー素子（４）の電極部とを前記第２のワイヤ（
１８ｂ）でそれぞれ電気的に接続する。次に。The semiconductor device constructed in this manner is assembled as follows. First, the insulating plate αQ is fixed to the quadruple second substrate, and then the partial power wiring aη having a predetermined shape is formed on the insulating plate aQ. The power element (4) is placed on a predetermined portion of the power wiring board. The second substrate part in such a state is prepared. Next, the first substrate Q
A predetermined portion is opened in the field, and then a conductor pattern of a predetermined shape is formed on one of the main surfaces. Furthermore, a plurality of control elements (7) are mounted on this first substrate al. The first substrate Ql in this state is aligned and placed on top of the previously prepared second substrate. Next, the electrode part of the power element (4) and the power partial wiring αη are connected with the first wire (18a), and the control part wiring Z and the electrode part of the power element (4) are connected with the second wire (18a). wire (
18b) and are electrically connected to each other. next.
前記出力端子四の一端が前記パワ一部配線的の所定部に
接続され、また、前記入力端子四の一端が前記制御部配
線■の所定部に接続される。この後。One end of the output terminal 4 is connected to a predetermined part of the power part wiring, and one end of the input terminal 4 is connected to a predetermined part of the control part wiring (2). After this.
前記ケース？り内に樹脂（ロ）が前記ケース（２）の上
端部まで注入される。この樹脂（２）は熱硬化性のもの
であり、この後、所定の温度に加熱することにより硬化
される。前記ケース（財）内が封止された状態では、前
記出力端子（２）、入力端子（ホ）の各他端側は樹脂の
外に出ている。このようにして、前記半導体装置が完成
される。Said case? The resin (B) is injected into the case (2) up to the upper end thereof. This resin (2) is thermosetting, and is then cured by heating to a predetermined temperature. When the inside of the case (goods) is sealed, the other ends of the output terminal (2) and the input terminal (E) are exposed to the outside of the resin. In this way, the semiconductor device is completed.
このような半導体装置は、例えば、モータの駆動に用い
られるもので、前記入力端子（２）に入力された信号に
従って、前記制御素子（７）が制御信号を前記パワー素
子（４）へ出力し、この制御信号に従って前記パワー素
子（４）が出力端子へ電圧を出力する。Such a semiconductor device is used, for example, to drive a motor, and the control element (7) outputs a control signal to the power element (4) according to a signal input to the input terminal (2). , the power element (4) outputs a voltage to the output terminal according to this control signal.
このように制御素子（７）、パワー素子（４）が制御部
配線（ホ）、ワイヤ（１８ｂ）を介して接続可能となる
ため、作業性が向上し、信頼性の高い半導体装置が得ら
れることになる。In this way, the control element (7) and the power element (4) can be connected via the control wiring (e) and the wire (18b), improving workability and providing a highly reliable semiconductor device. It turns out.
本発明によれば、第１の基板に当接させて第２の基板を
設け、それら第１の基板部と第２の基板部とが金属細線
で接続される構成としたので、接続が容易になって作業
性が向上するばかりか、信頼性の向上された半導体装置
が得られる効果がある。According to the present invention, the second board is provided in contact with the first board, and the first board part and the second board part are connected by a thin metal wire, so that the connection is easy. This has the effect of not only improving workability but also providing a semiconductor device with improved reliability.
第１図は本発明の一実施例の半導体装置の構造を示す断
面図、第２図は従来の半導体装置の構造を示す断面図で
ある。
図において、（４）はパワー素子、（７）は制御素子、
に）は第２基板、ａηはパワ一部配線、（至）はワイヤ
、（１８ａ）は第１のワイヤ、（１８ｂ）は第２のワイ
ヤ、ａ９は第１の基板、（ホ）は制御部配線である。
なお、各図中同一符号は同一、又は相当部分を示す。FIG. 1 is a sectional view showing the structure of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view showing the structure of a conventional semiconductor device. In the figure, (4) is a power element, (7) is a control element,
) is the second board, aη is the power part wiring, (to) is the wire, (18a) is the first wire, (18b) is the second wire, a9 is the first board, (e) is the control This is the partial wiring. Note that the same reference numerals in each figure indicate the same or equivalent parts.
Claims (1)
の領域に導電パターンが配設され、その所定部に制御用
の素子が載置される第１の基板と、主表面部に導電パタ
ーンが配設され、この導電パターンの所定部に載置され
る電力用の素子が前記開口内に位置するように前記第１
の基板の他表面部を当接させて支持する第２の基板と、
前記開口を介して前記第１の基板部と前記第２の基板部
とを電気的に接続し、前記制御用の素子から電力用の素
子へ信号を伝達させる金属細線とを備えた半導体装置。A first substrate having an opening provided in a predetermined area, a conductive pattern provided in an area of the main surface excluding the opening, and a control element placed on the predetermined part; is arranged, and the first
a second substrate that abuts and supports the other surface of the substrate;
A semiconductor device comprising: a thin metal wire that electrically connects the first substrate section and the second substrate section through the opening and transmits a signal from the control element to the power element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP151289A JPH02181492A (en) | 1989-01-06 | 1989-01-06 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP151289A JPH02181492A (en) | 1989-01-06 | 1989-01-06 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02181492A true JPH02181492A (en) | 1990-07-16 |
Family
ID=11503537
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP151289A Pending JPH02181492A (en) | 1989-01-06 | 1989-01-06 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02181492A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009054551A (en) * | 2007-08-29 | 2009-03-12 | Shindengen Electric Mfg Co Ltd | Connection terminal |
| JP2009130230A (en) * | 2007-11-27 | 2009-06-11 | Kyocera Corp | Power control module |
| JP2013247192A (en) * | 2012-05-24 | 2013-12-09 | Nec Access Technica Ltd | Power module |
-
1989
- 1989-01-06 JP JP151289A patent/JPH02181492A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009054551A (en) * | 2007-08-29 | 2009-03-12 | Shindengen Electric Mfg Co Ltd | Connection terminal |
| JP2009130230A (en) * | 2007-11-27 | 2009-06-11 | Kyocera Corp | Power control module |
| JP2013247192A (en) * | 2012-05-24 | 2013-12-09 | Nec Access Technica Ltd | Power module |
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