JPH02180036A - Formation of electrode - Google Patents

Formation of electrode

Info

Publication number
JPH02180036A
JPH02180036A JP63334226A JP33422688A JPH02180036A JP H02180036 A JPH02180036 A JP H02180036A JP 63334226 A JP63334226 A JP 63334226A JP 33422688 A JP33422688 A JP 33422688A JP H02180036 A JPH02180036 A JP H02180036A
Authority
JP
Japan
Prior art keywords
electrode
elastic
wiring board
electrodes
conductive particles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63334226A
Other languages
Japanese (ja)
Other versions
JPH0793342B2 (en
Inventor
Koji Matsubara
浩司 松原
Keiji Yamamura
山村 圭司
Hisashi Shin
新 久司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP63334226A priority Critical patent/JPH0793342B2/en
Publication of JPH02180036A publication Critical patent/JPH02180036A/en
Publication of JPH0793342B2 publication Critical patent/JPH0793342B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10122Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/10125Reinforcing structures
    • H01L2224/10126Bump collar
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29399Coating material

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To cope with fining of an electrode of a wiring board by fixing an interposed object having elasticity and conductivity onto the electrode by alloy junction. CONSTITUTION:A projecting electrode 13 and an electrode 3 are pressure-welded in opposition with a fixed interval l1 between electrodes 3, 11 and a semiconductor device 1 and a liquid crystal display 5 are joined by hardening adhesive layer 14 which is filled between substrate 5, 10. An elastic conductive particle 15 which is used for the projecting electrode 13 is constituted by applying a conductive coating layer 17 which consists of a metal material onto a surface of an elastic bead 16 which consists of high polymer material. An interposed object which is elastic as well as conductive is used and fixed onto an electrode of a wiring board by alloy junction in this way, thereby forming a projecting electrode on the wiring board. According to this constitution, it is possible to cope with fining of an electrode of a wiring board connected each other.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、たとえば半導体素子などが形成された集積回
路基板と、プリント基板、フレキシブル基板、あるいは
セラミック基板などの回路基板とを電気的に接続するた
めに好適に実施される電極の形成方法に関する。
[Detailed Description of the Invention] Industrial Application Field The present invention is for electrically connecting an integrated circuit board on which semiconductor elements are formed, and a circuit board such as a printed circuit board, a flexible board, or a ceramic board. The present invention relates to a method of forming an electrode that is suitably carried out.

従来の技術 従来、半導体素子が形成されたIC( Integrated C1rcuit )基板の電極
と他の回路基板の電極とを相互に圧接して電気的に接続
する方法としては、主として、特公昭59−2179ま
たは特公昭62 6652などに開示された異方性導電
シートを用いる方法(以後、「第1従来例」と称する)
、特開昭63−13337に開示された金属の突起電極
を用いる方法(以後、「第2 fft−来例」と称する
)、ならびに特開昭61 242041、特開昭61 
259548、および特開昭63 150930に開示
された弾性突起電極を用いる方法(以後、「第3従来例
Jと称する)などが知られている。
2. Description of the Related Art Conventionally, as a method for electrically connecting electrodes of an IC (Integrated Circuit) board on which a semiconductor element is formed and electrodes of another circuit board by pressing them against each other, there is mainly a method disclosed in Japanese Patent Publication No. 59-2179 or A method using an anisotropic conductive sheet disclosed in Japanese Patent Publication No. 62/6652 (hereinafter referred to as "first conventional example")
, a method using metal protruding electrodes disclosed in JP-A-63-13337 (hereinafter referred to as "second fft-conventional example"), as well as JP-A-61-242041 and JP-A-61
259548, and a method using an elastic protrusion electrode disclosed in JP-A-63-150930 (hereinafter referred to as "Third Conventional Example J"), etc. are known.

第1従来例では、き成樹脂などから成る接着剤中に導電
性の微粒子を分散した異方性導電シートを用いて、この
異方性導電シートがこのシードに加えられる圧力方向に
対してのみ導電性を示し、それ以外の方向に対しては非
導電性であるという異方性を利用している。すなわち、
接続したい電極間にこの異方性導電シートを介在させ、
この電極間に介在したシー■一部分をシート厚み方向に
亘って加圧することによって各電極間の電気的接続を行
うものである。しかしこの異方性導電シートでは、接続
する電極のピッチ幅が150μrl’1程度以下の微細
ピッチにおいては、シート中に分ti’l した導電性
微粒子のために隣、接する電極端子間が導通可能状態と
なってしまい短絡の原因となっていた。
In the first conventional example, an anisotropic conductive sheet in which conductive fine particles are dispersed in an adhesive made of resin, etc. is used. It utilizes anisotropy, which shows conductivity but is non-conductive in other directions. That is,
This anisotropic conductive sheet is interposed between the electrodes to be connected,
Electrical connection between each electrode is established by applying pressure to a portion of the sheet interposed between the electrodes in the thickness direction of the sheet. However, in this anisotropic conductive sheet, when the pitch width of the connected electrodes is fine pitch of about 150μrl'1 or less, conduction is possible between adjacent electrode terminals due to the conductive fine particles dispersed in the sheet. This caused a short circuit.

第2従□来例は、上述した第1従来例の問題点を解消す
るために、接続される回路基板の一方の電極表面上に金
属材料から成る突起電極を設けて、対応する電極に圧接
して電気的接続を行うものである。この第2従来例によ
れば、微小ピッチ幅を有する電極の接続は可能であるけ
れども、突起電極の高さが不揃いであるために圧接時の
接続抵抗に不均一性が現われ、接続の信頼性が劣るとい
う問題点があった。
In order to solve the problems of the first conventional example described above, in the second conventional example, a protruding electrode made of a metal material is provided on the surface of one electrode of the circuit board to be connected, and the protruding electrode is pressed against the corresponding electrode. This is used to make electrical connections. According to this second conventional example, although it is possible to connect electrodes having a minute pitch width, the uneven height of the protruding electrodes causes non-uniformity in connection resistance during pressure welding, resulting in poor connection reliability. There was a problem that it was inferior.

第3従来例は、上述した第2従来例の問題点を解消する
ために、突起電極を、弾性を有するとともに導電性を有
する部材がら構成し、この突起電極の高さの不揃いを圧
接時における突起電極の弾性変形で吸収するようにして
いる。
In the third conventional example, in order to solve the problems of the second conventional example described above, the protruding electrodes are made of a material having elasticity and conductivity, and the uneven height of the protruding electrodes is corrected during pressure welding. This is absorbed by the elastic deformation of the protruding electrode.

発明が解決しようとする課題 第3従来例の中でも特に、特開昭61−242041お
よび特開昭61−259548においては、突起電極を
形成するためにスクリーン印刷などの印刷法を用いてい
る。しかし印刷法では、微小なピッチ幅を有する電極に
対応して微小な突起電極を形成することが困難であり、
微小ピッチ幅を有する電極間相互を短絡なく接続するこ
とができない。
Problems to be Solved by the Invention Among the third conventional examples, particularly in JP-A-61-242041 and JP-A-61-259548, printing methods such as screen printing are used to form protruding electrodes. However, with the printing method, it is difficult to form minute protruding electrodes corresponding to electrodes with a minute pitch width.
Electrodes having minute pitch widths cannot be connected to each other without shorting.

また第3従来例中グ)特開昭63 150 ”) 30
においては、突起電極を形成する際に用いる導電性イン
クを選択的に硬化させるために、マスク板を介して赤外
線あるいは紫外線などを照射して導電性インクを硬化さ
せている。しかし赤外線照射などを用いた熱硬化による
方法では、導電性イ〉りの熱碑化には数分〜数十分の時
間を必要とする。
In addition, the third conventional example) JP-A-63-150”) 30
In order to selectively cure the conductive ink used in forming the protruding electrodes, the conductive ink is cured by irradiating infrared rays or ultraviolet rays through a mask plate. However, in a method of thermosetting using infrared irradiation or the like, it takes several minutes to several tens of minutes to thermally inscribe the conductive material.

したがってマスク板l)開口部周辺の導電性インクもま
た、開口部を通して照射された赤外線によ−)で加熱さ
れた導電性インクからの熱伝導によって加熱されて硬化
し、微小ピッチ幅て・のパターン形成性が悪く不鮮明と
なってしまう。また紫外線照射などを用いた光硬化によ
る方法では、導電性を得るためにインク中に添加されて
いる金属粉、自金粉、導電粉、あるいは金属め−)きし
たガラスビ−ズなどが不透明であるために、照射される
紫外線が導電性インク全体に照射されず光硬化が不充分
となる。したがってパターン形成性が悪いという問題点
があった。
Therefore, the conductive ink around the openings on the mask plate (1) is also heated and hardened by heat conduction from the conductive ink heated by the infrared rays irradiated through the openings, and as a result The pattern formation property is poor and the pattern becomes unclear. Furthermore, in photocuring methods using ultraviolet irradiation, the metal powder, self-metal powder, conductive powder, or metal-plated glass beads added to the ink to make it conductive are opaque. Therefore, the entire conductive ink is not irradiated with the ultraviolet rays, resulting in insufficient photocuring. Therefore, there was a problem that the pattern formation property was poor.

さらに、特開昭61−242041および特開昭63 
150930においては、弾性を有する突起電極の材料
として、樹脂中に導電性賦与剤として各種の導電性粉末
を混入した導電性、樹脂を使用している。このような導
電性樹脂においては、充分な弾性を保つためには導電性
粉末の量を少量に抑える必要がある。しかしながら導電
性粉末の量が少ないと逆に導電性樹脂の導電性が悪く、
この導電性樹脂を用いた突起電極の接続抵抗が高くなっ
てしまうという問題点があった。
Furthermore, JP-A-61-242041 and JP-A-63
In No. 150930, a conductive resin in which various conductive powders are mixed as a conductive agent into the resin is used as a material for the elastic protruding electrode. In such a conductive resin, in order to maintain sufficient elasticity, it is necessary to suppress the amount of conductive powder to a small amount. However, if the amount of conductive powder is small, the conductivity of the conductive resin will be poor.
There is a problem in that the connection resistance of the protruding electrode using this conductive resin becomes high.

本発明の目的は、上述した問題点を解決して、相互に接
続される配線基板の電極の微細化に対応できるとともに
、低電気抵抗の接続が可能であって、相互の電極を高い
信頼性で電気的に接続するために用いることができる電
極の形成方法を提供することである。
An object of the present invention is to solve the above-mentioned problems, to be able to cope with the miniaturization of the electrodes of wiring boards that are connected to each other, to enable connections with low electrical resistance, and to ensure that the mutual electrodes can be connected with high reliability. It is an object of the present invention to provide a method for forming an electrode that can be used for electrical connection in a semiconductor device.

課題を解決するための手段 本発明は、弾性および導電性を有する介在体を配線基板
の電極上に合金接合によって固定するようにしたことを
特徴とする電極の形成方法である。
Means for Solving the Problems The present invention is a method of forming an electrode, characterized in that an intervening body having elasticity and conductivity is fixed onto an electrode of a wiring board by alloy bonding.

作  用 本発明の電極の形成方法においては、弾性を有するとと
もに導電性をも有する介在体が用いられる。この介在体
は配線基板の電極上にき合接6によって固定され、これ
によって配線基板上に突起した電極が形成される。
Function: In the method for forming an electrode of the present invention, an intervening body having elasticity and conductivity is used. This intervening body is fixed onto the electrode of the wiring board by a joint 6, thereby forming an electrode projecting on the wiring board.

したがって、たとえば半導体装置を回路基板上に実装す
る場合に、この半導体装置上に前記突起した電極を形成
すれば、前記回路基板に半導体装置が圧接などの方法に
よって高い信頼性で接続される。
Therefore, for example, when a semiconductor device is mounted on a circuit board, if the protruding electrode is formed on the semiconductor device, the semiconductor device can be connected to the circuit board with high reliability by a method such as pressure bonding.

また、前記突起した電極を用いて圧接する場きに、回路
基板相互の接合に光硬化性あるいは自然硬化性の接着剤
などを使用することによ−)で、広い面積を低温で接着
することができるととも(こ、電気的な接続部が樹脂に
よ−tて封止されるために電気的接続の信頼性がさらに
向上される。
In addition, when applying pressure using the protruding electrodes, it is possible to bond a wide area at low temperature by using a photo-curing or naturally-curing adhesive to bond the circuit boards together. (Since the electrical connection portion is sealed with resin, the reliability of the electrical connection is further improved.)

実施例 第1図は本発明の電極の形成方法に従って突起した電極
13(以下単に、「突起電極13」という)が形成され
た半導体装置1を後述の液晶□表示装置2に実装した場
合の拡大断面図であり、第2図はその半導体装置1が実
装された液晶表示装置2の断面図である。第2図を参照
して、表面に電極3および対向電極4がそれぞれ形成さ
れた一対の液晶表示板5.6は、シール樹脂7を介して
貼自わされており、その間に液晶8が封止されている。
Embodiment FIG. 1 is an enlarged view of a semiconductor device 1 in which a protruding electrode 13 (hereinafter simply referred to as "protruding electrode 13") is formed according to the electrode forming method of the present invention is mounted on a liquid crystal display device 2 to be described later. FIG. 2 is a cross-sectional view of a liquid crystal display device 2 on which the semiconductor device 1 is mounted. Referring to FIG. 2, a pair of liquid crystal display plates 5.6 each having an electrode 3 and a counter electrode 4 formed on their surfaces are attached to each other with a sealing resin 7 in between, and a liquid crystal 8 is sealed between them. It has been stopped.

液晶表示装置2において、電極3は液晶表示板5上を図
面右方に延び、液晶表示装置2の表示駆動を行うために
実装された半導体装置1の突起電極13と接続されてい
る。
In the liquid crystal display device 2, the electrode 3 extends on the liquid crystal display plate 5 to the right in the drawing, and is connected to the protruding electrode 13 of the semiconductor device 1 mounted to drive the display of the liquid crystal display device 2.

半導体装置1は、シリコンあるいはガリウムヒ素などの
ウェハ上に拡散層が形成され、これによって多数のトラ
ンジスタやダイオードなどが構成されて、液晶表示装置
2の表示駆動を行う機能を有する。第1図を参照して、
半導体装置1は、配線基板である基板10と、基板10
の最上層に形成された電極11と、たとえばSiN、S
iO2あるいはポリイミドなどから成る表面保護層12
とを含む。電極11は、たとえばAl−5tなどから成
る。
The semiconductor device 1 has a diffusion layer formed on a wafer of silicon, gallium arsenide, or the like, constitutes a large number of transistors, diodes, etc., and has the function of driving the display of the liquid crystal display device 2. Referring to Figure 1,
The semiconductor device 1 includes a substrate 10 which is a wiring board;
For example, an electrode 11 formed on the top layer of SiN, S
Surface protective layer 12 made of iO2 or polyimide, etc.
including. The electrode 11 is made of Al-5t, for example.

この半導体装置1の電極11上には、後述される本発明
の電極の形成方法に従−)て突起電極13が形成される
A protruding electrode 13 is formed on the electrode 11 of this semiconductor device 1 according to the electrode forming method of the present invention described later.

一方、液晶表示板5の電極3は、たとえばソーダガラス
などの表面上に形成された錫添加酸化インジウム(In
diu+* Tin 0xide、以下rlTo、と略
記する)またはニラゲルでめっきされたITOであって
、通常厚みは100〜200 rIrr+程度である。
On the other hand, the electrode 3 of the liquid crystal display panel 5 is made of tin-doped indium oxide (Indium oxide) formed on the surface of soda glass or the like.
It is ITO plated with diu+* Tin Oxide (hereinafter abbreviated as rlTo) or Nilagel, and usually has a thickness of about 100 to 200 rIrr+.

半導体装置1と液晶表示板5とは、電極3.11間が所
定の間隔11となるように、突起型%13と電極3とを
対向して圧接し、この状態で予め基板5,10間に充填
された接着剤層14を硬化して接合する。接着剤層14
としては、たとえば反応硬化性、嫌気硬化性、熱硬化性
、光硬化性などの各種接着剤を使用することができる。
The semiconductor device 1 and the liquid crystal display board 5 are pressed into contact with the protruding mold 13 and the electrode 3 facing each other so that a predetermined distance 11 is maintained between the electrodes 3 and 11, and in this state, the gap between the substrates 5 and 10 is The adhesive layer 14 filled in is cured and bonded. Adhesive layer 14
For example, various adhesives such as reactive curable, anaerobic curable, thermosetting, and photocurable adhesives can be used.

特に本実施例では、液晶表示板5が透光性材料であるガ
ラスから成るので、接着剤層14には高速接自可能な光
硬化性接着剤を使用することができる。
In particular, in this embodiment, since the liquid crystal display panel 5 is made of glass, which is a translucent material, the adhesive layer 14 can be made of a photocurable adhesive that can be attached at high speed.

第3図に、上述の第1図に示した突起電極13に使用さ
れる弾性導電粒子15の一例の断面口を示す。弾性導電
粒子15は、高分子材料から成る弾性ビーズ16表面上
に、金属材料から成る導電性の被覆層17が被覆されて
構成される。弾性ビーズ16としては、ポリイミド樹脂
、エポキシ樹脂、アクリル樹脂などの自戒樹脂およびシ
リコーンゴl−、ウレタンゴムなどの自戒ゴムが使用で
きる。
FIG. 3 shows a cross-sectional view of an example of the elastic conductive particles 15 used in the protruding electrode 13 shown in FIG. 1 above. The elastic conductive particles 15 are constructed by covering the surfaces of elastic beads 16 made of a polymeric material with a conductive coating layer 17 made of a metal material. As the elastic beads 16, resins such as polyimide resins, epoxy resins, and acrylic resins, and rubbers such as silicone rubber and urethane rubber can be used.

被覆層17の導電性材料としては、半田付性、延性の点
からAuが好ましいけれども、pt、P(量、Ni、C
u、In、Sr1.Pb、CC01Aなどの金属および
これらのき金を、弾性ビーズ16表面上に一層もしくは
二層以上で被覆してもよい。二層以上で被覆する場きに
は、弾性ビーズ161・、の密着性に優れるたとえばN
iなどの金属層を先に形成し、さらにそれら金属層の酸
化を防止するためにAuなどの金属層を被覆する。被覆
の方法としては、スパッタリング法あるいはエレクトロ
ンビーム蒸着法、および無電解め−)きなどの方法を用
いることができる。
As the conductive material for the coating layer 17, Au is preferable from the viewpoint of solderability and ductility, but pt, P (amount, Ni, C
u, In, Sr1. Metals such as Pb and CC01A and their metal plates may be coated on the surface of the elastic beads 16 in one layer or in two or more layers. When covering with two or more layers, use a material with excellent adhesion to the elastic beads 161, such as N
A metal layer such as i is formed first, and then a metal layer such as Au is coated to prevent oxidation of the metal layer. As a coating method, a method such as a sputtering method, an electron beam evaporation method, or an electroless plating method can be used.

第4図は、半田金属を用いて本発明の電極の形成方法を
実施する場合の製造工程を順次的に示す断面図である。
FIG. 4 is a cross-sectional view sequentially showing the manufacturing steps when implementing the electrode forming method of the present invention using solder metal.

半導体装置1の電極11としては、通常Al−3iが使
用されている。したか−)てこの電極11上に金属の拡
散を防止するためのバリアメタル層18、親半、田層1
9、および半田層20をこの順に、蒸着法、フォトリン
グラフィ法、めっき法などの周知の方法によって形成し
、第4図(1)に示される構造を有した接続領域を電極
11上に形成する。バリアメタル層18としては、Ti
、W、Orなどの金属およびそれらのき金が使用できる
。親半田層1つとしては、Cu 、N i、Au、Ag
、Ptなとの金属およびそれらの6金が使用できる。半
田層20としては、比較的低融点のp b −S rr
系(融点m 、 p  矢183 ”(:、 )、I 
基−8n系(lT1.P、”F116℃)などが使用で
きる。
As the electrode 11 of the semiconductor device 1, Al-3i is usually used. Did you know?) Barrier metal layer 18 for preventing metal diffusion, parent solder, solder layer 1 on lever electrode 11
9 and a solder layer 20 are formed in this order by a well-known method such as vapor deposition, photolithography, or plating to form a connection region having the structure shown in FIG. 4(1) on the electrode 11. do. As the barrier metal layer 18, Ti
, W, Or, and their base metals can be used. As one parent solder layer, Cu, Ni, Au, Ag
, Pt, and their hexagonal gold can be used. As the solder layer 20, p b -S rr having a relatively low melting point is used.
System (melting point m, p arrow 183'' (:, ), I
Group-8n type (IT1.P, "F116°C)" etc. can be used.

第4図(1)に示される構造を有した接続領域が形成さ
れた半導体装置1上に、スビンコーl−あるいはロール
コートなどの方法によって7ラツクス21を塗布する。
7lux 21 is coated on the semiconductor device 1 on which the connection region having the structure shown in FIG. 4(1) is formed by a method such as coating or roll coating.

このフラックスを塗布する目的は、半田付性を向上する
とともに、弾性導電粒子15を基板10上に付着させる
ためである。したがってこのフラックス21としては、
非揮発性を有するとともに所定の粘性を有するものが用
いられる。
The purpose of applying this flux is to improve solderability and to adhere the elastic conductive particles 15 onto the substrate 10. Therefore, as this flux 21,
A material that is non-volatile and has a predetermined viscosity is used.

次に第4図(2)に示されるように、第3図に示された
弾性導電粒子15を基板10上に配置する。したがって
7ラツクス21の厚みとしては、弾性導電粒子15の直
径の1/2〜115程度であることが好ましい。この後
、基板10を220〜250℃に加熱して半田層20を
再溶融し、弾性導電粒子15表面に形成された被覆層1
7と半田接合させる。
Next, as shown in FIG. 4(2), the elastic conductive particles 15 shown in FIG. 3 are placed on the substrate 10. Therefore, the thickness of the 7 lux 21 is preferably about 1/2 to 115 times the diameter of the elastic conductive particles 15. Thereafter, the substrate 10 is heated to 220 to 250°C to remelt the solder layer 20, and the coating layer 1 formed on the surface of the elastic conductive particles 15 is
7 and solder together.

半田接合後に、基板10および接合された弾性導電粒子
15を冷却し、表面に塗布されたフラックス21および
不要な弾性導電粒子15を除去するためにア七トンなど
の有機溶剤で洗浄する。これによって第4図(3〉に示
されるように、弾性導電粒子15から成る突起電極13
が形成された半導体装置1を得ることができる。第4図
(3)においては、1つの電極11の接続領域に対して
1個の弾性導電粒子15が配置しているけれども、1つ
の電極11の接続領域に対して複数個の弾性導電粒子1
5を配置して突起電極13を形成するようにしてもよい
After the solder bonding, the substrate 10 and the bonded elastic conductive particles 15 are cooled and cleaned with an organic solvent such as A7T to remove the flux 21 applied to the surface and unnecessary elastic conductive particles 15. As a result, as shown in FIG. 4 (3), the protruding electrode 13 made of elastic conductive particles 15
It is possible to obtain a semiconductor device 1 in which is formed. In FIG. 4(3), one elastic conductive particle 15 is arranged for the connection area of one electrode 11, but a plurality of elastic conductive particles 1 are arranged for the connection area of one electrode 11.
5 may be arranged to form the protruding electrode 13.

以上説明した手順に従−)て形成された弾性導電粒子1
5から成る突起電極13を有する半導体装置1は、先に
説明した第2図の液晶表示装置2のように、他の回路基
板に圧接した状態で予め回路基板間に充填された接着剤
を硬化して回路基板相互を接合し、実装することができ
る。
Elastic conductive particles 1 formed according to the procedure explained above
The semiconductor device 1 having the protruding electrodes 13 consisting of 5 is made by hardening the adhesive filled between the circuit boards in advance while being in pressure contact with another circuit board, like the liquid crystal display device 2 of FIG. 2 described above. The circuit boards can then be bonded together and mounted.

第5図は、本発明の他の実施例を説明するための断面図
である。なお第4図に示した実施例と対応する部分には
同一の参照符号を用いる。第5121に示す電極の形成
方法においては、2つの金属層が加圧加熱された状態で
、これら2つの金属層の界面において金属が固相状態で
相互に拡散して合合接きが行われることを利用する。し
たがって本実施例においては弾性導電粒子15として、
その被覆層17が特にAu、3n、またはA u −S
 n合金を主成分とする金属材料から形成されたものを
使用することが好ましい。
FIG. 5 is a sectional view for explaining another embodiment of the present invention. Note that the same reference numerals are used for parts corresponding to the embodiment shown in FIG. In the method for forming an electrode shown in No. 5121, the two metal layers are heated under pressure, and the metals are mutually diffused in a solid state at the interface of these two metal layers to perform bonding. Take advantage of that. Therefore, in this example, as the elastic conductive particles 15,
The covering layer 17 is in particular Au, 3n or Au-S
It is preferable to use a metal material whose main component is an n-alloy.

第5図(1)は、本実施例に用いられる半導体装置24
の基板10土の電極構造を示す断面口である。基板10
上のたとえばAt−3iから成る電極11には、バリア
メタル層18および拡散によって接合される拡散用金属
層22が、蒸着法、フォl−リソグラフィ法、めっき法
など周知の方法によって予め形成される。バリアメタル
層18としては、T i 、 W 、 Crなとの金属
およびそれらの合金が使用できる。拡散用金属層22と
しては、第3図に示した弾性導電粒子15の被覆層17
と同じ金属材IIを用いることができるけれども、好ま
しくはA u 、 S r+ 、またはA u −S 
n合金を主成分とするものが使用される。
FIG. 5(1) shows a semiconductor device 24 used in this embodiment.
This is a cross-sectional view showing the electrode structure of the substrate 10. Substrate 10
On the above electrode 11 made of At-3i, for example, a barrier metal layer 18 and a diffusion metal layer 22 to be bonded by diffusion are formed in advance by a well-known method such as vapor deposition, photolithography, or plating. . As the barrier metal layer 18, metals such as Ti, W, Cr, and alloys thereof can be used. As the diffusion metal layer 22, a coating layer 17 of elastic conductive particles 15 shown in FIG.
Although the same metal material II can be used, preferably A u , S r+ or A u −S
A material whose main component is an n-alloy is used.

第5図(2)に示されるように、予め粘着剤26が塗布
された仮基板23上に弾性導電粒子15を一様に並んだ
状態で付着させる。この弾性導電粒子15が表面に担持
された仮基板23を、第5図(1)に示した電極11上
に拡散用金属層22が形成された半導体装置24に対し
て対向させ、矢符25で示される方向に1 k g /
 m rn ’程度の加圧を行うとともに300〜35
0℃の加熱を行う。これによって弾性導電粒子15の金
属材料から成る被覆層17と電極11上に形成された拡
散用金属層22との界面で金属が相互に拡散して合金接
合が行われ、弾性導電粒子15を含む突起電極13が基
板10上の電極11に対応した位置に形成される。なお
上述の加圧および加熱時に、接合部に対して超音波を加
える方法を併用することによって、電極11上にバリア
メタル層18および拡散用金属層22を設けることなく
、直接に弾性導電粒子15を電極11に対して接きする
ことができる。
As shown in FIG. 5(2), the elastic conductive particles 15 are uniformly arranged and adhered onto the temporary substrate 23 to which the adhesive 26 has been applied in advance. The temporary substrate 23 on which the elastic conductive particles 15 are supported is opposed to the semiconductor device 24 in which the diffusion metal layer 22 is formed on the electrode 11 shown in FIG. 5(1). 1 kg/in the direction indicated by
Pressure is applied to about 300 to 35 mrn'.
Heating is performed at 0°C. As a result, the metals are mutually diffused at the interface between the covering layer 17 made of the metal material of the elastic conductive particles 15 and the diffusion metal layer 22 formed on the electrode 11, and alloy bonding is performed, and the elastic conductive particles 15 and A protruding electrode 13 is formed on the substrate 10 at a position corresponding to the electrode 11. Note that by using a method of applying ultrasonic waves to the bonded portion at the time of the above-mentioned pressurization and heating, the elastic conductive particles 15 are directly coated without providing the barrier metal layer 18 and the diffusion metal layer 22 on the electrode 11. can be in contact with the electrode 11.

弾性導電粒子15を仮基板23上に一様に担持させる方
法としては、仮基板23上に粘着剤26をスピンコード
、ロールコーI・あるいは印刷などの方法によって塗布
し、この粘着剤26に弾性導電粒子]5を付着させるこ
とによ−)て行うことができる。用いられる粘着剤26
としては、シリコン系、ポリイミド系などのき成樹脂類
、および高粘度を有するオイルやグリースなどのゾル状
の!i!ff質を使用することができる。この仮基板2
3上に塗布される粘着剤26の厚みとしては、弾性導電
粒子15の直径の1772〜1/1o程度が好ましい。
As a method for uniformly supporting the elastic conductive particles 15 on the temporary substrate 23, an adhesive 26 is applied onto the temporary substrate 23 by a method such as spin code, roll coat I, or printing, and this adhesive 26 is coated with elastic conductive particles. This can be carried out by attaching particles] 5 to ). Adhesive 26 used
Examples include molded resins such as silicone and polyimide, and sol-like oils and greases with high viscosity. i! ff quality can be used. This temporary board 2
The thickness of the adhesive 26 applied on the elastic conductive particles 15 is preferably about 1772 to 1/1 of the diameter of the elastic conductive particles 15.

粘着剤26が前記の値よりも厚いと、弾性導電粒子15
が仮基板23上に複数個以上で重層して付着し、薄い場
合には粘着性が低く弾性導電粒子15が均一にf土着し
た付着層を形成することができない。
If the adhesive 26 is thicker than the above value, the elastic conductive particles 15
If a plurality of particles or more adhere to the temporary substrate 23 in a layered manner and are thin, the adhesiveness is low and it is impossible to form an adhesion layer in which the elastic conductive particles 15 are evenly adhered.

また電ill上にバリアメタル層18などを介して予め
形成される拡散用金属層22の層厚としては、加圧加熱
時に圧力を集中させるとともに電極11上の接続領域以
外の部分I\弾性導電粒子15が圧着する事態を防止す
るために、弾性導電粒子15の直径の17′2程度で形
成されることが好ましい。拡散用金属層22が前記の値
よりも厚いと、その層厚に弾性導電粒子15の直径を加
えた値の不揃いが大きくなる。したかつて正続特番こ大
きな加圧力を必要とするとともに、弾性導電粒子15の
変形量がむやみに増大してしまう。また薄い場6には、
表面保護層12などの不要な部分にまで弾性導電粒子1
5がfす着する不所望な事態を招いてしまう。さらに本
実施例においても、先の第4図に示した実施例と同様に
、1つの電極11に対して複数個の弾性導電粒子15が
扱きされて突起電極13が形成されるようにしてもよい
Further, the thickness of the diffusion metal layer 22 formed in advance on the electrode 11 via the barrier metal layer 18 etc. is determined by concentrating the pressure during pressurization and heating, and making the portion I\elastic conductivity in the area other than the connection area on the electrode 11 In order to prevent the particles 15 from being compressed, it is preferable that the diameter of the elastic conductive particles 15 is approximately 17'2. If the diffusion metal layer 22 is thicker than the above value, the value of the sum of the layer thickness and the diameter of the elastic conductive particles 15 will become more uneven. In addition to requiring a large pressing force, the amount of deformation of the elastic conductive particles 15 increases unnecessarily. Also, in thin field 6,
Elastic conductive particles 1 are applied even to unnecessary parts such as the surface protective layer 12.
This leads to an undesirable situation in which the number 5 is damaged. Furthermore, in this embodiment, as in the embodiment shown in FIG. good.

以上のようはして、電極11」二に弾性導電粒子15か
ら成る突起電極13が形成された半導体装置24はまた
、第20に示されるように、液晶表示装置2などの他の
回路基板に圧接などの方法によ−)て実装することが可
能である。
As described above, the semiconductor device 24 in which the protruding electrodes 13 made of elastic conductive particles 15 are formed on the electrodes 11'2 can also be used on other circuit boards such as the liquid crystal display device 2, as shown in FIG. It can be mounted by a method such as pressure welding.

以上の実施例においては、半導体装置1,24の基板1
0上に突起電極13を形成するP@合に−)いて説明し
たけれども、半導体装置に関連して電極を形成する場合
に限定する必要はなく、たとえば他の回路基板上に電極
を形成する場合についても本発明は実施することができ
る。
In the above embodiment, the substrate 1 of the semiconductor devices 1 and 24 is
Although the explanation has been given regarding the formation of protruding electrodes 13 on 0, it is not necessary to limit the case to forming electrodes in connection with semiconductor devices, for example, when forming electrodes on other circuit boards. The present invention can also be carried out.

発明の詳細 な説明したように本発明によれば、簡単な方法によって
配線基板の電極上に突起した電極を微細に形成すること
ができる。この突起した電極は、弾性および導電性を有
する介在体が配線基板の電極上にき合接自によって固定
されて成る。このために、その接続は機械的仁高い強度
を有するとともに、電気的にも低抵抗である。また、相
互に接続される配線基板の電極の微細化に対応すること
が可能となる。したが−ノで、たとえばこの突起した電
極が形成された配線基板と他の配線基板とを圧接によっ
て電気的に接続する場きに、接続の信頼性が格段に向上
される。
DETAILED DESCRIPTION OF THE INVENTION According to the present invention, as described in detail, it is possible to form finely protruding electrodes on electrodes of a wiring board by a simple method. This protruding electrode is made up of an elastic and conductive intervening body that is fixed onto the electrode of the wiring board by self-bonding. For this reason, the connection has high mechanical strength and low electrical resistance. Further, it becomes possible to cope with miniaturization of electrodes of wiring boards that are connected to each other. However, for example, when the wiring board on which the protruding electrode is formed and another wiring board are electrically connected by pressure contact, the reliability of the connection is significantly improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に従って半導体装置1が液晶表示装置2
に実装された接合部を示す拡大断面図、第2図は液晶表
示装置2の断面図、第3図は弾性導電粒子15の断面図
、第4図は本発明の一実施例である電極の形成方法を示
す断面図、第5121は本発明の他の実施例である電極
の形成方法を示す断面図である。 1.24・・・半導体装置、2・一液晶表示装置、3゜
4.11−・・電極、5,6・・・液晶表示板、10・
・・基板、12・・・表面保護層、13・・・突起電極
、14・接着剤層、15・・・弾性導電粒子、18・−
バリアメタル層、1つ・−・親半田層、20・・・半田
層、22・−・拡散用金属層 代理人  弁理士 画数 圭一部
FIG. 1 shows that a semiconductor device 1 is a liquid crystal display device 2 according to the present invention.
2 is a sectional view of the liquid crystal display device 2, FIG. 3 is a sectional view of the elastic conductive particles 15, and FIG. 4 is an enlarged sectional view of an electrode according to an embodiment of the present invention. 5121 is a sectional view showing a method of forming an electrode according to another embodiment of the present invention. 1.24...Semiconductor device, 2.1 Liquid crystal display device, 3°4.11-...Electrode, 5,6...Liquid crystal display board, 10.
...Substrate, 12...Surface protective layer, 13...Protruding electrode, 14.Adhesive layer, 15...Elastic conductive particles, 18.-
Barrier metal layer, 1 -- Parent solder layer, 20 Solder layer, 22 -- Diffusion metal layer Agent Patent attorney Keiichi

Claims (1)

【特許請求の範囲】[Claims] 弾性および導電性を有する介在体を配線基板の電極上に
合金接合によって固定するようにしたことを特徴とする
電極の形成方法。
A method for forming an electrode, characterized in that an intervening body having elasticity and conductivity is fixed onto an electrode of a wiring board by alloy bonding.
JP63334226A 1988-12-29 1988-12-29 Method of forming electrodes Expired - Fee Related JPH0793342B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63334226A JPH0793342B2 (en) 1988-12-29 1988-12-29 Method of forming electrodes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63334226A JPH0793342B2 (en) 1988-12-29 1988-12-29 Method of forming electrodes

Publications (2)

Publication Number Publication Date
JPH02180036A true JPH02180036A (en) 1990-07-12
JPH0793342B2 JPH0793342B2 (en) 1995-10-09

Family

ID=18274961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63334226A Expired - Fee Related JPH0793342B2 (en) 1988-12-29 1988-12-29 Method of forming electrodes

Country Status (1)

Country Link
JP (1) JPH0793342B2 (en)

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US5783867A (en) * 1995-11-06 1998-07-21 Ford Motor Company Repairable flip-chip undercoating assembly and method and material for same
US6881611B1 (en) 1996-07-12 2005-04-19 Fujitsu Limited Method and mold for manufacturing semiconductor device, semiconductor device and method for mounting the device
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