JPH02177333A - Manufacture of field-effect transistor - Google Patents

Abstract

PURPOSE:To achieve high gain and speed by forming a Schottky gate electrode having a nearly T-shaped sectional area with a CVD film embedded with an inverse taper-shaped resist formed by the image inversion method as a mask. CONSTITUTION:An N-type ion implantation layer 2 is formed on a high- resistance GaAs substrate 1 and then an inverse-taper-shaped resist 3 is formed on it by the image inversion method using a positive type resist. After embedding the resist 3 with a silicon oxide film 4 by the plasma CVD method, the surface is flattened by the aeolotropy plasma etching. Then, a compound layer 5 of tungsten and silicon is formed and a resist 6 which becomes the mask for forming a gate electrode is formed on it. After that, the compound layer 5 is etched with the resist 6 as a mask, the silicon oxide film 4 is eliminated for forming an electrode with nearly T-shaped sectional area, and then the compound layer 5 is formed. Then, ion implantation is performed with the compound layer 5 as a mask for forming a low-resistance GaAs layer 7 and then electrodes 8 and 9.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a gate electrode of a field effect transistor.

[Conventional technology]

FIG. 3 is a cross-sectional view showing the conventional manufacturing method of the gate electrode of a field effect transistor.
aAs substrate, 2 is N-type GaA formed on GaAs substrate 1;
s layer, 5 is a compound layer for making Schottky contact with the N-type GaAs layer 2, 7 is a low-resistance N-type GaAs layer formed on the GaAs substrate 1, and 8 is a compound layer for making ohmic contact with the low-resistance N-type GaAs layer 7. The metal layer 11 is a molybdenum layer that serves as a mask when etching the gate electrode 7 in the lateral direction.

Next, a manufacturing method according to this prior art will be explained.

First, as shown in FIG. 3(a), a high resistance GaAs substrate l
Then, N-type ion implantation 12 is formed by ion implantation or the like. A tungsten and silicon compound layer 5 and a molybdenum layer II are formed thereon by the Svanta method, and a gate electrode is formed by photolithography and reactive ion etching.

Next, as shown in FIG. 3(b), the compound layer 5 is laterally etched using the molybdenum Jilt as a mask, and ion implantation and annealing are performed using the molybdenum layer 11 and the compound 1i5 as masks to reduce the resistance. An N-type GaAs layer 7 is formed.

Next, as shown in FIG. 3, a metal layer having ohmic properties is deposited on the entire surface of the low-resistance N-type GaA layer 7 by an electron beam method. Gold lX1 due to the step formed
18 is separated from the source electrode of the field effect transistor.
This becomes a drain electrode 8 and a gate electrode layer 9. The feature of this manufacturing method is that it is possible to form a gate electrode that is finer than that formed by photolithography.

[Problem to be solved by the invention]

However, in this conventional manufacturing method, in order to thicken the ohmic electrode, it is necessary to thicken the compound layer of the gate electrode to avoid contact between the ohmic electrode and the gate electrode. However, in general, a compound layer of tungsten and silicon and GaAs Since the stress between the two layers is large, increasing the thickness of the compound layer causes problems such as peeling. Also,
In order to refine the gate after forming the gate electrode,
The problem is that it cannot be applied to field effect transistors with recessed structures, which are advantageous in terms of withstand voltage.

This invention was made in order to solve the problems of the conventional ones as described above, and it is possible to increase the thickness of the compound layer without causing problems such as peeling, and it can also be applied to field effect transistors with recessed structure. The purpose of this invention is to obtain a method for manufacturing field-effect transistors that can be used.

[Means to solve the problem]

A method for manufacturing a field effect transistor according to the present invention is to form a reverse tapered resist by an image reversal method using a positive resist, and to embed the resist with a CVD film, thereby forming a CVD film having an inverted shape from that of the resist. A Schottky gate electrode is formed by forming a Schottky gate electrode and using the CVDIIg as a mask.

[Effect]

In the manufacturing method according to the present invention, the shape of the gate electrode is formed in advance by an image reversal method using a positive resist, so that it is possible to increase the step for separating the ohmic layer, and also to create a recessed structure. It can also be applied to field effect transistors.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a method for manufacturing a field effect transistor according to an embodiment of the present invention, and the method of this embodiment will be explained below using FIG.

First, as shown in Figure 1 (al), a high resistance GaAs substrate 1
Then, an N-type ion implantation layer 2 is formed by ion implantation or the like. A positive type photosensitive resist is applied thereon, and the resist 3 is left only in the portion that will become the gate electrode using an image reversal method.

Here, the image reversal method involves exposing only the areas where the resist is to be left, then cross-linking the resist in the areas where the resist is to be left through heat treatment, and then exposing the entire surface to light to expose the areas where the resist is to be removed. Then, when development is performed, the crosslinked portions of the resist are development resistant due to crosslinking, so the portions where the resist should be left remain undeveloped. This image reversal method is characterized in that the cross-sectional shape of the resist is inversely tapered.

Next, as shown in FIG. 1 (bl), after a resist 3 is buried with a silicon oxide film 4 by plasma CVD or the like, the surface is flattened by anisotropic plasma etching, and then, as shown in FIG. A compound layer 5 of tungsten and silicon is formed by a sputtering method as shown in FIG.

Thereafter, the compound 15 is etched using the resist 6 as a mask, and the silicon oxide ii4 is removed by etching, so that the compound layer 5 is formed as a gate electrode with a substantially T-shaped cross section as shown in FIG. Then the first
As shown in the figure (el), ion implantation is performed using the compound layer 5 as a mask to form a low resistance GaAs layer 7.

A metal, Nu, which can form an ohmic contact with the low resistance GaAs layer 7 by electron beam evaporation or the like, is
When the /AuGe layer is formed, the Ni/AuGe layer is formed due to the difference in level between the compound N5 and the surface of the GaAs substrate 1, as shown in FIG.
The AuGe layer is separated to reduce the electrical resistance of the electrode 8 which becomes the source or drain electrode, and the gate electrode made of the compound layer 5. A polar layer 9 is formed automatically.

Here, in the conventional manufacturing method, the step for separating the Ni/AuGe layer is formed only by the thickness of the gate electrode material, whereas in the manufacturing method of the present invention, the shape of the gate electrode material is The step is formed using the same method, and therefore, it has the characteristic that a large step can be formed even with the same thickness. Therefore, even if the thickness of the Nt/AuGe layer is increased, it is possible to separate the gate electrode, drain electrode,
The electric resistance of the source electrode is reduced, and a field effect transistor having high gain and high speed can be obtained.

Next, another embodiment of the present invention in which the above-described manufacturing method is applied to a recess structure field effect transistor will be described with reference to FIG.

First, an N-type ion-implanted layer 2 is formed on a high-resistance GaAs substrate 1 by ion implantation or the like, and a gate 1! Leaving the resist 3 only on the part that will become the pole, N i / A u G is applied by electron beam evaporation method etc.
When forming the resist 30 steps, N i
/ A u G e is separated, and a drain electrode/source electrode 8 is formed. When a silicon oxide film 4 is formed to bury the resist 3 by plasma CVD or anisotropic plasma etching, the result is as shown in FIG. 2+111.

Next, as shown in FIG. 2, after removing the resist 3, the N-type ion implantation layer 2 is etched using the silicon oxide film 4 as a mask to form a recess 10 structure. Then, a resist 6 for forming a gate electrode by lift-off is formed on the silicon oxide film 4, a metal layer such as Ti/Au is formed by electron beam evaporation, etc., and then a gate electrode 5 is formed by lift-off. . When the silicon oxide film 4 is removed by etching or the like, it becomes as shown in FIG. 2(C), and a Schottky gate electrode having a substantially T-shaped cross section can be formed in the recessed portion.

In this manner, the manufacturing method of this embodiment can be applied to a field effect transistor having a recessed structure, and a fine gate electrode with low resistance can be formed.

〔Effect of the invention〕

As described above, according to the present invention, a reverse tapered resist is formed by an image reversal method using a positive resist, and by embedding the resist with CVD1i, a C Dll having an inverted shape from that of the resist is formed. And that CV
Since the Schottky gate electrode is formed by using the D film as a mask, a substantially T-shaped gate electrode with low resistance can be formed, and a field effect transistor with high gain and high speed can be manufactured. be.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing one embodiment of the present invention, FIG. 2 is a sectional view showing another embodiment of the invention, and FIG. 3 is a sectional view of a conventional one. In the figure, 1 is a high resistance GaAs substrate, 2 is an N-type ion implantation layer, 3 is a resist, 4 is a silicon oxide film, 5 is a compound layer, 6 is a resist, 7 is a low resistance GaAs layer, 8 is an ohmic electrode, 9 10 is an electrode layer, 10 is a recess, and 11 is a molybdenum layer. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] (1) In a method for manufacturing a field effect transistor, a reverse tapered resist is formed by an image reversal method using a positive resist, and the resist is embedded with a CVD film to form a CVD film whose shape is reversed from that of the resist. A method for manufacturing a field effect transistor, comprising forming a Schottky gate electrode having a substantially T-shaped cross section using the CVD film as a mask.