JPH02161551A - Data transfer control system - Google Patents

Abstract

PURPOSE:To continuously send plural commands to the same other side by adding a request ID to plural information to be transferred from a master unit to the other side as serial numbers. CONSTITUTION:In the case of data transfer, a command and an address are combined as a group and a request ID(RID) is applied to the other side unit as a serial number. When the serial number reaches the maximum value, a queue state is held until the RID is canceled as the received result of status (ST). The adding timing of the RID is determined by a transmission control part 37. The ST sent from the slave unit is decided by a control part 39. When data are inputted to a buffer, the control part 37 sends all the commands stored in the buffer and the control part 57 on the slave side decides the commands and stacks them in an area 55. The control part 22 receives the RID and software extracts the command from the area 55 and executes an instruction. After ending the processing, data transmission is requested and the control part 37 adds data to the ST to transmit the data.

Description

[Detailed Description of the Invention] [Summary] A system in which a plurality of units are connected on a line and is equipped with a bus controller that issues bus usage rights, and data is transferred under a bus control method called the sprint method. The present invention relates to a data transfer control method in which a request ID is added to each of a plurality of pieces of information that a unit transfers to the same partner unit.

The purpose of the present invention is to enable the transmission and reception of multiple commands and multiple statuses to and from the same partner unit, so to speak, to be able to perform multiple commands and statuses continuously.

When one of the above units sends multiple commands to the same partner unit, the function is to write a request ID in each command, and the other unit receives and retains the request ID in each command. A function to write the request ID held above in each status when the corresponding unit sends multiple statuses, and a function to write the request ID held in each status in one of the units. The configuration includes a function to receive each request 10.

[Industrial application field]

The present invention relates to an 8-data transfer control system, especially a bus system in which multiple units are connected on a line and a bus usage right is issued.
When data is transferred under a bus control method called the sprint method in a system equipped with an arbiter, a request 10 is added to each piece of information that the constituent units transfer to the same partner unit. Related to data transfer control method.

Regarding data transfer under the split method.

When the masked unit issues a command to the slave side, it temporarily releases the line, and when the slave unit completes the specified processing.

The slave side then acts as a mask and transfers the data to the other party. This improves bus usage efficiency.

For this reason, in an information processing apparatus in which each unit such as a processor, memory, I10 control 1LVT device, etc. that constitute the information processing apparatus is linked on a line.

The sprint method mentioned above will be adopted.

[Conventional technology]

FIG. 7 shows a conventional configuration, and FIG. 8 shows a time chart for the conventional case.

In FIG. 7, 100-1.100-2. . . . are units such as a processor, memory, and I10 control device, respectively.

200 represents a bus arbiter. 300 represents a bus arbiter. Further, 1 is a transfer control circuit, 2 is a bus right issue request flip-flop, 3 is a bus right control circuit, 4 is a bus right grant reception flip-flop, 5 is a transmitting/receiving register, 6 is a gate, and 7 is a transmitting/receiving circuit. register, 8 is a response control circuit, 9 is a transfer end (bus complete) reception flip-flop, 10 is a bus monitoring circuit, 200
-1 represents a data bus, and 200-2 represents a bus control signal bus.

Needless to say, each unit is 100-1.100-
2. . . . have substantially the same configuration and perform the same processing.

It is now assumed that unit 100-1 requests data transfer from unit 100-2. In this case, as will become clearer with reference to the time chart shown in FIG.
The bus right control circuit 3 in the bus arbiter 300 receives the request (BREQ) and returns a permission (BGRNT) when granting the bus right. The permission (BGRNT) turns on the gate 6 and is taken into the transfer control circuit 1. Needless to say, the bus right control circuit 3 issues the above-mentioned permission (BGRNT) after processing conflicts with bus right requests from other units.

In the unit 100-1, the transfer control circuit 1 sends the information prepared on the transmission/reception register 5 onto the NfA 200. Information is sent to the data bus 200-1 in the order of command, address, and data, and in synchronization with the sending of the command, a bus start (BSTT) indicating the start of a bus sequence for 1τ is output.

During command, unit 100, which is currently masked,
-1 and the ID of the unit 100-2 that should become the slave
Each unit 100-i connected to the 0 line 200 for which
-2, and in this case, unit 1.
When 00-2 detects its own 10, it starts operating as a slave.

The unit 100-1 serving as a mask issues a transfer end (BCPT) in synchronization with the last transfer data to be transferred. Based on this, the bus arbiter 300 drops the grant (BGRNT) and requests from other units (BGRNT).
REQ) is accepted. During this time, the bus monitoring circuit 10 monitors errors on the bus.

The unit 100-2 operated as the slave.

When the process corresponding to the above command is performed, the status corresponding to the command is returned to the unit 100-1 serving as the mask. The operation in this case is exactly the same as the case shown in FIG. 8, with the unit 100-2 acting as a mask and the unit 100-1 acting as a slave.

Figure 9 shows a conventional time chart explaining the transmission/reception relationship between commands and status, in which the mask requests the slave to transfer the number of data indicated by the byte count from the specified address. In the example shown in FIG. 0, numeral 11O represents a command, and 120 represents a status.

Note that various control codes are given to the parts marked with * in the figure.

In Figure 9.

■ Unit A commands unit B as the other party.
Issue to-t.

■ Unit B has status 12 against unit l-A.
Issue 0-1.

■ After the transmission/reception corresponding to command 110-1 is completed.

Unit A commands 110 with unit B as the other party.
-2 issued.

■ Unit B has a status of 120 against unit A.
-2 issued.

■ After the transmission/reception corresponding to command 110-2 is completed.

Unit 8 commands 110 with unit B as the other party.
It is shown that -3 has been issued and...

[Problem to be solved by the invention]

In the case of the above conventional configuration, since the sprint method is adopted, the unit that became the mask) 100-1
When it has finished transmitting its own trepidation, it temporarily releases the line 200. This prevents one line 200 from being occupied by one unit for an undesired long period of time.

However, problems still remain. Even when the split method is adopted as described above, the unit A that issued the command cannot issue other commands until the status is returned from the other unit B in response to the command it issued. could not.

The present invention is capable of transmitting and receiving multiple commands and multiple statuses to and from the same partner unit in a so-called continuous manner. ! The purpose is to be able to run several batches.

[Means to solve the problem]

Figure 1 shows the principle configuration diagram of the present invention with reference numeral 100 in Figure 0.
-1.100-2. . . . are units such as a processor, memory, I10 control device, etc., and 200 is a line.

200-1 is a data bus, 200-2 is a bus control signal bus, 200-3 is a response line (RLN) provided in the present invention, 1 is a transfer control circuit, 3 is a bus right control circuit, and 8 is a response. control circuit.

, 10 represents a bus monitoring circuit, 21 represents a request ID management section on the mask unit side, and 22 represents a request ID management section on the slave unit side.

The transfer control circuit 1 issues a bus usage right issue request (BREQ) and a transfer end (BCPT), and after receiving a bus usage permission (bus ground master BGRM), transmits information such as commands into one line 200. Send.

A response line 200-3 is provided in the line 200, and the bus monitoring circuit 10 detects the bus start (
BSTT), issues a permission (bus/ground/slave BGR3) to the slave unit 100-2, turns on the gate in the unit 100-2, and sends a response from the unit 100-2 as a response. - Enable transmission on line 200-3.

When sending multiple commands to the same partner unit, the request ID management unit 21 in the mask side unit 100-1 writes the request ID in each command, and also writes the request ID in each command, and also writes the request ID in each command. Based on each request 10 written in each status, correspondence is established with each request ID in each previously issued command.

Further, the request ID management section 22 in the slave side unit 100-2 manages each request ID in each command.
When holding D and issuing each of the above individual statuses, each request I previously held within each status.
Write D.

[Effect]

Upon receiving the request (BREQ) from the transfer control circuit 1, the bus right control circuit 3 issues a permission (BGRM). In the unit 100-1, upon receiving the permission (BCRM), the transfer control circuit l sends the information onto the data bus 200-1, and also sends the bus star (BSTT) onto the bus control signal bus 200-2. ) is sent.

As a result, the slave unit 100-2 receives the information on the bus 200-1. Bus monitoring circuit 10
When the unit 100-2 receives the bus star (BSTT), it issues permission (BG) to the slave unit 100-2.
R3) to enable unit 100-2 to send a response to unit 100-1.

While receiving the information from the unit 100-1, the unit 100-2 performs an error check on each received piece of information 1, and sends a response line 200.
-3, the response is sent back.

The unit 100-1 serving as a mask continues to send out information while checking from the above response whether or not each piece of information that it is sending out has been correctly received. When all the information has been sent, a transfer end (BCPT) signal is issued.

When unit 100-1 is in the process of sending out its own information, a failure is reported by the response.

It is configured to issue a transfer end (BCRT) early so to speak, and release one line.

Note that even though an error occurs while information is being transferred from the unit 100-1, the slave unit 100-2 itself does not respond to the error due to a failure, for example. If it cannot be sent, the bus monitoring circuit 10, which monitors the status and contents of the 0 line 200, sends out a response indicating an error on behalf of the unit 100-2.

Unit 100-1 is the same as the other unit 100-
When issuing multiple commands to 2, a request ID is assigned to each request I.
The D management unit 21 assigns the request ID to each command. Then, when the status is returned from the slave unit 100-2, which is the other party's unit, it receives each request ID described in the respective status and assigns each request ID previously assigned. ! Make a correspondence with D.

In the slave side unit 100-2, each request ID written in each sent command is held. Then, the request ID management unit 22, in returning the above-mentioned status,
Write each of the request IDs held above into the relevant status.

In the case of the present invention, since the above-mentioned request 10 is given, when each unit sends a plurality of commands to the same partner unit, after issuing one command, the slave side 1 without waiting for the arrival of the corresponding status from the unit.
It becomes possible to issue other commands one after another.

〔Example〕

FIG. 2 shows the configuration of an embodiment of the present invention, FIG. 3 shows a time chart during normal operation, and FIG. 4 shows a time chart when an exception occurs.

In FIG. 2, the symbols 100.200.300. 1 to 10 correspond to FIG. 1 or FIG. 7, respectively.

11 represents a bus use permission (GBR3) reception flip-flop, 12 represents a GBR3), and 13 represents an 8-man power 3-output encoder.

Below, with reference to FIGS. 3 and 4, unit l-1
The following description assumes that 00-1 transfers information to units I- and 100-2.

When the transfer control circuit 1 issues a request (BRBQ).

The bus right control circuit 3 issues permission (BGRM).

Upon receiving the permission (BGRM), the unit 100-1 turns on the gate 6 and transfer control 711 circuit 1
The information prepared in the transmitting/receiving register 5 is sent onto the line 200. Information is transmitted on the data bus 200-1 in the order of command, address, and data, and in synchronization with the transmission of the command, a bus start (BSTT) indicating the start of the bus sequence is issued for 1τ.

Some commands include unit 1, which is a bus mask.
I between 00-1 and the unit 1002 that should become a slave
D is displayed, and unit 100-2 takes in the information on data bus 200-1, assuming that the information is addressed to itself.

Bus Control Signal Bus Start (BS) on bus 200-2
TT) is received by the bus monitoring circuit IO.

A permission (B G RS) is issued to the slave unit 100-2.

The slave unit 100-2 receives information on the data bus 200-1 every 1τ, and sends a response line 200-3 via the encoder 13 to report the state at the time of receiving the information. Sends the response above. RC, RA, RD shown in Fig. 3 and Fig. 4,
. . . represents a response as a result of receiving information C, A, D, . . . on the data bus.

The unit 100-1 serving as a mask performs the transfer while confirming that each piece of information has been normally received by the above response every lτ, and synchronizes with the last transfer to transmit the third information.
As shown in the figure, a transfer end (BCPT) is issued. The bus arbiter 300 accordingly grants (BGRM)
is dropped, and after 1τ, permission (BGR3) is also dropped.

When the unit 100-1 receives a notification that an error has occurred in the response (RA) indicated by the arrow as shown in FIG. 4 while the unit 100-1 is transferring information, the unit 100-1
After processing for τ, a transfer end (BCPT) is issued. As a result, as can be seen by comparing FIG. 3 and FIG. 4, permissions (BGRM and BGR3) are dropped early. Bus monitoring circuit 10 also issues a response on behalf of unit 100-2.

FIG. 5 shows a time chart illustrating the transmission and reception of commands and status in the case of the present invention. In FIG. 5, reference numeral 110 represents a command, and 120 represents a status. Note that various control codes are given to the parts marked with * in the figure.

In Fig. 5.

■Unit A issues a plurality of commands 110-1 to 110-4 all at once, with unit B as the other party.

■ Unit B has a status of 120 against unit A.
-1 issued.

■ Unit B has a status of 120 against Unit 8.
-2 issued.

■ Unit B has a status of 120 against unit A.
It is shown that -3 has been issued...

FIG. 6(A) shows the main part structure of one embodiment on the mask side, and FIG. 6(B) shows the main part structure of one embodiment on the slave side.

Reference numeral 30 in FIG. 6(A) is a chip bus control section, which controls a bus (not shown) within the chip. Also, 3
1 is a register, 32 is a switch.

33 is a command creation unit, 34 is a transmission data buffer,
35 is Banff 7 memory, 36 is a self-ID holding unit, 37
38 is a multiplexer, 39 is a reception control unit, and 40 is a status management unit.

41 is a receive data buffer, 42 is a multiplexer,
43 represents a register.

Further, reference numeral 44 in FIG. 6(B) is a register.

45 is a multiplexer, and 46 is a status creation section.

47 is a transmission control unit, 48 is a self-ID holding unit, 49 is a transmission data buffer, 50 is a switch, 51 is a register,
52 is a chip bus control section, 53 is a register, 54 is a multiplexer, 55 is a stack area, 56 is a receive data buffer, and 57 is a receive control section. 5B represents a register.

In FIG. 6(A), assuming that a request is made to issue an I10 instruction, the chip bus control unit 30.

Control the switch 32 to send the data to the command creation section 33
The command creation unit 33 specializes in the self-ID holding unit 3.
The command is formatted using the self ID from G and the request ID from the request ID management section 21, and is stored in the buffer memory 35.

In the case of data transfer, the command and address are stored as one set. The request ID is given to the same partner unit by serial number.

It operates as a so-called DMA pipeline.

When the serial number reaches the maximum value that can be given by the allocated bits, it enters a waiting state until the previously allocated request ID is canceled as a result of receiving the status. The timing for adding the request ID depends on instructions from the transmission control unit 37. When the reception control unit 39 determines that the status sent from the slave unit is a status, the status management unit 40 checks the status and sends the request 10 to the request 10 management unit 21. 1-Instruct to cancel ID.

The transmission control unit 37 receives data in the buffer.

When the I1O-Bus is acquired, as many commands as there are in the buffer are sent out as commands 110-1 to 110-4 shown in FIG.

In the slave side unit that has received the command from the mask unit, if the registration control unit 57 shown in FIG. 6(B) determines that it is a command, the stack area 5
Stack on 5. The stack is made up of FIFO buffers. When the slave side software learns that data has been input to the receive data buffer 56, it takes out commands one by one from the stack area 55 and executes the commands. At this time, the request 10 management unit 22.

Read and hold the request ID.

When the software completes processing, it requests data transmission. The transmission control unit 47 appends data to the status to be transmitted and transmits it. The status creation unit 46 creates a status format using the previously held request ID and self ID and sends it out.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to successively send a plurality of commands to the same partner unit.

[Brief explanation of the drawing]

Figure 1 is a diagram of the principle configuration of the present invention, Figure 2 is a configuration diagram of an embodiment of the present invention, Figure 3 is a time chart during normal operation, Figure 4 is a time chart when an exception occurs, and Figure 5 is a diagram of the present invention. A time chart explaining the situation of sending and receiving commands and statuses in the case of the invention. FIG. 6(A) shows the main part configuration of one embodiment on the mask side, FIG. 6(B) shows the main part structure of one embodiment on the slave side, and FIG. 7 shows the conventional configuration. FIG. 8 shows a time chart for the conventional case, and FIG. 9 shows a conventional time chart for explaining the transmission/reception relationship between commands and statuses. In the figure, reference numeral 100 represents a unit, 200 a line, 1 a transfer control circuit, 3 a bus right control circuit, 8 a response control circuit, and 21 and 22 request ID management sections, respectively.

Claims (1)

[Scope of Claims] A plurality of units (100) are connected on a line (200), and a bus arbiter (300) is provided that issues a bus usage right to occupy the line (200). When one of the units (100-1) requests the bus arbiter (300) to issue a bus right to use the bus and obtains permission, the other unit (100-1) sends the bus to the bus arbiter (300).
0-2) and issues a command describing the requested operation to the unit, and then temporarily releases the occupation of the line (200), and the other party unit (100-2) responds to the above command. When a request is made to the bus arbiter (300) to issue a bus usage right in order to send out the status of the result of dealing with the problem, one of the units (1
In a bus control system configured to release the occupation of the line (200) after specifying the command (00-1) and issuing a status as a result of the unit handling the command, one of the units (100-1) 1) is a request ID management unit (21) that writes a request ID into each of the above commands when sending multiple commands to the same one unit among the other party units (100-2). and a status management unit (40) that reads the request ID written in the status from the other party unit (100-2) and notifies the request ID management unit (21). The unit (100-2) has a stack area (55) that holds each command received above.
), and when the command is extracted from the stack area and executed when sending the above status, the request ID of the command to be processed is read into the above request ID management unit (21), and the above read request I is written in each status.
A data transfer control system, comprising: a request ID management section (22) for writing D, and each unit is configured to issue a plurality of commands consecutively to the same partner unit.