JPH02155431A - Input protecting circuit - Google Patents

Abstract

PURPOSE:To obtain a protecting circuit which is not affected by the breakdown voltage of a diode by providing a MOSFET in addition to a sole diode as protecting means for a surge input applied with a substrate as a reference. CONSTITUTION:An input protective diode 1.2 and input protective MOSFET 1.3 are formed between an input terminal and a semiconductor substrate 1.6 through an input protective resistor 1.1, and a positive surge input is provided with the semiconductor substrate 1.6 as a reference. Similarly, an input protective MOSFET 1.4 is formed between the input terminal and a GND through the resistor 1.1, and a positive surge input is provided with the GND as a reference. The FETs 1.3, 1.4 are connected at one of source and drain regions to the input terminal, and the other and a gate are connected to the substrate 1.6.

Description

[Detailed description of the invention] Industrial application field The present invention sets a positive conductivity type semiconductor substrate to a negative potential,
That is, the present invention relates to an input protection circuit for a semiconductor device that is used by applying a substrate bias voltage.

Background of the Invention In recent years, semiconductor devices have become smaller and more dense, and as a result, the gate oxide film of MO8 transistors has become thinner, especially in MO5 semiconductor devices, to protect them from external surge input. The importance of input protection circuits is increasing. On the other hand, there is a strong demand for even higher speeds in semiconductor devices, and the frequency of using semiconductor devices by applying a substrate bias voltage as a means to achieve this is also increasing.

For semiconductor devices used with such substrate bias voltage applied, there are two possible reference levels for surge input: the semiconductor substrate and the GND potential inside the semiconductor device, so many input protection circuits are required. In this case, two types are required corresponding to these cases. Conventionally used input protection circuits are shown in Figure 2 (a), (b), and (C).
Shown below. FIG. 2(a) shows an input protection circuit using a resistor and a diode, and FIG. 2(b) shows an input protection circuit using a resistor and an MO8 type transistor. Also, Figure 2 (C)
The diode and MO8 type transistor shown in FIGS. 2(a) and 2(b) are used together. That is, protective resistance 2
．． 1 to connect the input terminal to the n-type region,
An input protection diode 2.2 is formed between the semiconductor substrate and the semiconductor substrate. Also formed is an input protection MO8 type transistor 2.3 whose input side terminal is connected to one of the source/drain regions via the resistor 2.1, and whose source/drain region and gate of the other are connected to GND. There is.

2.4 represents the MOS type gate to be protected.

The operation of this input protection circuit is as follows. For example, the second
In Figure (C), if a positive surge input is applied with the board as a reference, a reverse bias voltage is applied to the input protection diode 2.2, and when this reaches the breakdown voltage of the diode, the surge input is blocked by the board due to breakdown. released to the side. Also, when a positive surge input is applied with GND as a reference, the input protection transistor 2
．．・A reverse bias voltage is applied to 3, and the surge input is released to the GND side due to the so-called punch-through effect of the transistor. The protective resistor 2.1 serves to limit the value of the above-mentioned reverse current. In this way gate 2
．． 4 should be protected from surge input based on either the board or GND.

Problems to be Solved by the Invention However, the input protection circuit described above has a drawback in that its effectiveness largely depends on the breakdown voltage of the diode. Generally, the breakdown voltage of a diode, that is, a PN junction, is determined by the concentration of impurities forming the PN junction, and as the impurity concentration decreases, the breakdown voltage increases. Therefore, for example, for the purpose of achieving higher speed operation, the resistivity of the P-type semiconductor substrate is set higher,
That is, when the impurity concentration of the P-type semiconductor substrate is lowered, the breakdown voltage of diode 2.2 increases due to the above-mentioned reason, and diode 2.2 However, the gate 2.4 does not function as an effective protection circuit, causing the inconvenience that the gate 2.4 is destroyed before the surge input due to breakdown is released to the board.

The present invention has been made in view of the above problems, and
This provides an input protection circuit that is not affected by diode breakdown voltage.

Means for Solving the Problems In order to solve the above-mentioned problems, the input protection circuit of the present invention uses an MO8 type transistor in which one of the source and drain regions is connected to the input terminal, and the other and the gate are connected to the semiconductor substrate. Configure using.

According to the input protection circuit of the present invention constructed in this way, a positive surge input applied to the input terminal with the board as a reference is not only caused by breakdown of the diode but also by punch-through of the MOS transistor. , and can exert an effective protective effect.

Embodiment FIG. 1 is a block diagram showing an embodiment of the input protection circuit of the present invention. An input protection diode 1.2 and an input protection MO8 type transistor 1.3 are formed between the input side terminal and the semiconductor substrate 1.6 via the input protection resistor 1.1, and a positive voltage with respect to the semiconductor substrate is formed. It is prepared for surge input. Also, connect the input side terminal to GND via the input protection resistor 1.1.
An input protection MO8 type transistor 1.4 is formed between them, and is prepared for positive surge input with GND as a reference. 1
．． 5 indicates a protected MOS type gate.

When a positive surge input with respect to the board is applied to this input protection circuit, diode 1.2 and transistor 1.3
A reverse bias voltage is applied to.

The diode 1.2 discharges the surge input to the substrate side by breakdown, and the transistor 1.3 discharges the surge input by punch-through. In other words, in the embodiment of the present invention, unlike the conventional case, not only the diode 1.2 but also the transistor 1.3 are provided as a discharge path for surge input, and as mentioned above, for example, the impurity concentration of the substrate must be changed. Even if the breakdown voltage of diode 1.2 increases due to reasons such as this, and the effect of surge release due to breakdown is no longer expected, transistor 1.
．． Since the surge input is released to the substrate side by the punch-through of No. 3, the protected gate 1.5 is spared from destruction. Furthermore, when a positive surge input with respect to GND is applied, a reverse bias voltage is applied to the protection transistors 2 and 4, and the surge input is released to the GND side due to the punch-through of these transistors, and the gate 2.
5 is protected. Also, in the case of surge input based on either the board or GND, resistor 1.1 can be replaced with diode 1.2 or MO
The current flowing through the S-type transistor 1.3.1.4 is limited to prevent the diode and transistor from being destroyed due to overcurrent.

Effects of the Invention As described above, according to the present invention, a MOS transistor is provided in addition to the conventional single diode as a means of protection against surge input applied with respect to the substrate. This increases the effect of input protection, which was insufficient with conventional protection circuits, and makes it possible to provide a semiconductor device that is even more resistant to surge input.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an input protection circuit according to an embodiment of the present invention, and FIGS. 2(a), (b), and (C) are block diagrams of a conventional input protection circuit. 1.1...Input protection resistor, 1.2...
・Input protection diode, 1.3...MOS type transistor for input protection, 1.4...MO8 type transistor for input protection, 1.5...Protected M
O8 type gate, 1.6...P type semiconductor substrate.゛Name of agent Patent attorney Shigetaka Awano and 1 other person L4 -
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Claims (1)

[Claims] In a semiconductor device in which a positive conductivity type semiconductor substrate is set to a negative potential, one of the source/drain regions is connected to an input side terminal, and the other source/drain region and the gate are connected to the semiconductor substrate. An input protection circuit characterized by using a MOS type transistor.