JPH02154457A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH02154457A JPH02154457A JP63309239A JP30923988A JPH02154457A JP H02154457 A JPH02154457 A JP H02154457A JP 63309239 A JP63309239 A JP 63309239A JP 30923988 A JP30923988 A JP 30923988A JP H02154457 A JPH02154457 A JP H02154457A
- Authority
- JP
- Japan
- Prior art keywords
- resin case
- electrode
- base plate
- metal base
- electrode terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 229920005989 resin Polymers 0.000 claims abstract description 23
- 239000011347 resin Substances 0.000 claims abstract description 23
- 229910052751 metal Inorganic materials 0.000 claims abstract description 20
- 239000002184 metal Substances 0.000 claims abstract description 20
- 229910000679 solder Inorganic materials 0.000 claims abstract description 6
- 239000006071 cream Substances 0.000 claims abstract description 5
- 239000000758 substrate Substances 0.000 claims description 9
- 238000007789 sealing Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052782 aluminium Inorganic materials 0.000 abstract description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 5
- 239000011889 copper foil Substances 0.000 abstract description 2
- 238000009413 insulation Methods 0.000 abstract 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 5
- 238000005476 soldering Methods 0.000 description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 239000011733 molybdenum Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 229920001296 polysiloxane Polymers 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 239000004744 fabric Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
この発明は例えば数１０Ａ〜数１００Ａのインバーター
等に使用されるパワーモジュールなどの半導体装置の構
造に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of a semiconductor device such as a power module used in an inverter of several tens of amperes to several hundreds of amperes.
［従来の技術］
第７図は従来のパワーモジュール等の半導体装置の内部
を示す斜視図であり、第８図は第７図に示すものに蓋を
取り付は主電流用電極端子（８）（９）、（１，０）を
折り曲げた後、ネジ閉めした状態を示した斜視図である
。[Prior Art] Fig. 7 is a perspective view showing the inside of a conventional semiconductor device such as a power module, and Fig. 8 shows a lid attached to the device shown in Fig. 7 and a main current electrode terminal (8). (9), (1,0) is a perspective view showing a state in which the screws are screwed after being bent.
図において（１）は半導体チップであり、（２）はモリ
ブデン板である。半導体チップ（１）はあらかじめモリ
ブデン板（２）に水素炉等により炉付されたものである
。（３）は信号用電極端子にあらかじめ半田付けされた
スビーｌアップダイオードチップ、（４）は銅ブロック
、（５）はあらかじめ銅ブロック（４）の上に炉付され
たフライホイルダイオードチッ、ブである。（６）は金
属ベース板、（７）は絶縁基板、（８）、（９）（１０
）は主電流用電極端子、（１１）、（１２）は信号用電
極端子である。（１３）はガラスクロス入りエポキシ板
、（１４）はアルミワイヤ（１５）は樹脂ケース、（１
６）はシリコンゲル、（１７）は樹脂封止用エポキシ樹
脂、（１８）は蓋、（２０）は銘板、（２１）は外部信
号端子、（２２）は被覆されたリード線〈 （２３）は
電極端子ネジ閉め用ネジ、（２４）は金属ベース板（６
）と樹脂ケース（１５）を接着する接着剤である。In the figure, (1) is a semiconductor chip, and (2) is a molybdenum plate. The semiconductor chip (1) is previously heated on a molybdenum plate (2) using a hydrogen furnace or the like. (3) is a small up diode chip pre-soldered to the signal electrode terminal, (4) is a copper block, and (5) is a flywheel diode chip pre-soldered onto the copper block (4). It is. (6) is a metal base plate, (7) is an insulating substrate, (8), (9) (10)
) are main current electrode terminals, and (11) and (12) are signal electrode terminals. (13) is an epoxy board with glass cloth, (14) is an aluminum wire, (15) is a resin case, (1
6) is silicone gel, (17) is epoxy resin for resin sealing, (18) is the lid, (20) is the nameplate, (21) is the external signal terminal, (22) is the covered lead wire (23) (24) is the metal base plate (6).
) and the resin case (15).
金属ベース板（６）上に絶縁基板（７）を搭載し、その
土に主電流用電極端子（８）、’（９）。An insulating substrate (7) is mounted on a metal base plate (6), and main current electrode terminals (8) and '(9) are mounted on the insulating substrate (7).
（１０）を搭載し、更に、その上にあらかじめ炉付等で
半田付けした半導体チップ（１）その他信号用電極端子
（１１）、（１２）を搭載し、同時に半田付けを行う。(10) is mounted, and furthermore, the semiconductor chip (1) and other signal electrode terminals (11) and (12) which have been soldered in advance using a furnace or the like are mounted thereon, and the soldering is performed at the same time.
その後アルミワイヤー（１４）により半導体チップ（１
）と電極端子間（８）（９）、（１０）、（１１）にワ
イヤボンディングを行い、ケース（１５）を金属ベース
板（６）に接着した後接着剤（２４）のキュアを行う。After that, the aluminum wire (14) is attached to the semiconductor chip (1).
) and electrode terminals (8), (9), (10), and (11), and after bonding the case (15) to the metal base plate (6), the adhesive (24) is cured.
更に内部の電極端子（１１）、（１２）と外部信号用端
子（２１）間はリード線（２２）による半田付けを行い
、シリコンゲル（１６）で全体をおおい、キュア後にエ
ポキシ樹脂封止（１７）を行うと同時に蓋（１８）をか
ぶせてキュアを行う。Furthermore, the internal electrode terminals (11), (12) and the external signal terminal (21) are soldered using lead wires (22), the whole is covered with silicone gel (16), and after curing, the epoxy resin is sealed ( At the same time as performing step 17), cover with the lid (18) and perform curing.
その後、主電流用電極端子（ｓ）、（９）、（１０）を
曲げて銘板（２０）を貼付けて完成させる［発明が解決
しようとする課題］
従来の半導体装置は以上のように構成されているので工
程が複雑であり部品点数も多く、蓋（１８）を取付ける
時に主電流用電極端子（８）、（９）、（１０）および
外部信号用端子（２１）を蓋（１８）の穴部に入れにく
かったり、主電流用電極端子（８）、（９）、（１０）
にリード線（２２）が接触するという作業能率上さまざ
まの問題点があった。Thereafter, the main current electrode terminals (s), (9), and (10) are bent and the name plate (20) is attached to complete the process. [Problem to be Solved by the Invention] The conventional semiconductor device is configured as described above. Since the process is complicated and there are many parts, when installing the lid (18), the main current electrode terminals (8), (9), (10) and the external signal terminal (21) are connected to the lid (18). Main current electrode terminals (8), (9), (10) may be difficult to insert into the hole.
There were various problems in terms of work efficiency, such as the lead wire (22) coming into contact with the lead wire (22).
この発明は上記の問題点を解消するためになされたもの
で部品点数を減らし作業能率を上げることを目的とする
。This invention was made to solve the above problems, and its purpose is to reduce the number of parts and increase work efficiency.
［課題を解決するための手段］
この発明に係る半導体装置は、金属ベース板上に絶縁層
または絶縁基板を設け、その上に複数の電極板および半
導体チップを搭載し、これとは別体に上記電極板に接続
される主電流用電極端子及び信号用電極端子を樹脂ケー
スにあらかじめインサート又はアウトサートしておき、
この樹脂ケースを前記金属ベース板にかぶせて接着する
際にクリーム半田により樹脂ケース側の複数の電極端子
を金属ベース板側の複数の電極板に半田付けしたことを
特徴とする。[Means for Solving the Problems] A semiconductor device according to the present invention includes an insulating layer or an insulating substrate provided on a metal base plate, a plurality of electrode plates and semiconductor chips mounted thereon, and a semiconductor device provided separately from this. Insert or outsert the main current electrode terminal and signal electrode terminal connected to the above electrode plate into the resin case in advance,
The present invention is characterized in that when the resin case is placed over and bonded to the metal base plate, the plurality of electrode terminals on the resin case side are soldered to the plurality of electrode plates on the metal base plate side using cream solder.
〔作用１
この発明における半導体装置は樹脂ケースに主電流用端
子および信号用電極端子をインサート又はアウトサート
することにより蓋取付けを必要としないネジ閉めタイプ
の半導体装置を作ることができる。[Function 1] By inserting or outsert the main current terminal and the signal electrode terminal into the resin case, the semiconductor device of the present invention can be made into a screw-clamp type semiconductor device that does not require a lid attachment.
以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第１図は本発明の一実施例による半導体装置に使用する
金属ベース板（６）上に厚銅箔付絶縁基板（７Ａ）を搭
載しその上に半導体チップ（１）及びフライホイルダイ
オードチップ（５）、スピードアップダイオードチップ
（３）を同時に半田付けした後アルミワイヤー（１４）
によりボンディングしたものを示している。なお（Ｒ）
は半田付は面であり、後述する電極端子の半田付は面（
Ｓ）と対接するようになされている。FIG. 1 shows an insulating substrate (7A) with thick copper foil mounted on a metal base plate (6) used in a semiconductor device according to an embodiment of the present invention, and a semiconductor chip (1) and a flywheel diode chip (7A) mounted thereon. 5), Aluminum wire (14) after soldering the speed up diode chip (3) at the same time
The figure shows the bonding process. Note (R)
Soldering is a surface, and soldering of electrode terminals described later is a surface (
S).
第２図は本発明の樹脂ケースの正面図であり、第３図は
第２図の樹脂ケースを裏面から見た図である。第４図は
第２図のＡ−Ａ’線の断面図であり、第５図はＢ−Ｂ’
線の断面図である。第６図は樹脂ケースの側面図である
。図において（８）（９）、（１０）は主電流用電極端
子、（６）は金属ベース板、（２１）は外部信号用端子
、（１９）は電極端子ネジ閉め用ナツト、（１５）は樹
脂ケースである。このように樹脂ケース（１５）は主電
流用電極端子（８）、（９）、’（１０）や外部信号用
端子（２１）を一体向にインサート成形している。FIG. 2 is a front view of the resin case of the present invention, and FIG. 3 is a view of the resin case of FIG. 2 viewed from the back. FIG. 4 is a cross-sectional view taken along line AA' in FIG. 2, and FIG. 5 is a sectional view taken along line BB' in FIG.
FIG. FIG. 6 is a side view of the resin case. In the figure, (8), (9), and (10) are the main current electrode terminals, (6) is the metal base plate, (21) is the external signal terminal, (19) is the electrode terminal screw tightening nut, and (15) is a resin case. In this way, the resin case (15) has the main current electrode terminals (8), (9), '(10) and the external signal terminal (21) integrally insert molded therein.
第１図まで工程を進めた後、第３図の電極端子の半田付
は面（Ｓ）にペースト状のクリーム半田を塗布し、ケー
ス（１５）の裏面の金属ベース板（６）と接触する部分
に接着剤を塗布し第１図のものと組合せ電極端子の半田
付は面（Ｓ）と相手方の半田付は面（Ｒ）との半田接着
と樹脂ケース金属ベース間の接着を行う。その後ゲル注
入を行いキュア後樹脂注入キュアを行う。主電流電極端
子は説明をわかりやずくする為に立てたものを図示して
いるが前もって曲げたものを使用する。After proceeding with the process up to Figure 1, to solder the electrode terminal in Figure 3, apply paste-like cream solder to the surface (S) and contact it with the metal base plate (6) on the back side of the case (15). Apply adhesive to the parts and combine with the one shown in FIG. 1. The electrode terminal is soldered to the surface (S) and its counterpart is soldered to the surface (R), and the resin case and the metal base are bonded together. After that, gel injection is performed and cured, followed by resin injection curing. The main current electrode terminal is shown standing up to make the explanation easier to understand, but it should be bent in advance.
［発明の効果］
以上のようにこの発明によれば蓋を用いることなくネジ
閉めタイプのパワーモジュールが得られ組立工程も簡略
化される。[Effects of the Invention] As described above, according to the present invention, a screw-closing type power module can be obtained without using a lid, and the assembly process can be simplified.
第１図はこの発明の一実施例による金属ベース板上に絶
縁基板を載せその上にチップを搭載した後ワイヤホンデ
ィングした平面図であり、第２図は主電流端子と信号用
電極端子をインサート又はアウトサートしたケースの正
面図であり、第３図は裏面より見たケースの内側図であ
る。第４図は第２図のケースのＡ−Ａ′線に於ける断面
図であり、第５図はＢ−Ｂ’線に於ける断面図であり、
第６図は側面図である。第７図は従来のモジュールの内
部構造を示す斜視図であり、第８図は従来の最終外形を
示す斜視図である。
図において（１）は半導体チップ、（２）はモリブデン
板、（３）はスピードアップダイオードチップ、（４）
は銅ブロック、（５）はフライホイルダイオードチップ
、（６）は金属ベース板、（７）、（７Ａ）は絶縁基板
、（８）、（９）（１０）は主電流用電極端子、（１１
）、（１２）は信号端子、（１３）はガラスクロス入り
エポキシ板、（１４）はアルミワイヤー、（１５）は樹
脂ケース、（１６）はシリコンゲル、（１７）はエポキ
シ樹脂、（１８）は蓋、（１９）はナツト、（２０）は
銘板、（２１）は外部信号用端子（２２）はり−ト線、
（２３）はネジ、（２４）は接着剤である。
なお、図中同一符号は同−又は相当部分を示す代理人
弁理士 大 岩 増 雄Ｑ） ｏｌＣ）噴ｑ
勺
第
図
２３：電極！５３ネジ゛閉ぬ用ネジFig. 1 is a plan view of an insulating substrate placed on a metal base plate according to an embodiment of the present invention, a chip mounted thereon, and then wire bonded. Fig. 2 shows a main current terminal and a signal electrode terminal. FIG. 3 is a front view of the case with inserts or outserts, and FIG. 3 is an inside view of the case as seen from the back side. FIG. 4 is a cross-sectional view of the case shown in FIG. 2 taken along the line A-A', and FIG. 5 is a cross-sectional view taken along the line B-B'.
FIG. 6 is a side view. FIG. 7 is a perspective view showing the internal structure of a conventional module, and FIG. 8 is a perspective view showing the final external shape of the conventional module. In the figure, (1) is a semiconductor chip, (2) is a molybdenum plate, (3) is a speed-up diode chip, (4)
is a copper block, (5) is a flywheel diode chip, (6) is a metal base plate, (7), (7A) is an insulated substrate, (8), (9), and (10) are main current electrode terminals, ( 11
), (12) is a signal terminal, (13) is an epoxy board with glass cloth, (14) is an aluminum wire, (15) is a resin case, (16) is a silicone gel, (17) is an epoxy resin, (18) is the lid, (19) is the nut, (20) is the nameplate, (21) is the external signal terminal, (22) is the beam wire,
(23) is a screw, and (24) is an adhesive. In addition, the same reference numerals in the figures indicate the same or equivalent parts.
Patent Attorney Oiwa Masuo Q) olC) Volcanic Figure 23: Electrode! 53 screw (closing screw)
Claims (1)
その上に複数の電極板および半導体チップを搭載し、上
記電極板に接続される主電流用電極端子および信号用電
極端子を備え、樹脂ケースを上記金属ベース板に接着し
て樹脂封止を行う半導体装置において、前記樹脂ケース
にはあらかじめ主電流用電極端子および信号用電極端子
をインサート成形しておき、この樹脂ケースを金属ベー
ス板に接着する際にその複数の電極端子を前記絶縁基板
上の複数の電極板にクリーム半田で半田付けして電極端
子ネジ閉めタイプの蓋を用いないことを特徴とする半導
体装置。(1) Providing an insulating layer or an insulating substrate on a metal base plate,
A plurality of electrode plates and semiconductor chips are mounted thereon, main current electrode terminals and signal electrode terminals are connected to the electrode plates, and a resin case is bonded to the metal base plate for resin sealing. In the semiconductor device, main current electrode terminals and signal electrode terminals are insert-molded in advance in the resin case, and when the resin case is bonded to the metal base plate, the plurality of electrode terminals are inserted onto the insulating substrate. A semiconductor device characterized in that a plurality of electrode plates are soldered with cream solder and an electrode terminal screw-closing type lid is not used.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63309239A JPH0732229B2 (en) | 1988-12-06 | 1988-12-06 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63309239A JPH0732229B2 (en) | 1988-12-06 | 1988-12-06 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02154457A true JPH02154457A (en) | 1990-06-13 |
| JPH0732229B2 JPH0732229B2 (en) | 1995-04-10 |
Family
ID=17990604
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63309239A Expired - Lifetime JPH0732229B2 (en) | 1988-12-06 | 1988-12-06 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0732229B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06165524A (en) * | 1992-11-25 | 1994-06-10 | Hitachi Ltd | Inverter apparatus |
| DE10200372A1 (en) * | 2002-01-08 | 2003-07-24 | Siemens Ag | Power semiconductor module has one contact surface of semiconductor element contacting metallized structure via solder material and second contact surface contacting metallized structure via bonding wire |
| WO2014030254A1 (en) * | 2012-08-24 | 2014-02-27 | 三菱電機株式会社 | Semiconductor device |
-
1988
- 1988-12-06 JP JP63309239A patent/JPH0732229B2/en not_active Expired - Lifetime
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06165524A (en) * | 1992-11-25 | 1994-06-10 | Hitachi Ltd | Inverter apparatus |
| DE10200372A1 (en) * | 2002-01-08 | 2003-07-24 | Siemens Ag | Power semiconductor module has one contact surface of semiconductor element contacting metallized structure via solder material and second contact surface contacting metallized structure via bonding wire |
| WO2014030254A1 (en) * | 2012-08-24 | 2014-02-27 | 三菱電機株式会社 | Semiconductor device |
| KR20150036347A (en) * | 2012-08-24 | 2015-04-07 | 미쓰비시덴키 가부시키가이샤 | Semiconductor device |
| JP5854147B2 (en) * | 2012-08-24 | 2016-02-09 | 三菱電機株式会社 | Semiconductor device |
| US9622368B2 (en) | 2012-08-24 | 2017-04-11 | Mitsubishi Electric Corporation | Semiconductor device |
| CN104584213B (en) * | 2012-08-24 | 2018-02-13 | 三菱电机株式会社 | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0732229B2 (en) | 1995-04-10 |
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