JPH02143824U - - Google Patents
Info
- Publication number
- JPH02143824U JPH02143824U JP5153989U JP5153989U JPH02143824U JP H02143824 U JPH02143824 U JP H02143824U JP 5153989 U JP5153989 U JP 5153989U JP 5153989 U JP5153989 U JP 5153989U JP H02143824 U JPH02143824 U JP H02143824U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- amplifier
- switch
- input signal
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 claims 4
- 238000003199 nucleic acid amplification method Methods 0.000 claims 4
- 238000006243 chemical reaction Methods 0.000 claims 2
- 238000000034 method Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 4
Description
第1図は本考案に係る保護回路の一実施例を示
す回路図、第2図はその各部信号波形を示す波形
図、第3図は従来の交流増幅器による保護回路の
回路図、第4図はその各部信号波形を示す波形図
である。
11:増幅器、12〜14:スイツチ、15:
外部出力端子、16:割算器、17:演算増幅器
、18:ウインドコンパレータ。
Fig. 1 is a circuit diagram showing an embodiment of the protection circuit according to the present invention, Fig. 2 is a waveform diagram showing signal waveforms of each part thereof, Fig. 3 is a circuit diagram of a protection circuit using a conventional AC amplifier, and Fig. 4 is a waveform diagram showing the signal waveforms of each part thereof. 11: Amplifier, 12-14: Switch, 15:
External output terminal, 16: divider, 17: operational amplifier, 18: window comparator.
Claims (1)
、この増幅器と外部出力端子との間に設けられる
スイツチと、前記増幅器の出力をその増幅度に応
じて処理して元の入力信号に変換する信号変換手
段と、この信号変換手段の出力信号と前記入力信
号との差を算出する減算器と、この減算器から送
られる被比較信号と予め定められた上下の基準値
とを比較し、この被比較信号が上下の基準値から
外れると前記スイツチを開放する比較器とを具備
することを特徴とする保護回路。 2 入力信号を所定の増幅度で増幅する増幅器と
、この増幅器へ電源を供給する電源ラインに設け
られるスイツチと、前記増幅器の出力をその増幅
度に応じて処理して元の入力信号に変換する信号
変換手段と、この信号変換手段の出力信号と前記
入力信号との差を算出する減算器と、この減算器
から送られる被比較信号と予め定められた上下の
基準値とを比較し、この被比較信号が上下の基準
値から外れると前記スイツチを開放する比較器と
を具備することを特徴とする保護回路。[Claims for Utility Model Registration] 1. An amplifier that amplifies an input signal with a predetermined amplification degree, a switch provided between this amplifier and an external output terminal, and a switch that processes the output of the amplifier according to the amplification degree. a signal conversion means for converting the output signal into the original input signal, a subtracter for calculating the difference between the output signal of the signal conversion means and the input signal, and a signal to be compared sent from the subtractor and a predetermined upper and lower 1. A protection circuit comprising: a comparator that compares the signal with a reference value and opens the switch when the compared signal deviates from the upper and lower reference values. 2. An amplifier that amplifies an input signal with a predetermined amplification degree, a switch provided on a power supply line that supplies power to this amplifier, and a switch that processes the output of the amplifier according to the amplification degree and converts it into the original input signal. A signal converting means, a subtracter for calculating the difference between the output signal of the signal converting means and the input signal, and comparing the compared signal sent from the subtracter with predetermined upper and lower reference values. A protection circuit comprising: a comparator that opens the switch when the compared signal deviates from upper and lower reference values.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5153989U JPH02143824U (en) | 1989-04-28 | 1989-04-28 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5153989U JPH02143824U (en) | 1989-04-28 | 1989-04-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02143824U true JPH02143824U (en) | 1990-12-06 |
Family
ID=31571066
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5153989U Pending JPH02143824U (en) | 1989-04-28 | 1989-04-28 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02143824U (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50147259A (en) * | 1974-05-15 | 1975-11-26 | ||
JPS517800U (en) * | 1974-07-03 | 1976-01-20 | ||
JPS5461403A (en) * | 1977-10-25 | 1979-05-17 | Matsushita Electric Ind Co Ltd | Power supply control circuit for booster |
JPS58174312A (en) * | 1982-03-26 | 1983-10-13 | ミネソタ・マイニング・アンド・マニユフアクチユアリング・コンパニ− | Continuously releasing oral medicine dispensing device |
-
1989
- 1989-04-28 JP JP5153989U patent/JPH02143824U/ja active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50147259A (en) * | 1974-05-15 | 1975-11-26 | ||
JPS517800U (en) * | 1974-07-03 | 1976-01-20 | ||
JPS5461403A (en) * | 1977-10-25 | 1979-05-17 | Matsushita Electric Ind Co Ltd | Power supply control circuit for booster |
JPS58174312A (en) * | 1982-03-26 | 1983-10-13 | ミネソタ・マイニング・アンド・マニユフアクチユアリング・コンパニ− | Continuously releasing oral medicine dispensing device |