JPH02141834A - Trouble recovery system for processor - Google Patents

Trouble recovery system for processor

Info

Publication number
JPH02141834A
JPH02141834A JP63294537A JP29453788A JPH02141834A JP H02141834 A JPH02141834 A JP H02141834A JP 63294537 A JP63294537 A JP 63294537A JP 29453788 A JP29453788 A JP 29453788A JP H02141834 A JPH02141834 A JP H02141834A
Authority
JP
Japan
Prior art keywords
processor
trouble
service processor
recovery
failure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63294537A
Other languages
Japanese (ja)
Inventor
Yasushi Sakamoto
靖 坂本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP63294537A priority Critical patent/JPH02141834A/en
Publication of JPH02141834A publication Critical patent/JPH02141834A/en
Pending legal-status Critical Current

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  • Retry When Errors Occur (AREA)

Abstract

PURPOSE:To quickly perform the trouble recovery without intervention of a maintenance man by automatically performing IMPL again before reporting the occurrence of trouble from a service processor to a display device, and recovering the trouble without affecting in the operation of the other processor. CONSTITUTION:A service processor 1 is provided with a mechanism 2 which analyzes trouble of disk control processors 10 and 11 and disk devices 12 and 13. When trouble occurs in the service processor 1, a watchdog timer 4 expires because a clear signal 5 cannot be sent to this timer, and a time-out signal 6 is sent to a trouble recovery mechanism 3. This mechanism 3 automatically loads the program of the service processor 1 again to raise the system (re- IMPL). Then, trouble is automatically recovered without affecting in the other processor. Thus, the trouble recovery is performed without intervention of the maintenance man.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、マルチプロセッサ構成の電子計算機で、サー
ビスプロセッサの障害回復方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a failure recovery method for a service processor in an electronic computer having a multiprocessor configuration.

〔従来の技術〕[Conventional technology]

従来の装置は、特開昭63−59637号公報に記載の
ように1つのプロセッサの障害をウォッチドッグタイマ
により監視し、プロセッサに障害発生し、ウォッチドッ
グタイマに一定時間リセットがかからないとタイマーカ
ウンタがオーバーフローし、その時までのリセット回数
を表示装置に表示するとあり、プロセッサの構成もシン
グルプロセッサ方式となっていた。
As described in Japanese Patent Application Laid-Open No. 63-59637, conventional devices monitor failures in one processor using a watchdog timer, and if a processor failure occurs and the watchdog timer is not reset for a certain period of time, the timer counter is reset. If an overflow occurred, the number of resets up to that point would be displayed on the display, and the processor configuration was also a single processor system.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記従来技術は、障害を回復する点について配慮がされ
ておらず、障害検出後、障害要因に応じてオペレーター
が障害回復しなければならず、回復する為の操作が必要
という問題があった。
The above-mentioned conventional technology does not take into account recovery from a fault, and after a fault is detected, the operator has to perform fault recovery depending on the cause of the fault, and there is a problem in that an operation for recovery is required.

本発明は、障害検出後、自動的に障害回復し、他のプロ
セッサに影響を与えずに障害回復する機能を提供するこ
とを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a function to automatically perform fault recovery after a fault is detected, and to perform fault recovery without affecting other processors.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的を達成するために、障害検出したサービスプロ
セッサが表示装置に障害発生を報告する前に自動的に再
IMPL (プログラムの再ロードによるシステム立上
げ)を行ない、他プロセツサの動作に影響を与えること
なく、サービスプロセッサの障害を回復するようにした
ものである。
In order to achieve the above purpose, the service processor that detects a fault automatically performs a re-IMPL (system startup by reloading the program) before reporting the fault to the display device, thereby affecting the operation of other processors. The system is designed to recover from a service processor failure without any trouble.

〔作用〕[Effect]

サービスプロセッサに障害発生すると、サービスプロセ
ッサの障害回復機構が自動的にサービスプロセッサの再
IMPL (プログラムの再ロードによるシステム立上
げ)を行なう、それによって障害回復をサービスプロセ
ッサだけで行なうので、他プロセツサの動作に影響を与
えることがなく。
When a failure occurs in the service processor, the service processor's failure recovery mechanism automatically re-IMPLs the service processor (starts up the system by reloading the program).As a result, failure recovery is performed only by the service processor, and other processors are without affecting operation.

誤動作することがない。No malfunctions.

〔実施例〕〔Example〕

以下5本発明の一実施例を第1図により説明する。 An embodiment of the present invention will be described below with reference to FIG.

サービスプロセッサ1は、ディスク制御プロセッサ10
.11とディスク装置12.13の障害を解析する機構
2を持つ、ディスク制御プロセッサ10.11は、中央
処理装置14からの制御信号19.20を受け、ディス
ク装置12.13に対してリード/ライト信号17,1
8を介しデータ転送を行ない、制御信号18.19を介
して中央処理装置14にデータを転送する。サービスプ
ロセッサ1は、制御信号15.22をディスク制御プロ
セッサ10.11に送りディスクの障害情報16.21
を受取りディスク障害解析機構2で障害要因を解析する
。表示装置8は、サービスプロセッサ1に制御信号18
を送り、障害情報17を得て、これを表示する。ウォッ
チドッグタイマ4は、サービスプロセッサ1の障害監視
するタイマで、一定期間クリア信号5を受けないと、タ
イムアウト信号6を発生する。サービスプロセッサ1が
正常に動作している間は、一定間隔で障害回復機構3が
ウォッチドッグタイマ4ヘクリア信号を送るのでタイム
アウト信号6は発生しない。
The service processor 1 is a disk control processor 10
.. The disk control processor 10.11, which has a mechanism 2 for analyzing failures in the disk device 12.11 and the disk device 12.13, receives a control signal 19.20 from the central processing unit 14 and performs read/write operations on the disk device 12.13. signal 17,1
8 and to the central processing unit 14 via control signals 18 and 19. The service processor 1 sends a control signal 15.22 to the disk control processor 10.11 to provide disk failure information 16.21.
The disk failure analysis mechanism 2 receives the data and analyzes the cause of the failure. The display device 8 sends a control signal 18 to the service processor 1.
is sent, the fault information 17 is obtained, and this is displayed. The watchdog timer 4 is a timer that monitors failures in the service processor 1, and generates a timeout signal 6 if it does not receive a clear signal 5 for a certain period of time. While the service processor 1 is operating normally, the failure recovery mechanism 3 sends a clear signal to the watchdog timer 4 at regular intervals, so the timeout signal 6 is not generated.

サービスプロセッサ1で障害が発生するとウォッチドッ
グタイマ4ヘクリア信号5を送れなくなるのでウォッチ
ドッグタイマはタイムアウトになり、タイムアウト信号
6を障害回復機構3に送る。
When a failure occurs in the service processor 1, the clear signal 5 cannot be sent to the watchdog timer 4, so the watchdog timer times out and sends a timeout signal 6 to the failure recovery mechanism 3.

障害回復機構3は、自動的にサービスプロセッサ1の再
IMPLかける。IMPL (イニシャルマイクロプロ
グラムロード)が、かかると外部記憶装置24からサー
ビスプロセッサ1のプログラムをメモリ7にロードする
。プログラムがサービスプロセッサ1にリセット信号9
をオンにすると障害が解除される。
The failure recovery mechanism 3 automatically re-IMPLs the service processor 1. IMPL (initial microprogram load) loads the program of the service processor 1 from the external storage device 24 into the memory 7. Program sends reset signal 9 to service processor 1
Turning on will clear the fault.

障害要因が解除されなければ、IMPLを複数回かけて
障害回復する。サービスプロセッサ1がIMPLによる
障害回復中でも、中央処理装置14は、ディスク制御プ
ロセッサ10.11と制御信号19.20をやりとりで
き、かつディスク制御プロセッサ10.11は、ディス
ク装置13゜14に対しリード/ライト信号17.18
をやりとりできる。障害回復中、ディスク制御プロセッ
サ10.11のディスク入出力動作には、影響を与えな
い。
If the cause of the failure is not resolved, IMPL is applied multiple times to recover from the failure. Even while the service processor 1 is recovering from a failure using IMPL, the central processing unit 14 can exchange control signals 19.20 with the disk control processor 10.11, and the disk control processor 10.11 can read/write the disk devices 13 and 14. Light signal 17.18
can be exchanged. During failure recovery, the disk I/O operations of the disk control processor 10.11 are not affected.

本実施例によれば、サービスプロセッサの障害を自動的
に回復するので、保守員を介在せずにすみやかに障害回
復できる効果がある。
According to this embodiment, since a fault in the service processor is automatically recovered, there is an advantage that the fault can be recovered quickly without the intervention of maintenance personnel.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、プロセッサの障害発生時、他プロセツ
サに影響を与えることなく、自動的に回復できるので、
障害回復を保守員の介在なしで行なうことができる。
According to the present invention, when a processor failure occurs, it can be automatically recovered without affecting other processors.
Failure recovery can be performed without the intervention of maintenance personnel.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のブロック図である。 1・・・サービスプロセッサ。 2・・・ディスク障害解析機構。 3・・・障害回復機構。 4・・・ウォッチドッグタイマ。 8・・・表示装置。 FIG. 1 is a block diagram of one embodiment of the present invention. 1... Service processor. 2...Disk failure analysis mechanism. 3...Failure recovery mechanism. 4...Watchdog timer. 8...Display device.

Claims (1)

【特許請求の範囲】[Claims] 1、複数のプロセッサとサービスプロセッサと表示装置
から成る電子計算機において、サービスプロセッサの障
害を検出後、サービスプロセッサのみ再IMPL(プロ
グラムの再ロードによるシステム立上げ)し、他のプロ
セッサの動作に影響を与えないで障害回復する機構を設
けたことを特徴とするプロセッサの障害回復方式。
1. In an electronic computer consisting of multiple processors, a service processor, and a display device, after detecting a fault in the service processor, re-IMPL (system startup by reloading the program) only the service processor, without affecting the operation of other processors. A failure recovery method for a processor, characterized by providing a mechanism for recovering from a failure without causing any damage to the processor.
JP63294537A 1988-11-24 1988-11-24 Trouble recovery system for processor Pending JPH02141834A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63294537A JPH02141834A (en) 1988-11-24 1988-11-24 Trouble recovery system for processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63294537A JPH02141834A (en) 1988-11-24 1988-11-24 Trouble recovery system for processor

Publications (1)

Publication Number Publication Date
JPH02141834A true JPH02141834A (en) 1990-05-31

Family

ID=17809066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63294537A Pending JPH02141834A (en) 1988-11-24 1988-11-24 Trouble recovery system for processor

Country Status (1)

Country Link
JP (1) JPH02141834A (en)

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