JPH02137294A - Manufacture of multilayer printed circuit board - Google Patents

Manufacture of multilayer printed circuit board

Info

Publication number
JPH02137294A
JPH02137294A JP29133988A JP29133988A JPH02137294A JP H02137294 A JPH02137294 A JP H02137294A JP 29133988 A JP29133988 A JP 29133988A JP 29133988 A JP29133988 A JP 29133988A JP H02137294 A JPH02137294 A JP H02137294A
Authority
JP
Japan
Prior art keywords
hole
holes
conductors
layer
inner walls
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29133988A
Other languages
Japanese (ja)
Inventor
Tokio Ebara
江原 勅夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP29133988A priority Critical patent/JPH02137294A/en
Publication of JPH02137294A publication Critical patent/JPH02137294A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0286Programmable, customizable or modifiable circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers

Abstract

PURPOSE:To easily connect and disconnect pin-like conductors with and from conductor layers by inserting and removing the pin-like conductors into and from through holes so as to miniaturize a printed circuit board by forming separated conductor layers on inner walls of the through holes in led-out states. CONSTITUTION:Inner walls 7 of primary through holes are formed by drilling a multilayer circuit board 1 constituted of externally mounted conductors 5, in layer conductors 6, and an insulating base material 2. Then, after performing an activating process on the inner walls 7, primary plated layers 9 are formed on the inner walls 7 by electroless plating, etc. After forming the layers 9, inner walls 8 of secondary through holes are formed by forming prescribed holes in the circuit board 1. Then secondary plated layers 10 are obtained by performing electroplating to the base plate 1. When the electroplating is performed, conductors are precipitated by plating only on the surfaces of the in-layer and outer-layer conductors 6 and 5 exposed on the inner walls 8 of the secondary through holes and the conductors separated from each other rise from the surface of the insulating base material 2 on the inner walls 8. Then unnecessary conductors are removed by etching. Thus a prescribed printed circuit board is obtained. Therefore, the secondary through holes can be connected with and disconnected from through holes 3 through the in-layer conductors 6.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は多層印刷配線板の製造方法に関し、特に貫通孔
の内壁上に互いに分離した導体層を有する多層印刷配線
板の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a multilayer printed wiring board, and more particularly to a method for manufacturing a multilayer printed wiring board having conductor layers separated from each other on the inner wall of a through hole.

〔従来の技術〕[Conventional technology]

従来、印刷配線板の貫通孔の内壁の導体層は、めっき等
により孔内壁面全体に一様に形成するのが一般的である
。たとえば、基板に貫通孔を形成し孔内壁面の活性化処
理む施こし、無電解めっきによりごく薄い導体層を形成
した後、電解めっきにより所定の厚さの導体層を形成し
ていた。
Conventionally, a conductor layer on the inner wall of a through hole in a printed wiring board is generally formed uniformly over the entire inner wall surface of the hole by plating or the like. For example, a through hole is formed in a substrate, the inner wall surface of the hole is activated, a very thin conductor layer is formed by electroless plating, and then a conductor layer of a predetermined thickness is formed by electrolytic plating.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の多層印刷配線板は、貫通孔の内壁面全体
に一様に導体層が形成されている為、分離されたパター
ン間を接続する方法としては、第4図に示す如く絶縁基
材2上にパターン4を形成して成る多層化基板1におい
て、互いに分離したパターン4の末端にスルーホール3
を設け、このスルーホール3に接続導線13を挿入し、
はんだ付14をして、分離したパターン間の電気的接続
を得る方法をとっており、このように、多層化基板1の
パターン4が後で、パターン4間の接続が必要となる場
合には、あらかじめ、スルーホール3のような貫通孔を
2穴以上設けておく必要があるので、印刷配線板が大型
化し、さらにはコストアップにつながるという欠点があ
る。
In the conventional multilayer printed wiring board described above, a conductor layer is uniformly formed on the entire inner wall surface of the through hole, so the method of connecting separated patterns is to use an insulating base material as shown in Fig. 4. In a multilayer substrate 1 formed by forming patterns 4 on 2, through holes 3 are formed at the ends of the patterns 4 separated from each other.
, insert the connecting conductor 13 into this through hole 3,
A method is used to obtain electrical connection between the separated patterns by soldering 14, and in this way, when the patterns 4 of the multilayer board 1 need to be connected later, Since it is necessary to provide two or more through-holes such as the through-holes 3 in advance, the printed wiring board becomes larger and furthermore, the cost increases.

本発明の目的は、小型化が可能で、安価な多層印刷配線
板の製造方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a multilayer printed wiring board that can be miniaturized and is inexpensive.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の多層印刷配線板の製造方法は、(イ)多層化基
板の所定の位置に一次貫通孔を設け、該−成員通孔内壁
全面に導体層を形成する工程、 (I7)前記多層化基板の所定の位置にさらに二次貫通
孔を設け、該二次貫通孔内壁の露出した導体部分および
前記−成員通孔内壁の前記導体層にめっきにより導体層
を析出形成する工程、とを含んで構成されている。
The method for manufacturing a multilayer printed wiring board of the present invention includes (a) a step of providing a primary through hole at a predetermined position of a multilayer board and forming a conductor layer on the entire inner wall of the member through hole; (I7) forming the multilayer board; further providing a secondary through hole at a predetermined position of the substrate, and depositing a conductor layer on the exposed conductor portion of the inner wall of the secondary through hole and the conductor layer on the inner wall of the member through hole by plating. It is made up of.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図(a)〜(e)は本発明の第1の実施例の製造方
法を説明する工程順に示した縦断面図である。
FIGS. 1(a) to 1(e) are longitudinal cross-sectional views showing the order of steps for explaining the manufacturing method of the first embodiment of the present invention.

第1の実施例は、第1図(a)に示すように、まず、外
装導体5.内層導体6および絶縁基材2で構成する多層
化基板1に孔あけして、−成員通孔内壁7を形成する。
In the first embodiment, as shown in FIG. 1(a), first, an exterior conductor 5. A hole is formed in the multilayer substrate 1 composed of the inner layer conductor 6 and the insulating base material 2 to form the inner wall 7 of the -member through hole.

次に、第1図(b)に示すように、−成員通孔内壁7の
活性化処理を行ない、無電解めっき、あるいは、無電解
めっきプラス電解めっきを施こして、一次めっき層9を
得る。
Next, as shown in FIG. 1(b), the inner wall 7 of the member through hole is activated, and electroless plating or electroless plating plus electrolytic plating is performed to obtain a primary plating layer 9. .

次に、第1図(C)に示すように、所定の貫通孔を孔あ
けして、二次貫通孔内壁8を形成する。
Next, as shown in FIG. 1(C), a predetermined through hole is bored to form the inner wall 8 of the secondary through hole.

次に、第1図(d)に示すように、二次貫通孔内壁8の
活性化処理は施こさずに、多層化基板1に電解めっきを
施し、二次めっき層10を得る。
Next, as shown in FIG. 1(d), electrolytic plating is applied to the multilayer substrate 1 without performing activation treatment on the inner walls 8 of the secondary through holes to obtain a secondary plating layer 10.

このとき、二次貫通孔内壁8に露出している内層導体6
および外層導体5の導体表面上にのみ、めっきにより導
体が析出し、互いに分離した導体が二次貫通孔内壁8の
絶縁基材2面よりも盛り上がって形成される。二次貫通
孔内壁8の絶縁基材2上には活性化処理が施されていな
いためめっき層は形成されない。
At this time, the inner layer conductor 6 exposed on the inner wall 8 of the secondary through hole
A conductor is deposited by plating only on the conductor surface of the outer layer conductor 5, and the conductors separated from each other are formed so as to bulge out from the surface of the insulating base material 2 of the inner wall 8 of the secondary through hole. No plating layer is formed on the insulating base material 2 of the inner wall 8 of the secondary through hole because the activation treatment is not performed.

次に、第1図(e)に示すように、エツチングにより不
要な導体を除去し所定の印刷配線板を得る。
Next, as shown in FIG. 1(e), unnecessary conductors are removed by etching to obtain a predetermined printed wiring board.

第2図は第1図(e)の平面図である。FIG. 2 is a plan view of FIG. 1(e).

印刷配線板にはランドロを有するスルーホール3が設け
られている。内層導体6は、破線で表わしたように、二
次貫通孔とスルーホール3は内層導体6を介して接続と
分離が可能となる。
A through hole 3 having a land hole is provided in the printed wiring board. The inner layer conductor 6 allows the secondary through hole and the through hole 3 to be connected and separated via the inner layer conductor 6, as indicated by the broken line.

第3図(a)〜(c)はそれぞれ本発明の第2の実施例
の平面図、二層面の内層導体の平断面図及び三層面の内
層導体の平断面図である。
FIGS. 3(a) to 3(c) are a plan view, a plan sectional view of a two-layer inner layer conductor, and a plane sectional view of a three-layer inner layer conductor, respectively, of the second embodiment of the present invention.

第2の実施例は、第3図(a)に示すように、印刷配線
板には、第1の実施例と同様−成員通孔内壁に一次めっ
き層を形成したスルーホール3が形成されており、二次
貫通孔12に対しては、周囲の一次貫通孔のランドロよ
り内層導体6を介して3方向から接続できるようになっ
ている。
In the second embodiment, as shown in FIG. 3(a), the printed wiring board has a through hole 3 formed with a primary plating layer on the inner wall of the member through hole, similar to the first embodiment. The secondary through hole 12 can be connected from three directions via the inner layer conductor 6 from the surrounding primary through holes.

第3図(b)に示すように、二層面の内層導体6に接続
する二次貫通孔内壁8に露出した二次めっき層は2分割
されている。
As shown in FIG. 3(b), the secondary plating layer exposed on the inner wall 8 of the secondary through hole connected to the inner layer conductor 6 on the two-layer surface is divided into two parts.

第3図(c)に示すように、三層面では二次貫通孔内壁
8の二次めっき層10は二次貫通孔内壁8全周を被覆し
、内層導体6を介して一次貫通孔内のスルーホールに接
続している。
As shown in FIG. 3(c), on the three-layer surface, the secondary plating layer 10 on the inner wall 8 of the secondary through-hole covers the entire circumference of the inner wall 8 of the secondary through-hole, and the inner layer 10 of the inner wall 8 of the secondary through-hole covers the entire circumference of the inner wall 8 of the secondary through-hole. Connected to through hole.

第2の実施例では、二層面の二次貫通孔内壁8の二次め
っき層10を二分割することにより、3つのパターンの
接続と分離が可能となる。
In the second embodiment, by dividing the secondary plating layer 10 of the inner wall 8 of the secondary through hole on the two-layer surface into two parts, it becomes possible to connect and separate three patterns.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、印刷配線板の貫通孔内壁
に互いに分離された導体層を導出形成することにより、
貫通孔に接続用のピン状の導体を圧入することにより簡
単に接続でき、また、抜きとることにより分離でき、か
つ、貫通孔を減らすことができるので、印刷配線板を小
型化できる効果がある。
As explained above, the present invention provides conductor layers that are separated from each other and are formed on the inner wall of a through hole of a printed wiring board.
It can be easily connected by press-fitting a connecting pin-shaped conductor into the through-hole, and it can be separated by pulling it out, and the number of through-holes can be reduced, which has the effect of downsizing printed wiring boards. .

また、2つ以上の分離したパターンも1つの貫通孔で同
時に接続できる効果がある。
Further, there is an effect that two or more separate patterns can be connected simultaneously with one through hole.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(e)は本発明の第1の実施例の製造方
法を説明する工程順に示した縦断面図、第2図は第1図
(e)の平面図、第3図(a)〜(C)はそれぞれ本発
明の第2の実施例の平面図、2層面の内層導体の平断面
図、及び3層面の内層導体の平断面図、第4図は従来の
印刷配線板の一例の一部切欠き斜視図である。 1・・・多層化基板、2・・・絶縁基材、3・・・スル
ーホール、4・・・パターン、5・・・外層導体、6・
・・内層導体、7・・・−成員通孔内壁、8・・・二次
貫通孔内壁、9・・一次めっき層、10・・・二次めっ
き層、ロ・・・ランド、12・・・二次貫通孔、13・
・・接続導線、14・・・はんだ付。
1(a) to 1(e) are vertical sectional views showing the manufacturing method of the first embodiment of the present invention in the order of steps, FIG. 2 is a plan view of FIG. 1(e), and FIG. (a) to (C) are respectively a plan view of the second embodiment of the present invention, a plan cross-sectional view of the inner layer conductor on the two-layer surface, and a plan cross-sectional view of the inner layer conductor on the three-layer surface, and FIG. 4 is the conventional printed wiring. It is a partially notched perspective view of an example of a board. DESCRIPTION OF SYMBOLS 1... Multilayer board, 2... Insulating base material, 3... Through hole, 4... Pattern, 5... Outer layer conductor, 6...
...Inner layer conductor, 7...Inner wall of member through hole, 8...Inner wall of secondary through hole, 9...Primary plating layer, 10...Secondary plating layer, Ro...Land, 12...・Secondary through hole, 13・
...Connection conductor, 14...Soldered.

Claims (1)

【特許請求の範囲】  次の工程を有することを特徴とする多層印刷配線板の
製造方法、 (イ)多層化基板の所定の位置に一次貫通孔を設け、該
一次貫通孔内壁全面に導体層を形成する工程、 (ロ)前記多層化基板の所定の位置にさらに二次貫通孔
を設け、該二次貫通孔内壁の露出した導体部分および前
記一次貫通孔内壁の前記導体層にめっきにより導体層を
析出形成する工程。
[Scope of Claims] A method for manufacturing a multilayer printed wiring board, characterized by having the following steps: (a) providing a primary through hole at a predetermined position of a multilayer board; and forming a conductor layer on the entire inner wall of the primary through hole. (b) Further providing a secondary through hole at a predetermined position of the multilayer substrate, and plating a conductor on the exposed conductor portion of the inner wall of the secondary through hole and the conductor layer on the inner wall of the primary through hole. The process of depositing a layer.
JP29133988A 1988-11-17 1988-11-17 Manufacture of multilayer printed circuit board Pending JPH02137294A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29133988A JPH02137294A (en) 1988-11-17 1988-11-17 Manufacture of multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29133988A JPH02137294A (en) 1988-11-17 1988-11-17 Manufacture of multilayer printed circuit board

Publications (1)

Publication Number Publication Date
JPH02137294A true JPH02137294A (en) 1990-05-25

Family

ID=17767641

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29133988A Pending JPH02137294A (en) 1988-11-17 1988-11-17 Manufacture of multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPH02137294A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015088595A (en) * 2013-10-30 2015-05-07 オムロンオートモーティブエレクトロニクス株式会社 Multilayer printed board and magnetic device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015088595A (en) * 2013-10-30 2015-05-07 オムロンオートモーティブエレクトロニクス株式会社 Multilayer printed board and magnetic device

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