JP2005286122A - Printed wiring board and its manufacturing method - Google Patents

Printed wiring board and its manufacturing method Download PDF

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Publication number
JP2005286122A
JP2005286122A JP2004098310A JP2004098310A JP2005286122A JP 2005286122 A JP2005286122 A JP 2005286122A JP 2004098310 A JP2004098310 A JP 2004098310A JP 2004098310 A JP2004098310 A JP 2004098310A JP 2005286122 A JP2005286122 A JP 2005286122A
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hole
plating
printed wiring
wiring board
copper foil
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Eiji Imamura
英治 今村
Tei Sugiyama
禎 杉山
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Daisho Denshi Co Ltd
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Daisho Denshi Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a printed wiring board which reconciles both a thin-line and high-density conductor pattern and connection reliability, and to provide its manufacturing method. <P>SOLUTION: Thin steps 21 are formed at peripheral edges of through holes of conductor patterns 2 formed on both top and reverse surfaces 1A and 1B of an insulating substrate. On the thin steps 21, surface-directional plating parts 42 are laminated on the thin steps 21 to protrude from both ends of penetration-directional plating parts 41 deposited on the inner wall of the through hole 3 along the insulating substrate 1. Consequently, the conductor patterns 2 and the plated through holes 3 are interconnected having contact surfaces extending along the conductor patterns 2 and in a direction crossing it. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、絶縁基板の表裏両面に形成された導体パターンを適所で層間接続させたプリント配線板とその製造方法に関する。   The present invention relates to a printed wiring board in which conductor patterns formed on both front and back surfaces of an insulating substrate are interlayer-connected at appropriate positions, and a method for manufacturing the same.

プリント配線板は、生産性の向上、量産品質の確保、信頼性の向上等を目的として、テレビ等の量産機器からロケット等の高い信頼性を要求される機器まで、あらゆる電子機器に使用されている。近年、電子機器の小型化が進み、それに伴いプリント配線板の高精度化及び高密度化が要求されている。
この種のプリント配線板としては、絶縁基板の表裏両面に形成された導体パターンをめっきスルーホールを介して適所で電気的に接続させた構成のものが一般的である。
Printed wiring boards are used in all types of electronic equipment, from mass production equipment such as televisions to equipment that requires high reliability such as rockets, for the purpose of improving productivity, ensuring mass production quality, and improving reliability. Yes. In recent years, electronic devices have been miniaturized, and accordingly, there has been a demand for higher precision and higher density of printed wiring boards.
This type of printed wiring board generally has a configuration in which conductor patterns formed on both front and back surfaces of an insulating substrate are electrically connected at appropriate positions via plated through holes.

プリント配線板の用途によっては、めっきスルーホールを穴埋めしておいた方が好ましい場合がある。穴埋め法としては、絶縁基板上の銅箔に重ねてスルーホールごとめっきを施して穴埋めする、いわゆるフィルドめっき法(例えば、特許文献1参照)や、銅箔に重ねて一次めっきを施した後、スルーホールを導電ペースト等で穴埋めし、この導電ペースト体の両端を研磨して一次めっき層と面一にした後、これら一次めっき層と導電ペースト体の上に重ねてめっきを施す、いわゆる蓋めっき法(例えば、特許文献2参照)等が知られている。
特開2003−046248号公報 特開2003−069228号公報
Depending on the use of the printed wiring board, it may be preferable to fill the plated through hole. As the hole filling method, the copper foil on the insulating substrate is overlaid by plating the entire through hole to fill the hole, so-called filled plating method (for example, refer to Patent Document 1), or after the primary plating over the copper foil, So-called lid plating that fills through holes with conductive paste, etc., polishes both ends of this conductive paste body to make it flush with the primary plating layer, and then applies plating on these primary plating layer and conductive paste body The law (see, for example, Patent Document 2) is known.
JP 2003-046248 A JP 2003-069228 A

しかしながら、これらフィルドめっき法と蓋めっき法の場合には、スルーホールを穴埋めして更にその上にめっき層を形成しているので、スルーホールの内壁に施されためっき部と、表裏両面に形成された導体パターン間の接続信頼性を確保することはできるものの、銅箔の上にめっき層が積層されるので、導体パターン形成のための導体層(銅箔とめっき層)の厚みが増大し、パターン形成が困難になるという問題がある。特に、蓋めっき法では、銅箔の上にめっき層が2層も積層されるので、その傾向が顕著となる。   However, in the case of these filled plating methods and lid plating methods, the through hole is filled and a plating layer is further formed on the through hole, so that the plated portion applied to the inner wall of the through hole and both the front and back surfaces are formed. However, since the plating layer is laminated on the copper foil, the thickness of the conductor layer (copper foil and plating layer) for forming the conductor pattern increases. There is a problem that pattern formation becomes difficult. In particular, in the lid plating method, since two plating layers are laminated on the copper foil, the tendency becomes remarkable.

他方、スルーホールを穴埋めしない場合は、導体パターン形成のための導体層を初期銅箔の厚みのまま変化させずにスルーホールの内壁にめっき部を形成できるので、導体パターンの形成が容易になるだけでなく、その細線化及び高密度化が可能である。
しかしながら、絶縁基板上の銅箔、つまり、導体パターンとスルーホールめっきとのコンタクトが銅箔のエッジ部分だけとなるため、導体パターンが細線化及び高密度化すればするほど、つまり、銅箔の厚みが薄肉化すればするほど、接続信頼性の確保が困難になるという問題がある。
On the other hand, when the through hole is not filled, since the plated portion can be formed on the inner wall of the through hole without changing the thickness of the initial copper foil, the conductor pattern for forming the conductor pattern can be easily formed. In addition, it is possible to reduce the line thickness and increase the density.
However, since the copper foil on the insulating substrate, that is, the contact between the conductor pattern and the through-hole plating is only the edge portion of the copper foil, the more the conductor pattern is thinned and densified, that is, the copper foil As the thickness is reduced, there is a problem that it becomes difficult to ensure connection reliability.

本発明は、上記事情に鑑みてなされたものであり、その目的は、導体パターンの細線化及び高密度化と接続信頼性の双方を兼ね備えたプリント配線板と、その製造方法を提供することにある。   The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a printed wiring board having both thin and dense conductor patterns and connection reliability, and a method for manufacturing the same. is there.

上記課題を解決するために、本発明のプリント配線板は、絶縁基板の表裏両面に設けられた導体層のスルーホール周縁に薄肉段差部が形成され、この薄肉段差部には前記スルーホールの内壁に析出させた第1のめっき部の両端から前記絶縁基板に沿って延びる第2のめっき部が積層されていることを特徴とする。
また、本発明のプリント配線板は、絶縁基板の表裏両面に設けられた導体層と、層間接続のためのめっきスルーホールとが、前記導体層の厚み方向及びそれと交差する方向に延びるコンタクト面を有して相互接続されていることを特徴とする。
In order to solve the above problems, a printed wiring board according to the present invention has a thin stepped portion formed on the periphery of a through hole of a conductor layer provided on both front and back surfaces of an insulating substrate, and the inner wall of the through hole is formed on the thin stepped portion. A second plating portion extending along the insulating substrate from both ends of the first plating portion deposited on the substrate is laminated.
Further, the printed wiring board of the present invention has a contact surface in which a conductor layer provided on both front and back surfaces of an insulating substrate and a plated through hole for interlayer connection extend in the thickness direction of the conductor layer and in a direction intersecting therewith. And are interconnected.

本発明のプリント配線板の製造方法は、スルーホールを有する銅張り積層板の表裏両面に、前記スルーホールの開口周縁部を残してめっきレジスト層を形成するマスク工程と、
前記スルーホールの開口周縁部に露出する銅箔をその厚み方向に部分エッチングするエッチング工程と、前記スルーホールの内壁及び前記部分エッチングされた銅箔表面にめっき層を析出させる第1のめっき工程とを備えることを特徴とする。
この場合において、前記第1のめっき工程により形成されためっきスルーホールの内空部を、前記めっきレジスト層下の銅箔を給電部として電気めっきにより穴埋めする第2のめっき工程を備える構成としてもよい。
The method for producing a printed wiring board of the present invention includes a mask process for forming a plating resist layer on the front and back surfaces of a copper-clad laminate having a through hole, leaving an opening peripheral edge of the through hole, and
An etching step of partially etching the copper foil exposed at the opening peripheral edge of the through hole in the thickness direction; and a first plating step of depositing a plating layer on the inner wall of the through hole and the partially etched copper foil surface; It is characterized by providing.
In this case, it is also possible to include a second plating step in which the inner space of the plated through hole formed by the first plating step is filled by electroplating using the copper foil under the plating resist layer as a power feeding portion. Good.

本発明のプリント配線板によれば、絶縁基板の表裏両面に設けられた導体パターンと、層間接続のためのめっきスルーホールとのコンタクト面積を増大させ得るので、導体パターンの微細化及び高密度化に対応すべく導体パターンの厚みを銅張り積層板の銅箔と同じかそれ以下の厚みにしても、接続信頼性を損わずに逆に向上させることができる。   According to the printed wiring board of the present invention, it is possible to increase the contact area between the conductor pattern provided on both the front and back surfaces of the insulating substrate and the plated through hole for interlayer connection. Even if the thickness of the conductor pattern is equal to or less than that of the copper foil of the copper-clad laminate, the connection reliability can be improved without impairing the connection reliability.

本発明のプリント配線板の製造方法によれば、パターン形成時にエッチングされる導体層の厚みが、銅張り積層板に元々積層されていた銅箔の厚みになるから、導体パターンの形成が容易になると共に、その細線化及び高密度化も容易に実現することができる。
また、めっきスルーホールを穴埋めしておくので、表面研磨の際に銅箔が研磨方向に引きずられることがなく、層間接続の信頼性の高いプリント配線板の製造が可能となる。
According to the method for manufacturing a printed wiring board of the present invention, since the thickness of the conductor layer etched during pattern formation becomes the thickness of the copper foil originally laminated on the copper-clad laminate, the formation of the conductor pattern is easy. At the same time, the thinning and high density can be easily realized.
Further, since the plated through hole is filled, the copper foil is not dragged in the polishing direction during surface polishing, and a printed wiring board with high reliability of interlayer connection can be manufactured.

以下、本発明を実施するための最良の形態について、図1〜図9を参照して説明する。
まず、プリント配線板の一実施例について、図8及び図9を参照しながら説明する。
このプリント配線板Pにおいて、絶縁基板1の表裏両面1A,1Bには、例えば銅張り積層板の銅箔(導体層)から切り出された導体パターン(導体層)2が一層設けられている。この導体パターン2のうち、穴埋めされたスルーホール3の開口部周縁に形成された導体パターン2aには、図9に示すように、最外表面2Aから一段凹む薄肉段差部21が形成されている。
The best mode for carrying out the present invention will be described below with reference to FIGS.
First, an example of a printed wiring board will be described with reference to FIGS.
In this printed wiring board P, a conductive pattern (conductor layer) 2 cut out from, for example, a copper foil (conductor layer) of a copper-clad laminate is provided on both the front and back surfaces 1A and 1B of the insulating substrate 1. Of the conductor pattern 2, the conductor pattern 2a formed on the periphery of the opening of the filled through hole 3 is formed with a thin step portion 21 that is recessed by one step from the outermost surface 2A as shown in FIG. .

この薄肉段差部21は、導体パターン2の厚み方向に沿う上部壁面21A及び下部壁面21Cと、これら壁面21A,21Cと直交し絶縁基板1に沿って延びる床面21Bとを備えてなり、この床面21B上には、めっきスルーホール4の面方向めっき部(第2のめっき部)42が導体パターン2の最外表面2Aと面一に積層されている。
つまり、絶縁基板1の表裏両面1A,1Bに設けられた導体パターン2と、層間接続のためのめっきスルーホール4とは、このめっきスルーホール4の開口部周縁(スルーホール周縁)において、導体パターン2の厚み方向と、それに交差する方向に延びるコンタクト面を有して相互接続されている。
The thin step portion 21 includes an upper wall surface 21A and a lower wall surface 21C along the thickness direction of the conductor pattern 2, and a floor surface 21B that extends perpendicularly to the wall surfaces 21A and 21C and extends along the insulating substrate 1. On the surface 21 </ b> B, a surface direction plating portion (second plating portion) 42 of the plated through hole 4 is laminated flush with the outermost surface 2 </ b> A of the conductor pattern 2.
That is, the conductor pattern 2 provided on the front and back surfaces 1A and 1B of the insulating substrate 1 and the plated through hole 4 for interlayer connection are arranged at the periphery of the opening of the plated through hole 4 (through hole periphery). The interconnections have a thickness direction of 2 and a contact surface extending in a direction crossing the thickness direction.

本実施例では、薄肉段差部21の上部壁面21Aとこれに接する面方向めっき部42の外周面42A、及び薄肉段差部21の下部壁面21Bとこれに接する貫通方向めっき部41の軸方向両端部が厚み方向に延びるコンタクト面であり、薄肉段差部21の床面21Bとこれに接する面方向めっき部42の下面42Bが厚み方向と交差する方向(絶縁基板1に沿う方向)に延びるコンタクト面である。   In the present embodiment, the upper wall surface 21A of the thin-walled step portion 21 and the outer peripheral surface 42A of the surface-direction plated portion 42 in contact therewith, and the axially opposite ends of the lower wall surface 21B of the thin-walled step portion 21 and the through-direction plated portion 41 in contact therewith. Is a contact surface extending in the thickness direction, and a contact surface extending in a direction (a direction along the insulating substrate 1) in which the floor surface 21B of the thin-walled step portion 21 and the lower surface 42B of the surface-direction plating portion 42 in contact therewith intersect the thickness direction. is there.

めっきスルーホール4は、スルーホール3の内壁に形成された円筒状の貫通方向めっき部(第1のめっき部)41と、この貫通方向めっき部41の軸方向両端から絶縁基板1に沿って延びる(はみ出す)リング状の面方向めっき部42とから構成されており、貫通方向めっき部41に包囲された内空部は、例えばめっき銅からなる穴埋め部5で穴埋めされている。
この面方向めっき部42の厚みTと面方向の張出寸法Lは、例えば、T=5〜6μm、L=0.1〜0.2mmに設定されている。また、導体パターン2,2aの厚みは、銅張り積層板に予め積層されている銅箔の厚みと同じかそれよりも若干薄く、例えば、12μmかそれ以下に設定されている。
The plated through hole 4 extends along the insulating substrate 1 from a cylindrical through direction plated portion (first plated portion) 41 formed on the inner wall of the through hole 3 and from both axial ends of the through direction plated portion 41. The inner space part surrounded by the through-direction plating part 41 is filled with a hole filling part 5 made of, for example, plated copper.
The thickness T of this surface direction plating part 42 and the overhanging dimension L in the surface direction are set, for example, to T = 5 to 6 μm and L = 0.1 to 0.2 mm. The thickness of the conductor patterns 2 and 2a is set to be equal to or slightly smaller than the thickness of the copper foil previously laminated on the copper-clad laminate, for example, 12 μm or less.

以上説明したように、本実施例のプリント配線板Pによれば、導体パターン2のうち、めっきスルーホール4の開口周縁部における導体パターン2aには薄肉段差部21が形成されており、導体パターン2とめっきスルーホール4とのコンタクトが、この薄肉段差部21の壁面21A,21Cと、これに対応する面方向めっき部42の外周面42A及び貫通方向めっき部41の軸方向両端部だけでなく、絶縁基板1の面方向に延びる薄肉段差部21の床面21Bと、これに対応する面方向めっき部42の下面42Bにおいても確保されるので、導体パターン2が微細化及び高密度化に対しても、層間接続の信頼性が高い。   As described above, according to the printed wiring board P of the present embodiment, the thin step portion 21 is formed in the conductor pattern 2a in the opening peripheral portion of the plated through hole 4 in the conductor pattern 2, and the conductor pattern 2 and the plated through hole 4 are contacted not only on the wall surfaces 21A and 21C of the thin stepped portion 21, the outer peripheral surface 42A of the corresponding surface-direction plated portion 42, and both axial ends of the through-direction plated portion 41. In addition, since it is secured also on the floor surface 21B of the thin stepped portion 21 extending in the surface direction of the insulating substrate 1 and the lower surface 42B of the corresponding surface-direction plated portion 42, the conductor pattern 2 can be reduced in size and density. However, the reliability of interlayer connection is high.

つまり、絶縁基板1の表裏両面1A,1Bに設けられた導体パターン2と、層間接続のためのめっきスルーホール4とが、このめっきスルーホール4の開口部周縁において、導体パターン2の厚み方向に沿うコンタクト面だけでなく、絶縁基板1の面方向に沿うコンタクト面をも有して相互接続されているので、従来に比してコンタクト面積が拡大し、その結果、導体パターン2の微細化及び高密度化に対応すべく導体パターン2の厚みを銅張り積層板の銅箔と同じかそれ以下にしても、接続信頼性を損なうどころか逆に接続信頼性を飛躍的に向上させることができる。   That is, the conductor pattern 2 provided on the front and back surfaces 1A and 1B of the insulating substrate 1 and the plated through hole 4 for interlayer connection are arranged in the thickness direction of the conductive pattern 2 at the periphery of the opening of the plated through hole 4. Since not only the contact surface along the contact surface but also the contact surface along the surface direction of the insulating substrate 1 are interconnected, the contact area is increased as compared with the conventional case. Even if the thickness of the conductor pattern 2 is equal to or less than that of the copper foil of the copper-clad laminate in order to cope with higher density, the connection reliability can be drastically improved on the contrary rather than impairing the connection reliability.

さらに、このプリント配線板Pは、めっきスルーホール4がめっき銅からなる穴埋め部5により穴埋めされているので、めっきスルーホール4においては電気伝導性だけでなく熱伝導性も良い。
従って、プリント配線板Pの多層化要求に対しても、放熱性の良好な多層プリント配線板を構成することができる。
Furthermore, in this printed wiring board P, since the plated through hole 4 is filled with the hole filling portion 5 made of plated copper, the plated through hole 4 has good heat conductivity as well as electrical conductivity.
Therefore, a multilayer printed wiring board with good heat dissipation can be configured even when the printed wiring board P is required to have multiple layers.

次に、このプリント配線板Pの製造方法の一実施例について、図1〜図7を参照しながら説明する。
まず、絶縁基板1の表裏両面に導体パターン2を形成するための銅箔12が貼着されてなる銅張り積層板Qを用意し(図1)、その一方の面から他方の面にかけて、絶縁基板1の表裏両面に形成される導体パターン2を適所で層間接続させるためのスルーホール3を形成する(図2)。
次いで、製面及びデスミアを行い、無電解銅めっきの付着性を向上させるための触媒、例えばパラジウム(Pd)を銅箔12の表面及びスルーホール3の内壁に吸着させる。
Next, an example of a method for manufacturing the printed wiring board P will be described with reference to FIGS.
First, a copper-clad laminate Q having copper foils 12 for forming the conductor pattern 2 on both the front and back surfaces of the insulating substrate 1 is prepared (FIG. 1) and insulated from one surface to the other surface. Through-holes 3 are formed for interlayer connection of conductor patterns 2 formed on both the front and back surfaces of the substrate 1 at appropriate positions (FIG. 2).
Next, surface preparation and desmearing are performed, and a catalyst for improving the adhesion of electroless copper plating, for example, palladium (Pd), is adsorbed on the surface of the copper foil 12 and the inner wall of the through hole 3.

次に、スルーホール3の開口周縁部を残して(外して)、つまり、スルーホール3の開口周縁部においては銅箔12が露出するようにめっきレジスト層13を形成し(図3、マスク工程)、この開口周縁部に露出する銅箔12aをその厚み方向に部分エッチングして、薄肉段差部21を形成する(図4、エッチング工程)。
この部分エッチングにより除去される銅箔12aの厚み、つまり、薄肉段差部21の上部壁面21Aの高さは、例えば銅箔12の初期厚さ12μmに対して5〜6μmに設定される。なお、部分エッチングの際には、エッチング液としてアルカリタイプのものを使用することにより、前工程で吸着させたPd触媒を銅箔12の表面及びスルーホール3の内壁に残存させつつ、銅箔12aのみを選択的にエッチングする。
Next, the plating resist layer 13 is formed so that the copper foil 12 is exposed at the opening peripheral portion of the through hole 3 while leaving (removing) the opening peripheral portion of the through hole 3 (FIG. 3, mask process). ), The copper foil 12a exposed at the peripheral edge of the opening is partially etched in the thickness direction to form the thin stepped portion 21 (FIG. 4, etching step).
The thickness of the copper foil 12a removed by this partial etching, that is, the height of the upper wall surface 21A of the thin stepped portion 21 is set to 5 to 6 μm, for example, with respect to the initial thickness 12 μm of the copper foil 12. In the case of partial etching, an alkaline type etchant is used, so that the Pd catalyst adsorbed in the previous step remains on the surface of the copper foil 12 and the inner wall of the through hole 3, while the copper foil 12a. Only selectively etch.

次いで、部分エッチングされた結果、めっきレジスト層13の直下における銅箔12よりも一段低く凹む薄肉段差部21と、スルーホール3の内壁とに無電解銅めっきを施して銅めっきを析出させる。
すると、スルーホール3の内壁にはその貫通方向に延びる円筒状の貫通方向めっき部41が析出し、銅箔12の薄肉段差部21には絶縁基板1の面方向にはみ出す、言い換えれば、スルーホール3の径方向外方に沿ってはみ出すリング状の面方向めっき部42が析出する(図5、第1のめっき工程)。
Next, as a result of partial etching, electroless copper plating is applied to the thin stepped portion 21 that is recessed one step lower than the copper foil 12 immediately below the plating resist layer 13 and the inner wall of the through hole 3 to deposit copper plating.
Then, a cylindrical penetration direction plating portion 41 extending in the penetration direction is deposited on the inner wall of the through hole 3 and protrudes in the surface direction of the insulating substrate 1 to the thin stepped portion 21 of the copper foil 12, in other words, the through hole. The ring-shaped surface direction plating part 42 which protrudes along the radial direction outer side of 3 precipitates (FIG. 5, 1st plating process).

これら貫通方向めっき部41と面方向めっき部42とは一体をなして析出するので、スルーホール3は後工程で絶縁基板1の両面に形成される導体パターン2,2間を電気的に層間接続するめっきスルーホール4となる。
次いで、めっきレジスト層13の直下にある銅箔12を給電部として用いて電気銅めっきを行い、円筒状の貫通方向めっき部41に包囲されている内空部14をめっき銅にて穴埋めする(図6、第2のめっき工程)。この穴埋め部15は、銅箔12の外表面12Aから膨出するまで形成される。
Since the through-direction plated portion 41 and the surface-direction plated portion 42 are deposited together, the through-hole 3 is electrically connected between the conductor patterns 2 and 2 formed on both surfaces of the insulating substrate 1 in a later step. The plated through hole 4 is formed.
Next, electrolytic copper plating is performed using the copper foil 12 immediately below the plating resist layer 13 as a power feeding portion, and the inner space portion 14 surrounded by the cylindrical through-direction plating portion 41 is filled with plated copper ( FIG. 6, second plating step). The hole filling portion 15 is formed until it bulges from the outer surface 12A of the copper foil 12.

次いで、めっきレジスト層13を除去し、さらに、銅張り積層板Qの表裏両面を研磨する。研磨に際しては、穴埋め部15の膨出部だけを研磨するのではなく、銅箔12がその外表面から0.1〜0.2μm研磨される程度の研磨しろを設定しておいて、銅箔12のうち部分エッチングされていない部分と、めっきスルーホール4の面方向めっき部42と、穴埋め部15とが面一となるように外表面を研磨する(図7)。
このとき、めっきスルーホール4には、研磨方向すなわち絶縁基板1に沿う方向に外力が作用するが、めっきスルーホール4が穴埋めされているので、面方向めっき部42が研磨方向に引きずられることはなく、仮に引きずられることがあったとしても、面方向めっき部42の下面42Aと薄肉段差部21の床面21Bとの接触状態はそのまま維持されるので、層間接続は確保される。
Next, the plating resist layer 13 is removed, and the front and back surfaces of the copper-clad laminate Q are polished. At the time of polishing, not only the bulging portion of the hole filling portion 15 is polished, but a polishing margin is set such that the copper foil 12 is polished by 0.1 to 0.2 μm from its outer surface. The outer surface is polished so that the portion of 12 that is not partially etched, the surface-direction plated portion 42 of the plated through hole 4, and the hole filling portion 15 are flush with each other (FIG. 7).
At this time, an external force acts on the plated through hole 4 in the polishing direction, that is, in the direction along the insulating substrate 1. However, since the plated through hole 4 is filled, the surface direction plated portion 42 is dragged in the polishing direction. However, even if it may be dragged, the contact state between the lower surface 42A of the planar plating portion 42 and the floor surface 21B of the thin stepped portion 21 is maintained as it is, so that interlayer connection is ensured.

しかる後、銅箔12をサブトラクティブ法により所定のパターンでエッチングすると、絶縁基板1の表裏両面1A,1Bに導体パターン(回路パターン)2が形成されると共に、これら導体パターン2同士がめっきスルーホール4を介して電気的に層間接続されたプリント配線板Pが形成される(図8)。
このとき、エッチングされる導体層の厚みは、銅張り積層板Qに元々積層されていた銅箔12から前記研磨しろを差し引いた厚みであるから、導体パターン2の形成が容易になると共に、その細線化及び高密度化も容易に実現することができる。
Thereafter, when the copper foil 12 is etched in a predetermined pattern by the subtractive method, conductor patterns (circuit patterns) 2 are formed on the front and back surfaces 1A and 1B of the insulating substrate 1, and the conductor patterns 2 are plated through holes. A printed wiring board P electrically connected to each other through 4 is formed (FIG. 8).
At this time, since the thickness of the conductor layer to be etched is the thickness obtained by subtracting the polishing margin from the copper foil 12 originally laminated on the copper-clad laminate Q, the formation of the conductor pattern 2 is facilitated. Thinning and high density can be easily realized.

なお、本発明は上記実施例に限定されるものではなく、その要旨を逸脱しない範囲で種々の設計変更が可能である。
例えば、図5に示す内空部14を穴埋めせずにそのまま残しておいて、導体パターン2を形成するようにしてもよい。
In addition, this invention is not limited to the said Example, A various design change is possible in the range which does not deviate from the summary.
For example, the conductor pattern 2 may be formed by leaving the inner space 14 shown in FIG.

本発明の一実施例によるプリント配線板の製造に用いられる銅張積層板を示す断面図である。It is sectional drawing which shows the copper clad laminated board used for manufacture of the printed wiring board by one Example of this invention. 図1に示す銅張り積層板にスルーホールを形成した状態を示す断面図である。It is sectional drawing which shows the state which formed the through hole in the copper clad laminated board shown in FIG. 図2に続いて、スルーホールの開口周縁部を残して銅箔上にめっきレジスト層を形成した状態を示す断面図である。FIG. 3 is a cross-sectional view illustrating a state in which a plating resist layer is formed on the copper foil, leaving the opening peripheral edge of the through hole, following FIG. 2. 図3に続いて、開口周縁部に露出する銅箔を部分エッチングを施した状態を示す断面図である。FIG. 4 is a cross-sectional view showing a state in which the copper foil exposed at the peripheral edge of the opening is partially etched following FIG. 3. 図4に続いて、スルーホールの内壁と部分エッチングされた銅箔部分に無電解めっきを施した状態を示す断面図である。FIG. 5 is a cross-sectional view showing a state in which electroless plating is applied to the inner wall of the through hole and the partially etched copper foil portion following FIG. 4. 図5に続いて、めっきレジスト層下の銅箔を給電部としてスルーホール内を電気めっきで穴埋めした状態を示す断面図である。FIG. 6 is a cross-sectional view illustrating a state in which the inside of the through hole is filled with electroplating using the copper foil under the plating resist layer as a power feeding portion following FIG. 5. 図6に続いて、めっきレジスト層を除去した後、基板表面を研磨して穴埋め部分と銅箔とを面一にした状態を示す断面図である。FIG. 7 is a cross-sectional view showing a state in which, after removing the plating resist layer, the substrate surface is polished and the hole filling portion and the copper foil are flush with each other after FIG. 6. 図7に続いて、銅箔を所定の導体パターンにエッチングしてプリント配線板とした状態を示す断面図である。FIG. 8 is a cross-sectional view illustrating a state in which the copper foil is etched into a predetermined conductor pattern to obtain a printed wiring board, following FIG. 7. 図8に示すプリント配線板の要部拡大断面図である。It is a principal part expanded sectional view of the printed wiring board shown in FIG.

符号の説明Explanation of symbols

1 絶縁基板
1A、1B 表裏両面
2 導体パターン(導体層)
3 スルーホール
12 銅箔(導体層)
13 めっきレジスト層
14 内空部
21 薄肉段差部
21A 上部壁面(コンタクト面)
21B 床面(コンタクト面)
21C 下部壁面(コンタクト面)
41 貫通方向めっき部(第1のめっき部)
42 面方向めっき部(第2のめっき部)
42A 外周面(コンタクト面)
42B 下面(コンタクト面)
P プリント配線板
Q 銅張り積層板
1 Insulating substrate 1A, 1B Front and back both sides 2 Conductor pattern (conductor layer)
3 Through hole 12 Copper foil (conductor layer)
13 Plating resist layer 14 Inner space 21 Thin stepped portion 21A Upper wall surface (contact surface)
21B Floor (contact surface)
21C Lower wall surface (contact surface)
41 Penetration direction plating part (first plating part)
42 Plane direction plating part (second plating part)
42A Outer peripheral surface (contact surface)
42B bottom surface (contact surface)
P Printed wiring board Q Copper-clad laminate

Claims (4)

絶縁基板の表裏両面に設けられた導体層のスルーホール周縁に薄肉段差部が形成され、この薄肉段差部には前記スルーホールの内壁に析出させた第1のめっき部の両端から前記絶縁基板に沿って延びる第2のめっき部が積層されていることを特徴とするプリント配線板。   A thin step portion is formed at the periphery of the through hole of the conductor layer provided on both the front and back surfaces of the insulating substrate, and the thin step portion is formed on the insulating substrate from both ends of the first plating portion deposited on the inner wall of the through hole. A printed wiring board, wherein a second plating portion extending along the side is laminated. 絶縁基板の表裏両面に設けられた導体層と、層間接続のためのめっきスルーホールとが、前記導体層の厚み方向及びそれと交差する方向に延びるコンタクト面を有して相互接続されていることを特徴とするプリント配線板。   Conductor layers provided on both front and back surfaces of the insulating substrate and plated through holes for interlayer connection are interconnected with contact surfaces extending in the thickness direction of the conductor layer and in a direction crossing the conductor layer. Characteristic printed wiring board. スルーホールを有する銅張り積層板の表裏両面に、前記スルーホールの開口周縁部を残してめっきレジスト層を形成するマスク工程と、
前記スルーホールの開口周縁部に露出する銅箔をその厚み方向に部分エッチングするエッチング工程と、
前記スルーホールの内壁及び前記部分エッチングされた銅箔表面にめっき層を析出させる第1のめっき工程とを備えることを特徴とするプリント配線板の製造方法。
A mask process for forming a plating resist layer on both the front and back surfaces of the copper-clad laminate having a through hole, leaving an opening peripheral edge of the through hole; and
Etching process of partially etching the copper foil exposed at the opening peripheral edge of the through hole in the thickness direction;
A printed wiring board manufacturing method comprising: a first plating step for depositing a plating layer on the inner wall of the through hole and the partially etched copper foil surface.
前記第1のめっき工程により形成されためっきスルーホールの内空部を、前記めっきレジスト層下の銅箔を給電部として電気めっきにより穴埋めする第2のめっき工程を備えることを特徴とする請求項3記載のプリント配線板の製造方法。
2. The method according to claim 1, further comprising a second plating step of filling an inner space of the plated through hole formed by the first plating step by electroplating using the copper foil under the plating resist layer as a power feeding portion. 3. A method for producing a printed wiring board according to 3.
JP2004098310A 2004-03-30 2004-03-30 Printed wiring board and its manufacturing method Pending JP2005286122A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017084920A (en) * 2015-10-27 2017-05-18 新光電気工業株式会社 Inductor device and method of manufacturing the same
JP7425348B2 (en) 2017-09-22 2024-01-31 日亜化学工業株式会社 Multilayer board and component mounting board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017084920A (en) * 2015-10-27 2017-05-18 新光電気工業株式会社 Inductor device and method of manufacturing the same
JP7425348B2 (en) 2017-09-22 2024-01-31 日亜化学工業株式会社 Multilayer board and component mounting board

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