JPH02137238A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH02137238A
JPH02137238A JP63292983A JP29298388A JPH02137238A JP H02137238 A JPH02137238 A JP H02137238A JP 63292983 A JP63292983 A JP 63292983A JP 29298388 A JP29298388 A JP 29298388A JP H02137238 A JPH02137238 A JP H02137238A
Authority
JP
Japan
Prior art keywords
fine metal
metal wires
thin metal
wires
metal wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63292983A
Other languages
Japanese (ja)
Inventor
Yuji Sawamori
澤森　雄治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP63292983A priority Critical patent/JPH02137238A/en
Publication of JPH02137238A publication Critical patent/JPH02137238A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To prevent fine metal wires or the fine metal wires and inner leads from coming into contact directly to each other by a method wherein an insulator is applied on the surfaces of the fine metal wires and the surfaces of parts, which have a possibility of coming into contact with the fine metal wires, of the inner leads. CONSTITUTION:Electrodes 10 on a semiconductor chip 1 and inner leads 4 are connected to each other by fine metal wires 2. Moreover, after an insulator 3 is applied on the wires 2 or on the lead parts 4 to insulate electrically the fellow wires 2 or the wires 2 and the leads 4 from each other, the electrical insulation is finished by a resin sealing and a molding. Thereby, even if the fine metal wire and the fine metal wire or the fine metal wires and the inner leads come into contact to each other in the resin sealing process, both are not electrically connected to each other and a highly reliable insulation can be obtained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は樹脂封止形半導体装置であって、特にその半
導体素子の電極とインナーリードとを結ぶ金属細線に関
するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a resin-sealed semiconductor device, and particularly to a thin metal wire connecting an electrode of a semiconductor element and an inner lead.

〔従来の技術〕[Conventional technology]

第２図は従来の半導体装置を示す側面断面図であり、図
において、１は半導体チップ、２は半導体チップ１上の
電極パッド１０とインナーリード４を電気的につなぐ金
属細線、５は半導体チップ１の入出力端子となる外部リ
ード、６は半導体チップを固定するグイパッド、７は封
止樹脂である。FIG. 2 is a side sectional view showing a conventional semiconductor device. In the figure, 1 is a semiconductor chip, 2 is a thin metal wire that electrically connects the electrode pad 10 on the semiconductor chip 1 and the inner lead 4, and 5 is a semiconductor chip. 1 is an external lead serving as an input/output terminal, 6 is a guide pad for fixing a semiconductor chip, and 7 is a sealing resin.

次に上記従来の半導体装置製造方法について簡単に説明
すると、まず半導体チップ１の電極パッド１０とインナ
ーリード４間を金属細線２にて、ワイヤボンドする。そ
して、その後封止樹脂７により樹脂封止していた。Next, the above-mentioned conventional semiconductor device manufacturing method will be briefly described. First, the electrode pads 10 of the semiconductor chip 1 and the inner leads 4 are wire-bonded using the thin metal wires 2. After that, resin sealing was performed using a sealing resin 7.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の半導体装置は以上のように構成されているので、
樹脂封止の工程において、注入される封止樹脂７により
金属細線３が動がされ、金属細線３同士、または金属細
線３とインナーリード４とが接触して電気的につながる
という問題点があった。Conventional semiconductor devices are configured as described above, so
In the process of resin sealing, there is a problem in that the thin metal wires 3 are moved by the injected sealing resin 7, and the thin metal wires 3 or the thin metal wires 3 and the inner leads 4 come into contact and are electrically connected. Ta.

この発明は上記のような問題点を解消するためになされ
たもので、金属細線と金属細線または金属細線とインナ
ーリードが直接接触することのない半導体装置を得るこ
とを目的とする。The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to obtain a semiconductor device in which there is no direct contact between thin metal wires or thin metal wires and inner leads.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係る半導体装置は、半導体チップ上の電極と
インナーリードとが金属細線により接続され、全体を樹
脂封止成形したものにおいて、前記金属細線の表面と、
前記インナーリードのうち金属細線と接触するおそれの
ある部分の表面に絶縁物を被覆したものである。A semiconductor device according to the present invention is one in which an electrode on a semiconductor chip and an inner lead are connected by a thin metal wire, and the whole is molded with resin sealing, wherein the surface of the thin metal wire,
The surface of the portion of the inner lead that is likely to come into contact with the thin metal wire is coated with an insulating material.

〔作用〕[Effect]

この発明における半導体装置は、半導体チップ上の電極
とインナーリードとを金属細線により接続させ、前記金
属細線あるいはインナーリード部に絶縁物を塗布して、
金属細線同士あるいは金属細線とインナーリードとを電
気的に絶縁させた後に、樹脂封止成形により仕上げる。In the semiconductor device according to the present invention, an electrode on a semiconductor chip and an inner lead are connected by a thin metal wire, and an insulating material is applied to the thin metal wire or the inner lead portion.
After electrically insulating the thin metal wires or the thin metal wires and the inner leads, the metal wires are finished by resin sealing molding.

〔実施例〕〔Example〕

以下、この発明の一実施例について説明する。 An embodiment of the present invention will be described below.

第１図において、１は半導体チップ、２は半導体チップ
１上の電極バッドｌＯとインナーリード４とを電気的に
つなぐ金属細線、３は金属線Ｉ１２とインナーリード４
の表面に塗布された絶縁物、５は外部端子となる外部リ
ード、６は半導体チップ１を固定するグイパッド、７は
封止樹脂を示す。In FIG. 1, 1 is a semiconductor chip, 2 is a thin metal wire that electrically connects the electrode pad lO on the semiconductor chip 1 and the inner lead 4, and 3 is a metal wire I12 and the inner lead 4.
5 is an external lead serving as an external terminal, 6 is a pad for fixing the semiconductor chip 1, and 7 is a sealing resin.

この発明による半導体装置は、金属細線２とインナーリ
ード４の表面に絶縁物３を塗布しているので、樹脂封止
する工程で、金属細線２が動き、金属細線２と金属細線
２、または金属細線２とインナーリード４とが接触して
も、電気的につながらない。In the semiconductor device according to the present invention, since the insulator 3 is applied to the surfaces of the thin metal wires 2 and the inner leads 4, the thin metal wires 2 move during the resin sealing process, and the thin metal wires 2 and 2 or Even if the thin wire 2 and the inner lead 4 come into contact, they are not electrically connected.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、金属細線とインナーリ
ードの表面を絶縁物で塗布するように構成したので、樹
脂封止の工程で金属細線と金属細線丈なは金属細線とイ
ンナーリードが接触しても、電気的につながらず、信頼
性の高いものが得られる効果がある。As described above, according to the present invention, since the surfaces of the thin metal wire and the inner lead are coated with an insulator, the thin metal wire and the inner lead come into contact with each other during the resin sealing process. This has the effect of providing a highly reliable product with no electrical connection.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はこの発明の一実施例による半導体装置を示す側
面断面図、第２図は従来の半導体装置を示す側面断面図
である。 図において、１は半導体チップ、２は金属細線、３は絶
縁物、４はインナーリード、５は外部リード、６はグイ
パッド、７は封止樹脂、１０は電極バッドである。 なお、図中同一符号は同−又は相当部分を示す。FIG. 1 is a side sectional view showing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a side sectional view showing a conventional semiconductor device. In the figure, 1 is a semiconductor chip, 2 is a thin metal wire, 3 is an insulator, 4 is an inner lead, 5 is an external lead, 6 is a lead pad, 7 is a sealing resin, and 10 is an electrode pad. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims] 半導体チップ上の電極とインナーリードとが金属細線に
より接続され、全体を樹脂封止成形した半導体装置にお
いて、前記金属細線の表面と、前記インナーリードのう
ち前記金属細線と接触するおそれのある部分の表面とに
絶縁物を被覆したことを特徴とする半導体装置。In a semiconductor device in which an electrode on a semiconductor chip and an inner lead are connected by a thin metal wire and the whole is molded with resin, the surface of the thin metal wire and the portion of the inner lead that may come into contact with the thin metal wire are 1. A semiconductor device characterized by having a surface coated with an insulating material.
JP63292983A 1988-11-17 1988-11-17 Semiconductor device Pending JPH02137238A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63292983A JPH02137238A (en) 1988-11-17 1988-11-17 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63292983A JPH02137238A (en) 1988-11-17 1988-11-17 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH02137238A true JPH02137238A (en) 1990-05-25

Family

ID=17788952

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63292983A Pending JPH02137238A (en) 1988-11-17 1988-11-17 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH02137238A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103400811A (en) * 2013-07-03 2013-11-20 华天科技（西安）有限公司 Frame based flat packaging part adopting special dispensing technology and manufacturing process thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103400811A (en) * 2013-07-03 2013-11-20 华天科技（西安）有限公司 Frame based flat packaging part adopting special dispensing technology and manufacturing process thereof

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