JPH02137170A - Frame synchronizing device - Google Patents

Abstract

PURPOSE:To easily detect the start point of effective data by defining a frame synchronizing pattern, which is arranged in the start point part of the effective data, as a data pattern to be different from the synchronizing pattern which is inserted to the other part in the effective data. CONSTITUTION:For a frame synchronizing signal to show the start point of effective data N in respective tracks 2, a synchronizing pattern A is arranged. Among the effective data N in the other part, a synchronizing pattern B to be composed of the data pattern, which is different from the synchronizing pattern A, is arranged as the synchronizing signal respectively. Accordingly, at the time of reproducing, the synchronizing patterns A and B are detected and a time point, in which the frame synchronizing pattern A is periodically detected, can be regarded as the start point of the effective data N in the track 2. Thus, without using an external referring signal to roughly give start point information, the start point of the effective data can easily be detected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a frame synchronization device in digital communication.

(Prior Art) Conventionally, in the field of digital communications, frame synchronization devices periodically insert a certain data pattern into data in a time-division manner, and the receiving side detects this data pattern as a synchronization pattern. Frame synchronization is occurring.

Figure 3 shows, for example, a digital video tape recorder (
This conventional frame synchronizer is applied to a digital VTR (hereinafter referred to as a digital VTR), in which a synchronizing signal C consisting of a fixed data pattern is inserted into valid data N in a time-division manner on a track 22 on a magnetic tape 21. In addition,
Arrow P indicates the head scanning direction.

By the way, in a rotary rad recording and reproducing apparatus such as a digital VTR, data discontinuity occurs at the head switching point, so it is important to know the starting point of valid data N after the head switching. However, in the conventional frame synchronizer, since each synchronization signal C has the same data pattern, it is difficult to distinguish the first synchronization signal after head switching from the synchronization signals before and after it. Therefore, conventionally,
Relying on the PG pulse obtained from the rotation angle of the cylinder,
The head switching point was determined, and the first frame synchronization signal obtained at that time was determined to be the starting point of valid data N. In addition,
PG pulses are output from a rotary pulse generator.

(Problem to be Solved by the Invention) In such a conventional frame synchronization device, when applied to a digital VTR, for example, a PG pulse is required as an external reference signal, and the generation timing of this PG pulse is adjusted. There is a need. Further, in a multi-track VTR, it is necessary to correspond the PC pulse to the head, which makes adjustment even more complicated.

Furthermore, if synchronization cannot be achieved at the starting point of the original valid data N, the next point at which synchronization is obtained is determined to be the starting point of the invalid data, so that it may not even be possible to detect an error.

The present invention was proposed in order to solve these conventional problems, and provides a frame synchronization device that can detect the start point of valid data without using an external reference signal that roughly provides start point information. The purpose is to provide.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, a frame synchronization device according to the present invention is characterized in that a frame synchronization pattern is periodically changed.

(Function) In the present invention, the frame synchronization pattern is changed periodically. For example, when data is transmitted discontinuously, the frame synchronization pattern placed at the starting point of valid data is changed to By making the synchronization pattern different from the synchronization patterns arranged in other parts of the data, it is possible to easily detect the start point of valid data without using an external reference signal that roughly provides the start point information.

(Example) Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 shows an example of synchronization patterns arranged in a time-divisional manner in a head scanning direction P on a track 2 on a magnetic tape 1 when a frame synchronization device according to the present invention is applied to, for example, a digital VTR. show.

A synchronization pattern A is arranged in the frame synchronization signal indicating the start point of the valid data N of each track 2, and a synchronization pattern A is provided as a synchronization signal between the valid data N in the squared part.
A synchronization pattern B consisting of a data pattern different from the above is provided.

In this way, the effective data N of track 2 is used as a frame synchronization pattern arranged at the time glJ on each track 2.
Since a synchronization pattern A different from that of the square part was placed at the starting point of the square, the synchronization pattern A is used during playback.

The point in time when frame synchronization pattern A is periodically detected by the frame synchronization signal detecting section that detects pattern B can be regarded as the starting point of effective data N of track 2. So if you just want to know the starting point to valid data,
The PG pulse as an external reference signal becomes unnecessary.

FIG. 2 shows that when the present invention is applied to a digital VTR, the starting point of effective data N on track 2 is determined using a PG pulse as an external reference signal that roughly provides starting point information of effective data N on track 2 during playback. This figure shows a circuit that can determine whether the detection is correct or not.

In the figure, when the frame synchronization pattern Δ on the track 2 is detected by the frame synchronization signal detection unit on the receiving side, the input terminal 3 to which the detection output is input is connected to the NOR circuit 4, and the output terminal 5 connected to. Furthermore, when the frame synchronization signal detection section detects the synchronization pattern B on the track 2, the input terminal 6 to which the detection output is input is connected to the input terminal of the NOR circuit 4, and also connected to the input terminal of the AND circuit. 7 is connected. The output terminal of this NOR circuit 4 is connected to the reset terminal R of the flip-flop circuit 8 and also to the output terminal 10 via the flip-flop circuit 9. Also, an input terminal 11 to which the PG pulse is input.
is connected to the clock input terminal of this flip-flop circuit 8, and a high level (“H”) input is always applied to the data input terminal of the flip-flop circuit 8. The output terminal Q of the flip-flop circuit 8 is connected to the data input terminal of the flip-flop circuit 12 and also to the NOR circuit 13 . The output terminal Q of this flip-flop circuit 12 is connected to the other input terminal of the AND circuit 7, and the output terminal of this AND circuit 7 is connected to the output terminal 14. Further, the inverting output terminal Q of the flip-flop circuit 12 is connected to the other input terminal of the NOR circuit 13, and the output terminal of this NOR circuit 13 is connected to the output terminal 15.

According to such a configuration, when a PG pulse is input to the input terminal 11, the node 16 becomes "Hot", and then,
When the synchronization pattern A or B is detected and its detection output is input to the input terminal 3 or 6, the node 16 changes to a low level (111) and outputs a synchronization pulse 1q to the output terminal 10.

At this time, if a synchronization pulse is obtained by synchronization pattern B, the pulse is also output to the output terminal 14.

During normal operation, the first synchronization pulse obtained after inputting the PG pulse should be based on synchronization pattern A, so when a pulse occurs at the output terminal 14, it indicates the starting point of valid data N to be output to the output terminal 15. It can be determined that the pulse is erroneous. In addition, during normal operation, output terminal 15
The point in time when a pulse is obtained at output terminal 5 or 10 after a pulse is obtained at output terminal 5 or 10 can be regarded as the starting point of valid data N.
At this time, the output terminal 14 is at 16 lbs.

In this way, the frame synchronization pattern A arranged at the starting point of the valid data N is made different from the synchronizing pattern B inserted in other parts, and the PG pulse serves as a reference signal that roughly gives the starting point of the valid data N. By detecting the starting point of the valid data N using also the following, it is possible to determine whether the starting point detection is correct or not.

Note that if the error tolerance is increased when detecting the synchronization pattern A that indicates the starting point of the valid data N on track 2, and the error tolerance is decreased when detecting the synchronization pattern B in the square portion, the effective data N can be The detection rate of the frame synchronization pattern A at the starting point can be increased, and the false synchronization rate at other parts can be reduced. This is simply not possible with conventional frame synchronizers.

[Effects of the Invention] As explained above, according to the present invention, the frame synchronization pattern placed at the starting point of valid data is a different data pattern from the synchronization pattern inserted into other parts of the valid data. , it is possible to easily detect the starting point of valid data without using an external reference signal that roughly provides starting point information.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a synchronization pattern on a magnetic tape according to an embodiment of the frame synchronization device according to the present invention, FIG. 2 is a circuit diagram showing an application example of the frame synchronization device according to the present invention, and FIG.
The figure shows a synchronization pattern on a magnetic tape by a conventional frame synchronization device. 1...Magnetic tape 2...Track 3, 6.11...Input terminal 5, 10.14.15...Output terminal 4.13...NOR circuit 7...AND circuit 8.12 ...Flip-flop circuit 9...Knot circuit agent Patent attorney Nori Chika Yudo Hiroshi Uji

Claims (1)

[Claims] In a frame synchronization device used in digital communication, which periodically inserts a frame synchronization pattern into data in a time-division manner, and performs frame synchronization by detecting the frame synchronization pattern placed in the data during playback, the above-mentioned insertion is performed. A frame synchronization device characterized by periodically changing a frame synchronization pattern.