JPH02135544A - Duplex controller - Google Patents

Abstract

PURPOSE:To promptly detect a fault by providing a means to respectively control access from a present system to the other system and from the other system to the present system and a means to control the return from the other system to the present system, setting a diagnostic mode at every constant time, and periodically and autonomously activating a part where a potential trouble may be found. CONSTITUTION:A first control circuit 32 to control the access from the present system to the other system sends data and an address to an interface circuit 31 by the control of a switching circuit 37 according to processing information from a central processing circuit 20. A second control circuit 33 sends the data and address from a bus control circuit 36 to a memory circuit 40 according to control information sent to the interface circuit 31. A diagnosis activating circuit 34 periodically activates the first control circuit 32 of the present system according to a timing signal 50 from the central processing circuit 20, and executes dummy access. An error detecting circuit 35 not only detects the errors of the data and address between an interface circuit 30 and an interface circuit 31, but also detects an error report through a control signal line 82.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a duplex control device.

[Conventional technology]

In a redundant control device of the active standby system, an access path from the own system to the other system and an access path from the other system to the own system are used to make the contents of the storage circuits of both systems the same during normal operation. In this way, by always keeping the contents of the memory circuits of both systems the same, even if one control device becomes in a failure state, the processing can be immediately restarted by the other control device.

[Problem that the invention seeks to solve]

However, during online operation, access control circuits from other systems on the active (ACT) side to the own system and standby (SBY)
Since the access control circuit from the own system to the other system on the side is not normally used, even if a failure occurs in this circuit, it cannot be detected online.

Therefore, when switching from the SBY side to the ACT side in a state in which a failure cannot be detected in the control circuit related to access from the SBY side to the ACT side, there is a possibility that the contents of the storage circuits of both systems will be different and the system will go down.

As a result, there is a risk that a failure of the control device on the ACT side becomes latent.

[Means for solving problems]

The redundant control device of the present invention includes first and second control means for controlling access from the own system to the other system, third control means for controlling loopback from the other system, and a diagnostic mode that is set at regular intervals. and a diagnostic means for activating the first control means of its own system and the second and third control means of other systems.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 shows the configuration of a duplex control device according to an embodiment of the present invention. The control device 10 and the control device 11 have the same configuration. The control device 10 includes a central processing circuit 20, an interface circuit 30, and a memory circuit 40. The control device 11 also includes a central processing circuit 21 and an interface circuit 31.
and a memory circuit 41. Interface circuit 30
and the interface circuit 31 are connected, and the control device 1
0 is on the ACT side, the central processing circuit 20 writes the processing information to the storage circuit 40 via the interface circuit 30, and at the same time writes the processing information to the interface circuit 30.3.
1 to the memory circuit 41 of the control device 11.

Further, if the control device 11 is on the ACT side, the central processing circuit 21 performs similar writing.

FIG. 2 shows the detailed configuration of the interface circuits 30 and 31. In the interface circuit 30, numeral 32 is a first control circuit that controls access from the own system to other systems; - The data and address on the data line 71 are transferred to the interface circuit 31 under the control of the data/address switching circuit 37.
is sent out through the address/data line 72.

Furthermore, the first control circuit 32 transfers the control information to the control bus line 8.
2 to the interface circuit 31. Second
According to the control information sent from the interface circuit 31, the control circuit 33 transmits the data and address from the interface circuit i\831 via the data/address line 73 and the control signal via the control signal line 83 to the bus control circuit 36. from there to the storage circuit 40. Diagnostic startup circuit 3
4 periodically activates the first control circuit 32 of its own system to perform dummy access according to the timing signal 50 from the central processing circuit 20. The error detection circuit 35 is a circuit such as a parity detection circuit, and is an interface It not only detects errors in data and addresses between the circuit 30 and the interface circuit 31, but also detects error reports via the control signal line 82. Errors while in the diagnostic mode are reported through the diagnostic circuit 34 to the central processing circuit 20 on an error report line 60. Note that in the interface circuit 31, the same components as those in the interface circuit 30 are indicated by the same reference numerals.

Referring to FIGS. 1 and 2, the interface circuit 30 is on the ACT side, and the interface circuit 31 is on the SB side.
If it is the Y side, when writing to memory in online operation, the control circuit 32 of the IF interface circuit 301 on the ACT side sends a write request to the interface circuit 31, and data and addresses are sent from the central processing circuit 20 to the AC
The signal is sent to the storage circuit 41 through the switching circuit 37 on the T side and the switching circuit 37 on the SBY side. Control is performed by the second control circuit 33 on the SBY side. Therefore, ACT
The second control circuit 33 on the side and the first control circuit 3 on the SBY side
2 is not working. When the diagnostic circuit 34 on the SBY side is activated periodically by the timing signal 50, a diagnostic mode is set, and the first control circuit 32 on the SBY side is activated to select a predetermined address through the data switching circuit 37.

A data pattern is sent out. Upon receiving this diagnostic information, the ACT side sets the bus switching circuit 37 to loopback mode using the second control circuit 33 and diagnostic circuit 34.
The address and data transferred from the SBY side are transferred to SBY again.
Turn around to the BY side. At this time, the error detection circuit 3 on the ACT side
Errors detected by 5 are reported to central processing circuit 20 via error report line 60. On the SBY side, the normality of the operation is checked by checking the returned data and address. SBY side error detection circuit 3
The error detected by 5 is reported to the ACT side through the first control circuit 32 on the SBY side, and finally to the central processing circuit 20 via the error report line 60. In addition,
Conflicts may occur during memory write operations during online operations on the ACT side, but to prevent this,
For example, the state of the ACT side may be added to one of the diagnostic activation conditions. That is, the idle state (halt state) on the ACT side may be detected and used as the diagnostic activation condition.

〔Effect of the invention〕

As described above, according to the present invention, failure detection can be accelerated by periodically and autonomously activating a location where there is a possibility of a latent failure.

Output circuit, 36... bus control circuit, 37... address/data switching circuit.

Claims (1)

[Claims] A first control means for controlling access from the own system to the other system, a second control means for controlling access from the other system to the own system, and a second control means for controlling access from the other system to the own system when in diagnostic mode. a third control means for controlling loopback; and a diagnostic means for setting a diagnostic mode at regular intervals to activate the first control means of the own system and the second and third control means of the other system. A redundant control device comprising: