JPH02130912A - Thin film semiconductor device - Google Patents

Thin film semiconductor device

Info

Publication number
JPH02130912A
JPH02130912A JP28506688A JP28506688A JPH02130912A JP H02130912 A JPH02130912 A JP H02130912A JP 28506688 A JP28506688 A JP 28506688A JP 28506688 A JP28506688 A JP 28506688A JP H02130912 A JPH02130912 A JP H02130912A
Authority
JP
Japan
Prior art keywords
layer
semiconductor device
thin film
amorphous
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28506688A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP28506688A priority Critical patent/JPH02130912A/en
Publication of JPH02130912A publication Critical patent/JPH02130912A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/7866Non-monocrystalline silicon transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To obtain a thin film semiconductor device whose operating speed is high by forming a semiconductor layer constituted of a two-layer structure of an amorphous semiconductor layer and a polycrystalline semiconductor layer on a glass substrate, and forming a semiconductor device on said two-layer structure semiconductor layer. CONSTITUTION:An amorphous Si layer 2 is formed on the surface of a glass substrate 1 by CVD method or sputtering method; the surface of the layer 2 is irradiated with far ultraviolet rays or far ultraviolet ray laser light or low acceleration electron beam by using scanning method or collective irradiation method; thereby forming a polycrystalline Si layer 3. In this layer 3, an MOSFET composed of a gate insulating film 4, a gate electrode 5 and an interlayer insulating film 6 is formed as a source 7, a drain 8 and a gate 9. Thereby, a thin film semiconductor device whose operating speed is high can be formed.

Description

【発明の詳細な説明】 〔産業上の利用分野1 本発明は薄膜半導体装置の半導体薄膜構造に関する。[Detailed description of the invention] [Industrial application field 1 The present invention relates to a semiconductor thin film structure of a thin film semiconductor device.

〔従来の技術〕[Conventional technology]

従来薄膜半導体装置として、石英基板上に多結晶Si膜
を形成し、該多結晶Si膿に半導体装置を形成した薄膜
半導体装置や、コーニング#7059ガラス基板上にア
モルファスSi膜を形成し、該アモルファスSi膜に半
導体装置を形成した薄膜半導体装置があった。
Conventional thin film semiconductor devices include thin film semiconductor devices in which a polycrystalline Si film is formed on a quartz substrate and a semiconductor device is formed on the polycrystalline Si, and an amorphous Si film is formed on a Corning #7059 glass substrate and the amorphous There has been a thin film semiconductor device in which a semiconductor device is formed in a Si film.

〔発明が解決しようとする課題1 しかし、上記従来技術によると1石英基板上の多結晶S
i膜による薄膜半導体装置は半導体装置の動作速度は速
いが、石英基板がガラス基板に比し、1桁程度高価にな
ると云う課題があり、ガラス基板上のアモルファスSi
膜による薄膜半導体装置はガラス基板の価格は低廉では
あるが半導体装置の動作速度が遅いと云う課題があった
[Problem to be solved by the invention 1 However, according to the above conventional technology, polycrystalline S on a quartz substrate
Thin film semiconductor devices using i-films have a high operating speed, but there is a problem in that quartz substrates are about an order of magnitude more expensive than glass substrates, and amorphous silicon on glass substrates
Although the cost of a glass substrate for a thin film semiconductor device using a film is low, there is a problem in that the operating speed of the semiconductor device is slow.

本発明は、かかる従来技術の課題を解決し、低廉で且つ
動作速度の速い薄膜半導体装置を提供する事を目的とす
る。
It is an object of the present invention to solve the problems of the prior art and to provide a thin film semiconductor device that is inexpensive and operates at high speed.

【課題を解決するための手段] 上記課題を解決するために、本発明は薄膜半導体装置に
関し、ガラス基板上にアモルファス半導体層と多結晶半
導体層との2層構造から成る半導体層を形成し、該2層
構造半導体層に半導体装置が形成する手段をとる事を基
本とする。
[Means for Solving the Problems] In order to solve the above problems, the present invention relates to a thin film semiconductor device, in which a semiconductor layer having a two-layer structure of an amorphous semiconductor layer and a polycrystalline semiconductor layer is formed on a glass substrate, Basically, a method is adopted in which a semiconductor device is formed in the two-layer structure semiconductor layer.

[実 施 例] 以下、実施例により本発明を詳述する。[Example] Hereinafter, the present invention will be explained in detail with reference to Examples.

第1図は本発明の一実施例を示す薄膜半導体トランジス
タ(TFT:Th1n  FilmTrans i 5
tor)の断面図である。すなわち、コーニング#70
59等から成るガラス基板1の表面には、CVD法ある
いはスパッタ法等によるアモルファスSi層2を形成し
、該アモルファスSi層2の表面な遠紫外線光や遠紫外
線レーザー光線あるいは、低加速電子線を走査法あるい
は一括照射法等による照射し、多結晶Si層3となし、
該多結晶Si層3にゲート絶縁膜4、ゲート電極5及び
層間絶縁膜6から成るMOSFET (Metal−O
xide−Semic。
FIG. 1 shows a thin film semiconductor transistor (TFT) showing an embodiment of the present invention.
FIG. i.e. Corning #70
An amorphous Si layer 2 is formed on the surface of a glass substrate 1 made of 59 or the like by a CVD method or a sputtering method, and the surface of the amorphous Si layer 2 is scanned with deep ultraviolet light, far ultraviolet laser light, or a low-acceleration electron beam. irradiation by a method or a batch irradiation method to form a polycrystalline Si layer 3,
A MOSFET (Metal-O
xide-Semic.

nductor  Field  EffectTra
ns i 5tar)をリース7、ドレイン8及びゲー
ト9として形成したものである0本例によるアモルファ
スSi層は、光線や電子線によるアニール膜の熱緩衝の
作用をし、下地ガラス基板lのアニール膜の融解や熱歪
発生によるクラック等を防止する作用がある。又、アニ
ール時の多結晶Si層3の厚さは、光線の波長や電子線
の加速エネルギーによって極く表面の900人程残存限
定する事ができ、下地アモルファスSi層2は。
ndductor Field EffectTra
The amorphous Si layer according to this example, which is formed of ns i 5 tar) as the lease 7, drain 8, and gate 9, acts as a thermal buffer for the annealed film against light beams and electron beams, and the annealed film on the base glass substrate l. This has the effect of preventing cracks and the like caused by melting and thermal strain. Further, the thickness of the polycrystalline Si layer 3 during annealing can be limited to approximately 900 layers remaining on the surface depending on the wavelength of the light beam and the acceleration energy of the electron beam, and the thickness of the underlying amorphous Si layer 2 can be limited to approximately 900 layers.

1000人程度残存させれば良く、予め形成されるアモ
ルファスSi層は2000人程度以下でも良い、又、ゲ
ート絶縁膜は、CVD、SiO□膜等低温で形成される
ものとなる。更に、アモルファスSi層2の作用は熱緩
衝の外・抵抗値が絶縁物に近いので、素子分離としても
用いることができる。
Approximately 1,000 people may remain, and the pre-formed amorphous Si layer may be about 2,000 people or less, and the gate insulating film may be formed at a low temperature, such as by CVD or a SiO□ film. Furthermore, since the amorphous Si layer 2 has a function other than thermal buffering and has a resistance value close to that of an insulator, it can also be used for element isolation.

尚、半導体層はSi層のみならず、Ge、SiC,Se
、GaAs、InP等の他の半導体材料で構成されても
良い事は云うまでもない。
Note that the semiconductor layer is not only a Si layer but also Ge, SiC, Se
It goes without saying that it may be made of other semiconductor materials such as , GaAs, and InP.

[発明の効果] 本発明により低廉で且つ動作速度の速い薄膜半導体装置
が製作できる効果がある。
[Effects of the Invention] The present invention has the advantage that a thin film semiconductor device that is inexpensive and has a high operating speed can be manufactured.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す薄膜半導体装置の断面
図である。 1 ・ ・ ・ 2 ・ ・ ・ 3 ・ ・ ・ 4 ・ ・ ・ 5 ・ ・ ・ 6 ・ ・ ・ 7 ・ ・ ・ 8 ・ ・ ・ 9 ・ ・ ・ ガラス基板 アモルファスSi層 多結晶Si層 ゲート絶縁膜 ゲート電極 眉間絶縁膜 リース ドレイン ゲート 以 上 出願人 セイコーエプソン株式会社
FIG. 1 is a sectional view of a thin film semiconductor device showing one embodiment of the present invention. 1 ・ ・ ・ 2 ・ ・ ・ 3 ・ ・ 4 ・ ・ ・ 5 ・ ・ 6 ・ ・ 7 ・ ・ ・ 8 ・ ・ ・ 9 ・ ・ ・ Glass substrate Amorphous Si layer Polycrystalline Si layer Gate Insulating film Gate electrode Applicant for eyebrow insulating film lease drain gate and above Seiko Epson Corporation

Claims (1)

【特許請求の範囲】[Claims] ガラス基板上にはアモルファス半導体層と多結晶半導体
層との2層構造から成る半導体層が形成され、該2層構
造半導体層に半導体装置が形成されて成る事を特徴とす
る薄膜半導体装置。
A thin film semiconductor device characterized in that a semiconductor layer having a two-layer structure of an amorphous semiconductor layer and a polycrystalline semiconductor layer is formed on a glass substrate, and a semiconductor device is formed on the two-layer structure semiconductor layer.
JP28506688A 1988-11-11 1988-11-11 Thin film semiconductor device Pending JPH02130912A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28506688A JPH02130912A (en) 1988-11-11 1988-11-11 Thin film semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28506688A JPH02130912A (en) 1988-11-11 1988-11-11 Thin film semiconductor device

Publications (1)

Publication Number Publication Date
JPH02130912A true JPH02130912A (en) 1990-05-18

Family

ID=17686718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28506688A Pending JPH02130912A (en) 1988-11-11 1988-11-11 Thin film semiconductor device

Country Status (1)

Country Link
JP (1) JPH02130912A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06291316A (en) * 1992-02-25 1994-10-18 Semiconductor Energy Lab Co Ltd Thin film insulated gate semiconductor device and manufacture thereof
JPH0817731A (en) * 1994-06-28 1996-01-19 New Japan Radio Co Ltd Manufacture of semiconductor device
US5773309A (en) * 1994-10-14 1998-06-30 The Regents Of The University Of California Method for producing silicon thin-film transistors with enhanced forward current drive
US5894151A (en) * 1992-02-25 1999-04-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having reduced leakage current
US6028333A (en) * 1991-02-16 2000-02-22 Semiconductor Energy Laboratory Co., Ltd. Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors
WO2001099199A1 (en) * 2000-06-23 2001-12-27 Nec Corporation Thin-film transistor and method of manufacture thereof
US6352883B1 (en) 1991-02-22 2002-03-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US6458200B1 (en) 1990-06-01 2002-10-01 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating thin-film transistor
US6709907B1 (en) 1992-02-25 2004-03-23 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating a thin film transistor

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7018874B2 (en) 1990-06-01 2006-03-28 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating thin-film transistor
US6740547B2 (en) 1990-06-01 2004-05-25 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating thin-film transistor
US6458200B1 (en) 1990-06-01 2002-10-01 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating thin-film transistor
US6028333A (en) * 1991-02-16 2000-02-22 Semiconductor Energy Laboratory Co., Ltd. Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors
US6717180B2 (en) 1991-02-22 2004-04-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US6352883B1 (en) 1991-02-22 2002-03-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
US5894151A (en) * 1992-02-25 1999-04-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having reduced leakage current
US6709907B1 (en) 1992-02-25 2004-03-23 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating a thin film transistor
JPH06291316A (en) * 1992-02-25 1994-10-18 Semiconductor Energy Lab Co Ltd Thin film insulated gate semiconductor device and manufacture thereof
US7148542B2 (en) 1992-02-25 2006-12-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of forming the same
US7649227B2 (en) 1992-02-25 2010-01-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of forming the same
JPH0817731A (en) * 1994-06-28 1996-01-19 New Japan Radio Co Ltd Manufacture of semiconductor device
US5773309A (en) * 1994-10-14 1998-06-30 The Regents Of The University Of California Method for producing silicon thin-film transistors with enhanced forward current drive
WO2001099199A1 (en) * 2000-06-23 2001-12-27 Nec Corporation Thin-film transistor and method of manufacture thereof
US7052944B2 (en) 2000-06-23 2006-05-30 Nec Corporation Thin-film transistor and method of manufacture thereof

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