JP2963353B2 - Manufacturing method of dielectric isolation substrate and dielectric isolation substrate - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a dielectric isolation substrate and a structure of the dielectric isolation substrate.

[0002]

2. Description of the Related Art Conventionally, a dielectric isolation technique using an insulator has been known as one of element isolation techniques of a semiconductor device. , There is no latch-up due to a parasitic thyristor, there is no need to consider the polarity of voltage application, and the parasitic capacitance is small.

[0003] As a technology for realizing dielectric isolation, SOS
A method of vapor-phase growing silicon on a sapphire substrate, a method of recrystallizing amorphous silicon deposited on an insulating film, a method using direct bonding of a silicon wafer,
A SIMOX method or the like for forming an isolation layer by implanting oxygen ions into a silicon wafer is known. Also, after etching a part of the silicon wafer to form an oxide film, polycrystalline silicon is deposited thickly and polished from the back side, so that island-shaped isolated single crystal silicon held by thick polycrystalline silicon Are also known.

However, in these methods,
Since the dielectric isolation substrate is formed by integrating different kinds of materials, there is a problem that the dielectric isolation substrate is warped. For example, through an oxide film with a thermal expansion coefficient of 1.6 × 10 ^-7 / ℃, the thermal expansion coefficient is 2.5 × 10 ^-6 / ℃, the dimensional change due to thermal expansion is about 15 times the dimensional change of the oxide film When two silicon wafers are bonded, if the thickness of one silicon wafer is smaller than the thickness of the other silicon wafer,
As a result of the release of the stress of the thinner silicon wafer, the dielectric isolation substrate is curved (warped) so as to project toward the thinner silicon wafer.

For this reason, conventionally, as described in Japanese Patent Publication No. 54-33107, a material having a large expansion coefficient is deposited on one surface of an insulating substrate at room temperature, and then silicon is epitaxially grown on the other surface at high temperature. A method of growing, a method of fixing a semiconductor substrate for warpage mitigation on the back surface as described in JP-A-5-190874, or a method shown in FIG. 5 has been proposed.

FIG. 5A shows a method described in Japanese Patent Application Laid-Open No. 1-302740, in which an insulating film 4 is formed on the back surface of a substrate 3 on which a silicon active layer 2 is formed on the front side via an insulating film 1. This is a method of forming a protective film 5 covering the substrate to alleviate the warpage.

Further, as shown in FIG.
The method described in (1) is a method in which, when the silicon active layer 8 is formed on the substrate 7 via the insulating film 6, the insulating film 6 is formed of a nitride film having a small stress to reduce the warpage.

Further, as shown in FIG.
The method described in 25 is a method in which polycrystalline silicon 12 is deposited on the back surface of the substrate 11 on which the silicon active layer 10 is formed on the front side via the insulating film 9 to reduce the warpage.

Conventionally, the dielectric isolation substrate is prevented from warping by the method described above, and accurate pattern formation in the photolithography process or reliable substrate fixing or substrate movement by a vacuum chuck or the like is performed. I have made it possible.

[0010]

However, for example, in the method of forming an insulating film 4 and a protective film 5 covering the insulating film 4 on the back surface of the substrate 3 shown in FIG. Met. In the method shown in FIG. 5B in which the insulating film 6 is formed of a nitride film having a small stress, the stress is basically relieved. However, for example, the stress is canceled to reduce the warpage by canceling the stress. The effect was small. In the method of depositing the polycrystalline silicon 12 on the back surface of the substrate 11 shown in FIG. 5C, there is a possibility that the polycrystalline silicon 12 is transformed. Furthermore, as described in Japanese Patent Application Laid-Open No. 5-190874, the method of fixing the semiconductor substrate for warpage mitigation to the back surface of the substrate is more complicated than the method of forming a normal dielectric isolation substrate. , One silicon wafer was required. As described above, the conventional method has problems that the effect is small and the process becomes complicated.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method of manufacturing a dielectric isolation substrate which can reduce the warpage of the dielectric isolation substrate and which is easy to manufacture, or a method thereof. An object of the present invention is to provide a structure of a dielectric isolation substrate formed by using the method.

[0012]

According to a first aspect of the present invention, there is provided a method for manufacturing a dielectric isolation substrate, comprising the steps of: providing a first semiconductor layer serving as a support substrate; After performing ion implantation from the back surface side of the first semiconductor layer, heat treatment is performed on a dielectric isolation substrate including a second semiconductor layer formed via a first insulating film serving as an element isolation dielectric film. And forming a second insulating film at a position substantially vertically symmetric with respect to the first insulating film.

According to a second aspect of the present invention, there is provided a method of manufacturing a dielectric isolation substrate, comprising: a first semiconductor layer serving as a support substrate; and a first insulating film serving as an element isolation dielectric film on a surface side of the first semiconductor layer. And forming a third semiconductor layer on the back surface side of the first semiconductor layer via a second insulating film formed substantially vertically symmetrically with respect to the first insulating film. A method for manufacturing a dielectric isolation substrate, comprising: performing ion implantation from the front side or the back side of the first semiconductor layer, and then performing heat treatment to respectively perform the first insulating film and the second insulating film. Is formed.

A method for manufacturing a dielectric isolation substrate according to claim 1.
Accordingly, a second semiconductor layer is formed on the front surface side of the first semiconductor layer serving as the support substrate via the first insulating film serving as the element isolation dielectric film, and the second semiconductor layer is formed on the back surface side of the first semiconductor layer. (2) It is possible to form a dielectric isolation substrate having a substantially vertically symmetric structure in which a third semiconductor layer is formed via an insulating film.
You .

Further, in a dielectric isolation substrate having a second semiconductor layer on a first semiconductor layer which becomes a supporting substrate with an insulating film which becomes an element isolation dielectric film interposed therebetween, the insulating film may be a polycrystalline silicon film. When a pair of compressive stress sandwich the polysilicon film, and an upper insulating layer and lower insulating film formation
Can reduce the stress of the insulating film.
You.

[0016]

According to the first aspect of the present invention, there is provided a method of manufacturing a dielectric isolation substrate.
A first semiconductor layer is formed on a surface of a first semiconductor layer serving as a support substrate via a first insulating film serving as an element isolation dielectric film and a second semiconductor layer serving as an active layer. After performing ion implantation from the back side of the substrate, heat treatment is performed to form a second insulating film at a position substantially vertically symmetric with respect to the first insulating film. By this method, a substantially vertically symmetric layer structure in which a first insulating film serving as an element isolation dielectric film is formed at a predetermined depth on the front side and a second insulating film is formed at a predetermined depth on the rear side. The provided dielectric isolation substrate (the dielectric isolation substrate according to claim 3) can be easily formed.

For example, after implanting oxygen ions from the back surface side of the silicon substrate (first semiconductor layer) which is the support substrate of the dielectric isolation substrate, heat treatment is performed to bring the second substrate to a predetermined depth on the back surface of the silicon substrate. What is necessary is just to form a silicon oxide film which is an insulating film. With this configuration, it is possible to cancel the stress inherent in the dielectric isolation substrate and suppress the occurrence of warpage during the process.

If the first semiconductor layer and the second semiconductor layer are made of the same material and the first insulating film and the second insulating film are made to have the same composition, the effect of suppressing the warpage of the dielectric isolation substrate can be reduced. Can be enhanced. Also, in the manufacturing process, the same treatment as that for the active layer made of silicon or the like on the front surface is performed on the back surface of the dielectric separation substrate, so that the difference in stress between the front and back surfaces of the dielectric separation substrate is reduced. Since the factors to be generated can be reduced, the occurrence of warpage can be further suppressed.

According to a second aspect of the present invention, there is provided a method of manufacturing a dielectric isolation substrate, comprising: forming an active layer on a surface side of a first semiconductor layer serving as a support substrate via a first insulating film serving as an element isolation dielectric film; Forming a second semiconductor layer formed on a back surface of the first semiconductor layer and a second dielectric layer via a second insulating film. Also,
It is formed by performing heat treatment after performing ion implantation from the surface side of the first semiconductor layer. According to this method, similarly to the manufacturing method according to the first aspect, a dielectric isolation substrate having a substantially vertically symmetric layer structure (the dielectric isolation substrate according to the third aspect) can be easily formed.

Further, on the first semiconductor layer serving as a support substrate,
In a dielectric isolation substrate provided with a second semiconductor layer via an insulating film serving as an element isolation dielectric film, an insulating film is formed by forming a polycrystalline silicon film and a pair of compressive stresses sandwiching the polycrystalline silicon film. It is composed of an insulating film and a lower insulating film . For example, the upper insulating film and the lower insulating film of the insulating film interposed between the first semiconductor layer and the second semiconductor layer may be made of a silicon oxide film. With this configuration, the compressive stress of the silicon oxide film can be offset by the polycrystalline silicon having the contraction stress, and the warpage of the dielectric isolation substrate can be suppressed.

[0021]

First, an embodiment of the dielectric isolation substrate of the present invention will be described with reference to FIG. FIG. 4 is a cross-sectional view of the dielectric isolation substrate, 13 is a first semiconductor layer serving as a support substrate,
Denotes a first insulating film serving as an element isolation dielectric film, and 15 denotes a second semiconductor layer formed on the surface side of the first semiconductor layer 13 with the first insulating film 14 interposed therebetween. First semiconductor layer 13 serving as support substrate
Are formed thicker than the second semiconductor layer 15. 16
Denotes a second insulating film formed on the back surface side of the first semiconductor layer;
Is a third semiconductor layer formed on the back side of the first semiconductor layer 13 via the second insulating film 16. The formation depth of the second insulating film 16 from the back surface of the dielectric isolation substrate is set to be substantially the same as the formation depth of the first insulation film 14 from the front surface of the dielectric isolation substrate. It is configured to have a vertically symmetric structure. First insulating film 14 and second insulating film 16
Is composed of, for example, an oxide film or a nitride film. In the thus-configured dielectric isolation substrate, a compressive stress acts on the first insulating film 14 and the second insulating film 16 and the second semiconductor layer 1
Shrinkage stress acts on the fifth and third semiconductor layers 17, but those stresses are balanced, so that the warpage of the dielectric isolation substrate can be reduced.

Next, an embodiment of the method for manufacturing a dielectric isolation substrate according to the present invention will be described with reference to FIG. The embodiment shown in FIG. 1 shows a method of manufacturing a dielectric isolation substrate formed by laminating two wafers. First, as shown in FIG. 1A, a silicon substrate 18 is oxidized and oxidized on the front side. Membrane 19
(First insulating film) is formed. Next, the silicon substrate 20 (first semiconductor layer), which has been cleaned in advance as shown in FIG. 2B, is bonded to the silicon substrate 18 as shown in FIG. And glue.

Thereafter, the silicon substrate 18 is turned over and the back surface of the silicon substrate 18 is polished using a mechanical and chemical polishing agent such as colloidal silica until the silicon substrate 18 has a desired thickness, thereby forming a second semiconductor layer. A silicon active layer 21 is formed. Thereafter, the implanted layer 22 is formed from the back surface of the silicon substrate 20 by an ion implantation method of oxygen. In this case, the thickness of the silicon active layer 21 on the front side and the thickness of the silicon layer 23 formed on the rear side and in contact with the silicon substrate 20 via the implanted layer 22 are substantially the same. Further, the thickness of the oxide film 19 as the first insulating layer and the thickness of the implanted layer 22 as the second insulating layer are substantially the same. Finally, heat treatment is applied to (d)
As shown in FIG. 6, the oxygen implanted layer 22 on the back side is changed to an oxide film 24.

Next, a description will be given of another embodiment of the method for manufacturing a dielectric isolation substrate according to the present invention with reference to FIG. FIG.
In the embodiment shown in (1), the first insulating film on the surface side of the dielectric isolation substrate is also formed by ion implantation of oxygen using the SIMOX method. First, as shown in (a), oxygen ions are implanted from the front side and the back side of the silicon substrate 25 (first semiconductor layer) serving as a support substrate, and from the front side or the back side, respectively, to approximately the same depth, Implanted layers 26, 2 having substantially the same thickness
7 is formed. Thereafter, as shown in FIG. 3B, heat treatment is performed to implant the oxygen implanted layers 26 and 27, respectively, in the first
Oxide film 28 as an insulating film, oxide film 29 as a second insulating film
Change to Accordingly, a silicon active layer 30 as a second semiconductor layer and a silicon layer 31 as a third semiconductor layer are formed on the front side or the back side of the dielectric isolation substrate, respectively. In the embodiment shown in FIGS. 1 and 2, the insulating film is an oxide film. However, the insulating film is not limited to the oxide film, and may be formed of a nitride film.

Next, different embodiments of the dielectric isolation substrate of the present invention will be described with reference to FIG. In the embodiment shown in FIG. 3, in a dielectric isolation substrate in which a second semiconductor layer 34 is formed on a first semiconductor layer 32 serving as a support substrate via an insulating film 33 serving as a first insulating film, shrinkage stress is reduced. The polycrystalline silicon film 33a is sandwiched between an upper insulating film 33b and a lower insulating film 33c having a pair of compressive stresses.
It is what constituted. First semiconductor layer 3 serving as a support substrate
2 is formed thicker than the second semiconductor layer 34. Upper insulating film 33b and lower insulating film 33c having compressive stress
For example, an oxide film may be used. In the conventional dielectric isolation substrate, since the insulating film interposed between the first semiconductor layer and the second semiconductor layer is composed of only the oxide film, the dielectric isolation substrate warps due to the compressive stress of the oxide film. However, by forming the insulating film 33 as shown in FIG. 3, it is possible to cancel the stress inherent in the insulating film 33, and to reduce the warpage of the dielectric isolation substrate. However, the insulating film 33 is not limited to an oxide film.

[0026]

As described above, in the method of manufacturing a dielectric isolation substrate according to claim 1 or 2, the same method as that of the front side is used for the back side by using the technique of ion implantation of oxygen. It is possible to easily form a high-quality dielectric isolation substrate having a structure in which an insulating film is formed and having a small amount of warpage. This enables high-precision patterning in the photolithography process, and also allows the substrate to be securely fixed and moved by a vacuum chuck or the like, so that the structure of the dielectric isolation substrate has a high density. In addition to promoting the development and practical application of a high-performance semiconductor integrated circuit, the manufacturing method can be stabilized and the manufacturing yield can be improved.

Further, an insulating film having a compressive stress, by sandwiching a layer of polycrystalline silicon, by forming the first semiconductor layer and the second semiconductor interlayer insulating film, it is possible to reduce the stress of the insulating film, A high-quality dielectric isolation substrate with less warpage can be easily realized.

[Brief description of the drawings]

FIG. 1 is a sectional view showing one embodiment of a method for manufacturing a dielectric isolation substrate of the present invention.

FIG. 2 is a sectional view showing a different embodiment of the method for manufacturing a dielectric isolation substrate according to the present invention.

FIG. 3 is a cross-sectional view showing another embodiment of the dielectric isolation substrate of the present invention.

FIG. 4 is a sectional view showing one embodiment of the dielectric isolation substrate of the present invention.

FIG. 5 is a cross-sectional view showing an example of a conventional dielectric isolation substrate.

[Explanation of symbols]

 Reference Signs List 19 oxide film (first insulating film) 20 silicon substrate (first semiconductor layer) 21 silicon active layer (second semiconductor layer) 24 oxide film (second insulating film) 25 silicon substrate (first semiconductor layer) 28 oxide film ( (First insulating film) 29 oxide film (second insulating film) 30 silicon active layer (second semiconductor layer) 31 silicon layer (third semiconductor layer) 32 first semiconductor layer 33 insulating film 33a polycrystalline silicon film 33b upper insulating film 33c Lower insulating film 34 Second semiconductor layer

Continuing on the front page (72) Inventor Yoshifumi Shirai 1048 Kadoma, Kadoma, Osaka Prefecture Matsushita Electric Works Co., Ltd. Nisoji 1048, Kazuma, Kadoma, Osaka Prefecture Matsushita Electric Works, Ltd. (56) References JP-A-5-217824 (JP, A) JP-A-2-58873 (JP, A) (58) Fields studied .Cl. ⁶ , DB name) H01L 27/12 H01L 21/265 H01L 21/762

Claims (2)

(57) [Claims] 1. A semiconductor device comprising: a first semiconductor layer serving as a support substrate; and a second semiconductor layer formed on a surface side of the first semiconductor layer via a first insulating film serving as an element isolation dielectric film. After performing ion implantation on the dielectric isolation substrate from the back side of the first semiconductor layer, heat treatment is performed to form a second insulating film at a position substantially vertically symmetric with respect to the first insulating film. A method for manufacturing a dielectric isolation substrate. A first semiconductor layer serving as a supporting substrate, and a second semiconductor layer formed on a surface side of the first semiconductor layer via a first insulating film serving as an element isolation dielectric film; 1
A method for manufacturing a dielectric isolation substrate, wherein a third semiconductor layer is formed on a back side of a semiconductor layer via a second insulating film formed substantially vertically symmetrically with respect to the first insulating film, A method of manufacturing a dielectric isolation substrate, comprising: performing ion implantation from the front side and the back side of a semiconductor layer, and then performing heat treatment to form the first insulating film and the second insulating film, respectively. .