JPH0212469A - Logic circuit converting system - Google Patents

Abstract

PURPOSE:To produce an efficient circuit having less redundancy by performing the materializing process of a functional module in a logic composing process by taking the connecting relation of the module into account. CONSTITUTION:A circuit realizing system selecting means 13 checks the connecting destination of the input signal of a functional module in a logic circuit and selects appropriate one out of such materializing systems of the functional module that 'the corresponding functional element in a cell library is assigned', 'a gate cell is assigned after the functional module is expanded in an AND/OR gate and optimized', and so forth. A circuit conversion executing means 14 converts a circuit in accordance with the materializing system selected by the means 13. Thus the materialization of a functional module is performed by paying attention not only to the function held by the module, but also to the connecting relation of the module. Therefore, an efficient circuit having less redundancy can be produced.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention embodies functional modules in logic circuit data configured on a computer memory in an automatic logic circuit synthesis system. Concerning logic circuit conversion methods.

(Prior Art) As the scale of digital systems increases, various automatic logic synthesis systems have been developed with the aim of improving design efficiency. These methods automatically create a logic circuit by inputting a behavioral description of the logic circuit to be designed in a hardware description language and a drawing representing the functions of the logic circuit constructed using function blocks such as selectors, decoders, and 7111 arithmetic called functional diagrams. The synthesis process consists of generating an initial circuit including functional modules from hardware descriptions and functional diagrams, and simplifying the logic and applying existing logic to the initial circuit generated in this process. It is broadly divided into the process of generating an actual physical circuit by performing conversions such as assignment of elements (elements prepared as a library of standard cells, etc.).

Here, in the latter process, there is usually a selector.

The method used is to search a cell library for a logic element corresponding to a functional module such as a decoder or adder, and allocate it. However, in the behavioral description and functional diagram of the software that is input to the logic synthesis system, operators and functions (
For example, by writing a constant value as an operand of = (assignment) + (addition)) in the hardware description, or by simplifying logic synthesis, the input of the above function module becomes a constant value of 0.1. In some cases, when a corresponding element in the cell library is allocated, a redundant circuit such as "one data input of a selector cell is fixed to 0" is generated, which is a problem.

(Problems to be Solved by the Invention) As described above, the conventional method has the drawback that redundant circuits are generated when implementing functional modules in logic synthesis.

The present invention has been made in view of these problems, and it is an object of the present invention to provide a method for efficiently implementing functional modules in logic synthesis and generating logic circuits with less redundancy.

[Structure of the invention]

(Means for Solving the Problems) The present invention examines the connection destination of an input signal of a functional module in a logic circuit, and based on the result, determines an appropriate implementation method for the functional module according to the selected implementation method. , has circuit conversion execution means for converting the functional module.

(Function) According to the present invention, the circuit realization method selection means checks the connection destination of the input signal of the functional module in the logic circuit, and based on the result, selects a "Jl for allocating the corresponding functional element in the cell library.""Deploy the functional module to the AND10R gate, perform optimization, select an appropriate one from among the implementation methods of the communication function module such as J, which allocates the gate cell, and the circuit conversion execution means implements the circuit implementation described above. The circuit is converted according to the embodiment method selected by the method selection means.In other words, in the present invention, the embodiment of a functional module is performed by focusing not only on the functions of the functional module, but also on the connection relationships between the functional modules. This makes it possible to generate efficient circuits with less redundancy.

(Example) Hereinafter, one embodiment of the present invention will be described based on the drawings.

FIG. 1 shows the constituent countries of one embodiment of the present invention. Logic circuits generated based on the hardware description language and functional diagrams are stored in the logic circuit data storage section 11. The logic circuit conversion rule storage unit 12 stores circuit conversion rules regarding the implementation method of the functional module. - The logic circuit embodiment method selection unit 13 selects an appropriate rule from among the rules stored in the logic circuit conversion rule storage unit 12 based on the result of checking the connection destination of the input signal of each functional module in the logic circuit data. select. The circuit conversion execution unit 14 executes the rule selected by the logic circuit implementation method/selection unit 13 and converts the circuit.

The present invention will now be explained by taking as an example the case where the selector circuit shown in FIG. 26 is a selector, and 27 and 28 are external output terminals named Of and 02, respectively.

Here, 25.26 has data inputs (Di to D4) and control inputs (C1 to C4), and one of C1 to C4 or C3
D1 to D4 or D3 corresponding to the control input that is
This is a functional module that selects data input. Here, it is assumed that D1 human power and D3 human power of 25 have a constant value of 1.0. Further, it is assumed that the two rules shown in FIG. 3 are included in the logic circuit conversion rule storage unit as a method of implementing the above-mentioned selector.

Rule 31 is a materialization method that searches for a selector cell in a library and assigns it, and rule 32 is a method that ANDs selectors.
, represents a method implemented using an OR gate.

FIG. 4 shows an example of the functions and areas (expressed as integers to show size relationships) of cells registered in the library.

The logic circuit implementation method selection unit 13 selects one of the rules 31 and 32 regarding the selector implementation method according to the algorithm shown in FIG.

In other words, check the connection destination of the selector's data input bin,
When the number of constant values is larger than the total data input, do not use the selector cell and use AND10R.
The method of realizing this using a gate (Rule 32) is adopted. The circuit conversion execution unit 14 extracts the functional modules (selectors in this case) in the circuit one by one and executes the circuit conversion rule selected by the logic circuit implementation method selection unit 13. In the case of the circuit shown in Figure 2, there are two constant value inputs Dl and D3 for the selector 25, so M = 2 in Figure 5.
゜ and cell SE3 is allocated. A circuit generated as a result of executing these circuit conversion rules is shown in FIG. Here, 61 to 65 are gates formed as a result of realizing the selector 25 with Φ10R gates.

61. The AND gate of 63 can be deleted for inputting a constant value, and when cell allocation is performed after this, the circuit shown in Fig. 7 is finally generated. This is the part corresponding to the selector No. 25.

If the area of this part is 81, then from Figure 4, 5i = 3 + 3
+4=10. On the other hand, if cell SE4 is simply assigned to the selector in FIG. 25 without using this method (
In other words, if the area of the conventional method (applying rule 32 to all selectors) is 82, then Figure 4! 5 52=
12>Sl. Therefore, by selecting the functional module implementation method in consideration of the input of the functional module (selector in this case) as in the present method, it is possible to generate an efficient circuit with a small area.

Note that the present invention is not limited to the above-described embodiments.

In the above embodiment, the focus was on the constant value input of the functional zeal as a criterion for selecting the logic circuit embodiment method, but a criterion that focuses on the same human power of the functional module or a criterion that focuses on the control input of the functional module is adopted. There may also be cases.

For example, when the register transfer condition is not 1 (the logical sum of the control inputs of the selector immediately before the register is 1), a feedback loop is created using a selector cell and 7 flip-flops by using a flip-flop that includes feedback looseness. Efficient circuits can also be generated.

Furthermore, although the above embodiments have been given as examples of implementation methods for selectors, it goes without saying that the present invention can also be applied to functional modules such as decoders, multiplexers, adders, etc.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to generate efficient circuits with less redundancy by performing the process of embodying functional modules in the logic synthesis process while also taking into account the connection relationships of functional modules. becomes.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a diagram showing an example of a logic circuit, Fig. 3 is a diagram showing specific rules for a selector, and Fig. 4 is a diagram showing cells registered in a library. A diagram showing an example of
5 is a diagram showing an algorithm by which the logic circuit embodiment method selection unit 13 selects the selector embodiment rule of FIG. 3;
The figure shows a circuit resulting from implementing the selector of the circuit in Figure 2 in accordance with the algorithm in Figure 5;
This figure shows a circuit finally obtained as a result of logic synthesis from the circuit of FIG. 2. 11...Logic circuit data storage section, 12...Logic circuit conversion rule storage section, 13...Logic circuit embodiment method selection section, 14...Circuit conversion execution section. 1st box 2nd drawing 5th drawing Atsushi drawing 5th drawing

Claims (1)

[Claims] In a method for performing circuit conversion on a logic circuit configured on a memory of a computer, a circuit implementation method selection means for checking a connection destination of an input signal of a functional module in the circuit and selecting a circuit implementation method for the functional module; , a circuit conversion execution means for converting the functional module based on the circuit implementation method selected by the circuit implementation method selection means.