JPS6385976A - Logic circuit converter - Google Patents

Abstract

PURPOSE:To shorten a converting time until the logic circuit of a final form is obtained by providing a means for estimating a conversion requiring part circuit to estimate the possibility of the conversion based on a converted partial logic circuit and a logic circuit to be converted and taking out the estimated partial logic circuit to decide the necessity of the conversion after it is decided that it is necessary to convert at least all the partial logic circuits. CONSTITUTION:To the conversion required part circuit estimating part 6, the partial circuit converted from a converting part 5, a circuity converting rule applied to the conversion and the logic circuit from a logic circuit storing part 1 are applied. From these information, the partial circuit requiring the conversion is estimated and the result is applied to a partial circuit extraction part 2. The partial circuit extraction part 2 is trailed until the extraction of all the partial circuits of the logic circuit is completed once, a leading estimation result using flag FLG is used thereafter, when the flag FLG is trailed, the respective partial circuits of the logic circuit are sequentially extracted and when the flag is led, only the partial circuit requiring the conversion from the estimating part 6 is extracted. In such a way, the number of decisions can be reduced and the converting time can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a logic circuit conversion device that converts, for example, a redundant logic circuit into an equivalent logic circuit with less redundancy.

(Prior Art) For example, in the field of logic device design, it is common to convert redundant logic circuits into equivalent simpler logic circuits. Many methods have been proposed for simplifying logic circuits, one of which is to investigate the relationship between the inputs of individual gates that are the components of a logic circuit, and then select the gate of interest. If the included partial logic circuit (hereinafter referred to as partial circuit) can be converted into an equivalent and simpler circuit, there is a method of performing the conversion and repeating this process one after another to simplify the logic circuit.

A conventional logic circuit conversion device to which this method is applied is shown in FIG. In FIG. 2, a logic circuit storage unit 1 stores a converted logic circuit 10, which is to be converted, for example, shown in FIG.
(including manual information on the subcircuits) are sequentially extracted for each gate and provided to the comparator 3, for example. The comparator 3 is also provided with circuit conversion rules from the circuit conversion rule storage 4, and compares the extracted partial circuits to see if they should be converted in accordance with the circuit conversion rules.

As a result, if it is determined that the partial circuit should be converted, the comparing unit 3 activates the converting unit 5 to convert the corresponding partial circuit of the logic circuit 1o according to the circuit conversion rule.

Here, as a circuit conversion rule, for example, Fig. 4 (A
), if at least one of the inputs of the AND gate 2o is an identically logical rOJ, the entire AND gate 2o is converted into an input signal that is an identically logical rOJ, such as the rule RUL1. , as shown in FIG. 4(B), if there is a constant logic "0" input among the inputs of the OR gate 21 that is powered by three or more people, the rule is to convert it to the OR gate 22 that omits the input of the logic rOJ. RUL
There are 2.

For example, in the conventional circuit, the logic circuit shown in FIG.
Circuit conversion rule RUL1 shown in the figure. Suppose that the conversion is performed using RUL2. In this case, first, the OR gate 31 is extracted by the partial circuit extraction section 2, and the circuit conversion rule RU is extracted by the comparison section 3.
It can be compared with LI and RUL2, but since it is not subject to conversion under any of the rules, no conversion is performed. Next, for example, it is checked whether or not the OR gates 32, 33, inverter 34, and AND gate 35 should be converted in this order, but similarly, which rule RUL1. These gates 32 to 35 are not converted because they do not match RUL2 either. When AND gate 36 is examined, it is determined that in this case it is a conversion target according to circuit conversion rule RULI, and AND gate 36 is replaced by a logic rOJ input as shown in FIG.

In this series of operations, since the partial circuit has been converted and the logic circuit 10 has been converted into the logic circuit 11 (FIG. 5), the necessity of conversion is determined for each of the OR gate 31 and AND gate 35. . In this second series of operations, the OR gates 32 and 33 are converted according to the circuit conversion rule RUL2, and the logic circuit 11
is converted into a logic circuit 12 as shown in FIG.

Therefore, for this logic circuit 12, the necessity of conversion at each gate 31 to 35 is then determined. In this case, circuit conversion rule RUL1. Since there is no gate applicable to RUL2, logic circuit 12 is determined as the final circuit, and the conversion operation ends.

(Problems to be Solved by the Invention) By the way, if even one partial circuit is converted in a series of conversion operations, the necessity of conversion is determined for all partial circuits. Therefore, if there are a large number of partial circuits and a series of conversion operations is repeated many times, it will take a very long time to obtain the final logic circuit.

The present invention has been made in consideration of the above points, and it is an object of the present invention to provide a logic circuit conversion device that can further shorten the conversion time until obtaining a final form of logic circuit.

[Structure of the Invention] (Means for Solving the Problem) In order to solve the problem, the present invention provides circuit conversion rules (RULl, RUL2) for converting a predetermined partial logic circuit into another partial logic circuit. > is determined in advance, and when a partial logic circuit in the converted logic circuit (10) is extracted and the partial logic circuit corresponds to the circuit conversion rule and is converted, it is converted according to the circuit conversion rule. In the logic circuit conversion apparatus, based on the converted partial logic circuit (36) and the converted logic circuit (10), partial logic circuits (32, 33) that have the possibility of being converted are
);
After determining the necessity of conversion for at least all partial logic circuits, the partial logic circuits (32, 33) estimated by the conversion necessary partial circuit estimating means (6) are extracted and the necessity of conversion is determined. did.

(Operation) The partial logic circuits (32, 33) that need to be converted for the converted logic circuit (11) after some partial logic circuits (36) are converted are the converted partial logic circuits (36).
) is limited to those that have a connection relationship with

Therefore, the conversion necessary partial circuit estimating means (6) includes the converted partial logic circuit (36) and the converted logic circuit (1) before conversion.
0), estimate the partial logic circuit (32, 33) that has a possibility of needing conversion, and
, 33) to determine whether conversion is necessary.

As a result, the number of judgments can be reduced and the conversion time can be shortened.

(Example) Below, parts corresponding to those in Fig. 2 are denoted by the same reference numerals.
An embodiment of the invention will now be described in detail with reference to the figures.

In FIG. 1, a conversion necessary partial circuit estimating section 6 is newly provided. This conversion-required partial circuit estimating unit 6 is provided with the converted partial circuit and the circuit conversion rule applied to the conversion from the converting unit 5, and also receives the logic circuit stored at that time from the logic circuit storage unit 1 ( For example, Fig. 3) is given.

From these given information, the conversion necessary partial circuit estimation unit 6
estimates the partial circuit that needs to be transformed next, and provides the estimation result to the partial circuit extraction unit 2.

In the case of this embodiment, the partial circuit extraction unit 2 uses the estimation result use flag FL, which remains low until extraction of all partial circuits of the logic circuit is completed 1rfJ, and thereafter rises.
Using G, when the flag FLG is falling, each partial circuit of the logic circuit is sequentially extracted, and when the flag is rising, it is estimated that the conversion given from the estimator 6 is necessary. Extract only the partial circuit.

In the configuration of the above embodiment, when a certain partial circuit is converted according to the circuit conversion rules, although the entire logic circuit is changed by the conversion, the partial circuit that requires new conversion is the converted part. This was done by focusing on the fact that it is limited to partial circuits around the circuit.
The above-mentioned conversion-required partial circuit estimating unit 6 estimates the converted peripheral partial circuits.

In the above configuration, the logic circuit 10 shown in FIG.
Circuit conversion rule RUL1 shown in the figure. The case of conversion using RtJL2 will be explained. First, in the initial state,
The flag FLG is falling, and the partial circuit extracting section 2 sequentially extracts each partial circuit (here, in units of gates) of the logic circuit 10 and supplies the extracted partial circuits to the comparing section 3. At this time, the comparator 3 operates in the same manner as the conventional device and activates the converter 5 to uniformly convert the AND gate 36 to a logic "0" input. Thus, by a series of operations for each gate 31-36, logic circuit 10 is converted into the equivalent logic circuit 11 shown in FIG.

At this time, the conversion section 5 provides the conversion-required subcircuit estimating section 6 with the fact that the AND gate 36 has been converted according to the rule RIJL1. Based on the information of the logic circuit 10 and this incoming information, the conversion-required partial circuit estimating unit 6 estimates that the OR gates 32 and 33 that receive the output of the AND gate 36 are partial circuits that may require conversion, and determines that the OR gates 32 and 33 are partial circuits that may require conversion. It is given to the circuit extractor 2.

When the series of operations for each gate 31 to 36 is completed, the flag FLG rises, and as a result, the extraction unit 2, based on the information from the estimation unit 6,
3 is extracted, and the other gates 31, 34, and 35 are not extracted.

Since the gates 32 and 33 in the logic circuit 11 correspond to the circuit conversion rule RLIL2, the conversion 15 converts them into the logic circuit 12 as shown in FIG.

At this time as well, the conversion unit 5 notifies the estimation unit 6 that the OR gates 32 and 33 have been converted according to the circuit conversion rule RUL2. However, the second circuit conversion rule RUL
In the case of 2, since the output information is the same as before the conversion, there is no new gate that requires conversion due to this conversion, so the estimating unit 6 provides this information to the extracting unit 2.

Since the flag FLG has risen in the extractor 2 and there is no partial circuit specified by the estimator 6, the extractor 2 finishes the extracting operation, and thus the logic circuit 12 is determined as the final form.

As described above, according to the above embodiment, after determining the necessity of conversion for some or all of the partial circuits and converting the necessary portions, only the partial circuits surrounding the converted partial circuits are converted. Since the necessity of conversion is determined, the number of determinations can be reduced compared to the conventional device, and the time required to obtain an Rn-like logic circuit can be significantly shortened.

Specifically, if we try to simplify the logic circuit shown in FIG. 3 in the conventional device, the extraction section 2 performs a total of 16 extractions, but according to the device of this embodiment, the extraction section 2 performs a total of 8 extractions. Therefore, the chances of judgment by the comparison section 3 are halved.

In the above-described embodiment, the conversion is performed in units of gates, but the circuit may include a plurality of gates. In this way, when the unit of partial circuits to be determined is expanded, circuit conversion rules are also determined accordingly.

Further, in the above-described embodiment, the conversion-required partial circuit estimating unit 6 estimates the “necessary” partial circuit, but it is also possible to determine the necessary partial circuit.

[Effects of the Invention] As described above, according to the present invention, 1
After examining the necessity of degree conversion, we investigated the necessity of only partial circuits that had the possibility of needing conversion, which significantly reduced the time required to simplify logic circuits compared to conventional devices. A logic circuit conversion device that can be shortened can be easily obtained.

[Brief explanation of the drawing]

Figure 1 shows the logic circuit modification 1 according to the present invention! 2 is a block diagram showing an embodiment of the device, FIG. 2 is a block diagram showing a conventional device, FIG. 3 is a block diagram showing the logic circuit 10 stored in the logic circuit storage unit 1, and FIG. 4 is a block diagram showing the circuit conversion. The route map showing the rules, FIGS. 5 and 6, are block diagrams showing the converted logic circuits 11 and 12, respectively. 1... Logic circuit storage unit 2... Partial circuit extraction unit 3... Comparison unit 4... Circuit conversion rule storage unit 5... Conversion unit

Claims (1)

[Claims] A circuit conversion rule for converting a predetermined partial logic circuit into another partial logic circuit is determined in advance, and a partial logic circuit within the converted logic circuit is extracted and the partial logic circuit is converted according to the circuit conversion rule. When the logic circuit conversion device converts according to the circuit conversion rules, the partial logic circuit that has the possibility of being converted is converted based on the converted partial logic circuit and the converted logic circuit. After determining the necessity of conversion for at least all of the above-mentioned partial logic circuits, the partial logic circuits estimated by the above-mentioned conversion-necessary partial circuit estimation means are extracted and the necessity of conversion is determined. 1. A logic circuit converting device characterized in that it is configured to determine gender.