JP2835082B2 - Logic circuit synthesizer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a logic circuit synthesis apparatus for automatically designing a logic circuit of a logic LSI using a computer.

(Prior Art) In recent years, in the design of a logic circuit of a logic LSI, in order to shorten the design period, a design system using a logic circuit synthesis device that inputs a logic circuit specification and automatically synthesizes a logic circuit having the function has been developed. It is being proposed.

The logic circuit synthesizer in the conventional design system synthesizes logic circuits by expanding functional elements to logic primitives such as AND, OR, NOT, etc., optimizing them, and allocating technology-dependent cells. doing.

(Problems to be Solved by the Invention) However, despite the recent development of device technology, a cell having a high function has been prepared in a library of a target technology. In the synthesis device, the functional elements of the circuit specification are expanded once to the logic primitive, the pattern is searched again, and the high-performance cells are allocated. There was such a problem.

Also, when a logic circuit whose technology is defined as an input is targeted, when creating a logic circuit with another technology, the high-performance cell depends on whether a cell having the function is prepared in the technology library or not. The handling is different, and if it is provided, it will be converted to its function cell, otherwise it will be expanded to logical primitives, so conversion rules for the number of target technologies are required, and rules There was also a problem that the logic synthesis became complicated as the number increased.

Furthermore, even if a cell is prepared, there is a problem that it is not possible to judge the situation of the surrounding circuits simply because the cell is replaced with the cell.

The present invention has been made in order to solve such a conventional problem, and it is possible to efficiently allocate high-function cells to input circuit specifications, and to shorten the synthesis processing time. It is an object to provide a logic circuit synthesis device.

[Structure of the Invention] (Means for Solving the Problems) A logic circuit synthesis device according to the present invention includes a circuit information input unit for inputting a circuit specification for designing a circuit of a logic LSI; A circuit information storage unit that stores connection information of a logic circuit based on the circuit specifications of the following, a conversion rule group storage unit that stores a conversion rule for generating a target logic circuit, and information of the circuit information storage unit. A circuit information output unit that outputs in a format recognizable by a designer, and a function existing in a function cell such as a decoder or a multiplexer when executing logic synthesis based on the circuit specification is treated as a function primitive and is present in a function cell. For functions that do not work, expand them into logic primitives, optimize these function and logic primitives as primitives, and The functional primitives in which to synthesize a logic circuit assigned to functional cells having the same function, and a logic synthesizing unit for giving to the circuit information output unit.

(Operation) In the logic circuit synthesis apparatus of the present invention, first, when a design circuit specification is input from the circuit information input unit, it is stored in the circuit information storage unit.

The input circuit specifications are converted by the logic synthesis processing unit into function primitives that do not depend on technology and specifications for which function primitives cannot be found, while searching for the conversion rule group in the conversion rule group storage unit. And then allocate technology-dependent cells.

When allocating cells depending on this technology, if there is a functional cell that realizes the function of the functional primitive of the target technology in the technology library of the conversion rule group storage unit, allocate the functional cell, If there is no such primitive, it is expanded to a logical primitive, and cells are allocated to the logical primitive.

In this way, the cell allocation and the optimization of the high-performance cells are performed efficiently.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a functional block diagram of one embodiment of the present invention,
Circuit information input unit 1 for inputting specifications of a target logic circuit
A circuit information storage unit 2 for storing input information from the circuit information input unit 1, and a conversion rule group storing various conversion rules for generating a target logic circuit from input circuit specifications It comprises a storage unit 3, a logic synthesis processing unit 4 for performing a logic circuit automatic synthesis process, and a circuit information output unit 5 for outputting synthesized logic circuit information.

Next, an operation of the logic circuit synthesizing device having the above configuration will be described.

In the embodiment of the present invention, technology-independent function primitives and logic circuit input information (step S1b) or logic circuit input information (step S1b) for a logic circuit to be designed as shown in FIG. Develop into logic primitives (Step S2), perform optimization at the primitive level (Step S3), perform cell allocation and optimization depending on the target technology (Step S4), and synthesize the logic circuit Is output (step S5).

 This will be described in more detail with specific examples.

Circuit specifications to be designed are input from the circuit information input unit 1 and stored in the circuit information storage unit 2.
It is assumed that a functional cell α of a decoder as shown in FIGS. 3A and 3B exists in a part of the logic circuit specification input from the circuit information input unit 1. The input technology is referred to as technology A, and the target technology is referred to as technology B.

The logic synthesis processing unit 4 first searches the conversion rule group storage unit 3 for the cell α of the input information of the circuit information storage unit 2 and uses the functional primitive decoder dec shown in FIG. Convert to Since the functional primitive decoder is not aware of the technology, the number of input bits is arbitrary.

Next, synthesis that does not depend on technology B is performed on the functional primitive decoder dec. That is, in the conversion rule group storage unit 3,
If there is a cell having the function of the input decoder, a cell β as shown in FIG. 5 is allocated.

However, if a high-performance cell cannot be found in the conversion rule group, it is converted into a logical primitive according to the conversion rule of the conversion rule group storage unit 3 as shown in FIG. Optimization is performed, and then cell allocation is performed using the technology B library stored in the conversion rule group storage unit 3.

The synthesized logic circuit of technology B is output by the circuit information output unit 5 in a manner that the designer can recognize.

In this way, if there is a high-performance cell that has the same function as the technology to be converted in the input logic circuit specification, the cell is allocated as it is, and once developed into a logic primitive as before. Then, the process of synthesizing the high-performance cell can be easily performed in a shorter time than when searching for and synthesizing the high-performance cell.

Next, a description will be given of an embodiment of logic circuit synthesis when a function specification is input as logic circuit input information.

When a part of the function specification as shown in FIG. 7 exists, this part is used in accordance with the conversion rule of the conversion rule group storage unit 3 as shown in FIG.
Converted to mpl. Since the functional primitive multiplexer mpl is not aware of the technology, the number of input bits is arbitrary.

Subsequently, logic circuit synthesis depending on the target technology is performed. In this case, too, is there a cell having the function of an 8-input multiplexer in the library of the technology B stored in the conversion rule group storage unit 3? A search is performed to determine if a corresponding high-performance cell exists, and a cell γ is allocated as shown in FIGS. 9 (a) and 9 (b). If such a cell γ cannot be found, it is realized by another multiplexer or developed into a logic primitive to allocate an optimized cell.

Note that, as shown in FIG. 10, the optimization for the functional primitive can be executed based on the optimization rule in the conversion rule group storage unit 3 in the same manner as the optimization of the logic primitive.

[Effects of the Invention] As described above, according to the present invention, in logic circuit synthesis, functions existing in functional cells, such as decoders and multiplexers, are not developed into logical primitives, but are treated as functional primitives. Primitives and logic primitives are optimized as primitives, and function cells with the same function are assigned to functional primitives after optimization. Function primitives can be directly allocated from the library to function primitives, which makes processing easier and more efficient than the method in which a library is searched and reconfigured into functional cells after expansion, and the corresponding functional cells are allocated. Time can be shortened, and efficiency of logic synthesis can be improved.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram of one embodiment of the present invention, FIG. 2 is a flowchart for explaining the operation of the above embodiment, FIG.
4A and 4B are an explanatory diagram and a truth table showing the configuration of a decoder included in the input circuit information in the above embodiment, and FIG. 4 is a diagram showing the function primitives in the above embodiment.
FIG. 5 is an explanatory diagram showing the configuration of the decoder, FIG. 5 is an explanatory diagram showing the configuration of the assigned decoder cells in the above embodiment,
FIG. 6 is an explanatory diagram showing logic primitives of the decoder in the above embodiment, FIG. 7 is an explanatory diagram showing circuit specification inputs in the above embodiment, and FIG. 8 is a configuration of a functional primitive multiplexer in the above embodiment. FIGS. 9 (a) and 9 (b) are explanatory diagrams and a truth table showing the configuration of the allocated multiplexer cells in the above embodiment, and FIG. 10 is a diagram showing an optimal function primitive of the above embodiment. It is an explanatory view for explaining a conversion operation. 1. Circuit information input unit 2. Circuit information storage unit 3. Conversion rule group storage unit 4. Logic synthesis processing unit 5. Circuit information output unit

Claims (1)

(57) [Claims] 1. A circuit information input unit for inputting circuit specifications for designing a circuit of a logic LSI, and a circuit information storage unit for storing connection information of a logic circuit based on the circuit specifications from the circuit information input unit. A conversion rule group storage unit for storing a conversion rule for generating a target logic circuit; a circuit information output unit for outputting information in the circuit information storage unit in a format recognizable by a designer; When performing logic synthesis based on, functions that exist in function cells are treated as function primitives, functions that do not exist in function cells are expanded into logic primitives, and these function primitives and logic primitives are optimized as primitives, After the optimization, a function cell having an equivalent function is assigned to the function primitive to synthesize a logic circuit, and the circuit information output unit And a logic synthesis processing unit.