JPH02121328A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH02121328A JPH02121328A JP27516088A JP27516088A JPH02121328A JP H02121328 A JPH02121328 A JP H02121328A JP 27516088 A JP27516088 A JP 27516088A JP 27516088 A JP27516088 A JP 27516088A JP H02121328 A JPH02121328 A JP H02121328A
- Authority
- JP
- Japan
- Prior art keywords
- silicide
- oxide film
- polycrystalline silicon
- film
- release
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000004065 semiconductor Substances 0.000 title claims description 4
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 30
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 29
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 24
- 238000000151 deposition Methods 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 claims abstract description 8
- 239000012535 impurity Substances 0.000 claims abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 238000005530 etching Methods 0.000 claims description 4
- 230000008018 melting Effects 0.000 claims description 4
- 238000002844 melting Methods 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 230000008021 deposition Effects 0.000 abstract description 7
- 238000007254 oxidation reaction Methods 0.000 abstract description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 3
- 238000010438 heat treatment Methods 0.000 abstract description 3
- 229910052710 silicon Inorganic materials 0.000 abstract description 3
- 239000010703 silicon Substances 0.000 abstract description 3
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052717 sulfur Inorganic materials 0.000 abstract description 2
- 239000011593 sulfur Substances 0.000 abstract description 2
- 230000002269 spontaneous effect Effects 0.000 abstract 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract 1
- 229910052799 carbon Inorganic materials 0.000 abstract 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 6
- 229910052698 phosphorus Inorganic materials 0.000 description 6
- 239000011574 phosphorus Substances 0.000 description 6
- 230000003647 oxidation Effects 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229910008484 TiSi Inorganic materials 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 150000001721 carbon Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
本発明は、ポリサイド技術を用いた高集積、高速VLS
Iの製造方法に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention is a highly integrated, high-speed VLS using polycide technology.
This invention relates to a method for producing I.
[発明の概要]
本発明は、多結晶シリコンと高融点金属シリサイドの2
層膜でゲート電極を形成するポリサイドゲート技術にお
いて、多結晶シリコン膜上の大気による自然酸化膜の成
長を防ぐために、多結晶シリコンにリンをドープした後
、同装置、同チャンバー内で自然酸化膜のエツチング、
高融点金属ジノサイドの堆積を連続して行うことによっ
て、多結晶シリコンとシリサイドとの肱はがれを抑える
ものである。[Summary of the Invention] The present invention is based on two materials: polycrystalline silicon and high melting point metal silicide.
In polycide gate technology, which forms a gate electrode with a layered film, in order to prevent the growth of a natural oxide film due to the atmosphere on the polycrystalline silicon film, after doping the polycrystalline silicon with phosphorus, natural oxidation is performed in the same device and chamber. Membrane etching,
By continuously depositing high melting point metal dinoside, peeling between polycrystalline silicon and silicide is suppressed.
[従来の技術]
従来のポリサイドの形成は、まず多結晶シリコンにリン
をPOCfflを用いてドーピングし、そこで成長した
PSGをウェット洗浄でエツチングした後、シリサイド
堆積用の装置にセットして行っていた。[Prior art] Conventionally, polycide was formed by first doping polycrystalline silicon with phosphorus using POCffl, etching the PSG grown there by wet cleaning, and then setting it in a silicide deposition device. .
従来のポリサイドの形成法を第2図(a)〜(C)を用
いて説明する。第2図(a)はシリコン基板l上にゲー
ト酸化1!!2を形成し、その上に多結晶シリコン3を
堆積してリンをpocg3を用いてドーピングして、P
SGをウェット洗浄でエツチングした図である。その後
、第2図(b)に示すようにシリサイド堆積用の装置に
セットし、シリサイドを形成して、次工程へ進んでいた
。(第2図(C))
[発明が解決しようとする課題]
しかしながら、PSGのウェットエツチング後の水洗、
乾燥、さらにはシリサイド堆積装置までの搬送の際に多
結晶シリコン上に自然酸化膜が成長してしまう第2図(
a)、この自然酸化膜は。A conventional method for forming polycide will be explained using FIGS. 2(a) to 2(C). FIG. 2(a) shows gate oxidation 1! on a silicon substrate 1! ! 2 is formed, polycrystalline silicon 3 is deposited thereon, and phosphorus is doped using pocg3 to form P.
It is a diagram showing SG etched by wet cleaning. Thereafter, as shown in FIG. 2(b), it was set in a silicide deposition apparatus, silicide was formed, and the next step was carried out. (Figure 2 (C)) [Problem to be solved by the invention] However, water washing after wet etching of PSG,
As shown in Figure 2, a natural oxide film grows on polycrystalline silicon during drying and further transport to the silicide deposition equipment.
a) This natural oxide film is.
多結晶シリコンとシリサイドとの付着力を弱め、後工程
での熱処理等により多結晶シリコン/シリサイド界面で
のはがれが生じやすくなる(第2図(c))。This weakens the adhesion between polycrystalline silicon and silicide, making it easy to peel off at the polycrystalline silicon/silicide interface due to heat treatment in a post-process, etc. (FIG. 2(c)).
ウェットエツチングの水洗、乾燥については。About washing and drying wet etching.
高集積化が進みパターンが細かくなり1段差が厳しくな
る程、未乾燥部ができやすく、この問題は重大なものと
なる。As the degree of integration progresses, the pattern becomes finer, and the difference in level becomes more severe, undried areas are more likely to form, and this problem becomes more serious.
【課題を解決するための手段]
以上の課題を解決するために1本発明では多結晶シリコ
ンへのドーピング後、シリサイド堆積装置内にて自然酸
化膜をエツチングし、大気に触れることな(シリサイド
を連続的に堆積した。[Means for Solving the Problems] In order to solve the above problems, in the present invention, after doping polycrystalline silicon, the natural oxide film is etched in a silicide deposition apparatus, and the silicide film is removed without being exposed to the atmosphere. Continuously deposited.
〔作用]
上記のような手段をとることによって、多結晶シリコン
/シリサイド界面の付着力が強化し、はがれを防ぐこと
ができた。[Effect] By taking the above measures, the adhesive force at the polycrystalline silicon/silicide interface was strengthened and peeling could be prevented.
〔実施例]
第1図(a)〜(d)に、本発明による実施例の工程順
断面図を示す、第1図(a)はシリコン基板にゲート酸
化膜を形成し多結晶シリコン膜を堆積して不純物ドープ
を行った図である。多結晶シリコン上には自然酸化膜が
成長してしまう、これは特に、pocI2.によるリン
のブリデポをドーピング法として用いた場合に顕著であ
る。その理由は、形成されたPSGをウェットエッチで
とった後水洗を行うためと、リン濃度が高いために酸化
膜が成長しやすいからである。しかしながら、ドーピン
グをイオン注入で行った場合でも、リン以外の不純物を
ドープしても、ドーズ量を少なくしても膜厚の差はあれ
、自然酸化膜の成長は逃れることができない、この膜が
シリサイドのはがれを招くので、除去する必要がある。[Example] Figures 1(a) to 1(d) show cross-sectional views in the order of steps of an example according to the present invention. Figure 1(a) shows a process in which a gate oxide film is formed on a silicon substrate and a polycrystalline silicon film is formed. FIG. 3 is a diagram showing a state where the film is deposited and doped with impurities. A native oxide film grows on polycrystalline silicon, especially in pocI2. This is noticeable when phosphorus bridle deposition is used as a doping method. This is because the formed PSG is removed by wet etching and then washed with water, and because the phosphorus concentration is high, an oxide film tends to grow. However, even when doping is performed by ion implantation, even when doping with impurities other than phosphorus, the growth of a native oxide film cannot be avoided, even if the dose is reduced, although there is a difference in film thickness. This will cause the silicide to peel off, so it must be removed.
また、除去した後は自然酸化膜を成長させずに次のシリ
サイドを堆積しなければならない。Further, after removal, the next silicide must be deposited without growing a native oxide film.
そこで、シリサイド堆積装置内で自然酸化膜を除去しく
第1図(b))、大気に触れさせることなく連続的にシ
リサイドを堆積する(第1図(c))、自然酸化膜の除
去には、HF蒸気が適しているが、ハロゲン化炭素、イ
オウ系のガスでもかまわない、シリサイドはWSia、
Ta5it 、Mo5it 、TiSi*等の高融点金
属シリサイドに対して有効である6以上のようにして形
成したポリサイドゲートは、多結晶シリコン/シリサイ
ド界面の付着力・が強くその後の熱処理や酸化工程を経
てもはがれを生じることがない(第1図(d))。Therefore, in order to remove the natural oxide film in a silicide deposition device, we deposit silicide continuously without exposing it to the atmosphere (Fig. 1 (c)). , HF steam is suitable, but halogenated carbon, sulfur-based gases may also be used, silicide is WSia,
Polycide gates formed as described above, which are effective against high melting point metal silicides such as Ta5it, Mo5it, and TiSi*, have strong adhesion at the polycrystalline silicon/silicide interface, making subsequent heat treatment and oxidation processes difficult. No peeling occurs even after a long period of time (Fig. 1(d)).
【発明の効果]
以上述べたように、ポリサイドゲート工程において、シ
リサイドを堆積する前に下層多結晶シリコン上の自然酸
化膜を除去し、その後大気に触れさせることなく同装置
内にてシリサイドを連続的に堆積することにより、シリ
サイド膜のはがれを防ぐことができた。[Effects of the Invention] As described above, in the polycide gate process, the natural oxide film on the underlying polycrystalline silicon is removed before silicide is deposited, and then the silicide is deposited in the same equipment without exposing it to the atmosphere. By continuously depositing the silicide film, it was possible to prevent the silicide film from peeling off.
第1図(a)〜(d)は本発明による製造方法の工程順
の断面図、第2図は従来の製造方法の工程順の断面図で
ある。
・半導体基板
・ゲート酸化膜
・多結晶シリコン膜
・自然酸化膜
・シリサイド膜
以上
出願人 セイコー電子工業株式会社
代理人 弁理士 林 敬 之 助(Cノ
製ifi万オニ埋順r!:It面図
PJ i 図
従来C″)製造7f酒の工涯順ど面面
第
?
図FIGS. 1(a) to 1(d) are cross-sectional views of the manufacturing method according to the present invention in the order of steps, and FIG. 2 is a cross-sectional view of the conventional manufacturing method in the order of steps.・Semiconductor substrate ・Gate oxide film ・Polycrystalline silicon film ・Natural oxide film ・Silicide film Applicant: Seiko Electronic Industries Co., Ltd. Patent attorney: Keisuke Hayashi PJ i Figure Conventional C'') Manufacturing 7f Liquor production process order number?
Claims (1)
ート酸化膜上に多結晶シリコン膜を堆積する工程と、前
記多結晶シリコン膜に不純物をドーピングする工程と、
前記多結晶シリコン膜上に成長した自然酸化膜をエッチ
ングする工程と、前記エッチングと同装置又は同室で大
気に触れることなく高融点金属シリサイドを堆積する工
程とから成る半導体装置の製造方法。forming a gate oxide film on a semiconductor substrate; depositing a polycrystalline silicon film on the gate oxide film; doping the polycrystalline silicon film with impurities;
A method for manufacturing a semiconductor device, comprising a step of etching a natural oxide film grown on the polycrystalline silicon film, and a step of depositing a high melting point metal silicide in the same device or room as the etching without being exposed to the atmosphere.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27516088A JPH02121328A (en) | 1988-10-31 | 1988-10-31 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27516088A JPH02121328A (en) | 1988-10-31 | 1988-10-31 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02121328A true JPH02121328A (en) | 1990-05-09 |
Family
ID=17551512
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP27516088A Pending JPH02121328A (en) | 1988-10-31 | 1988-10-31 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02121328A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20000027678A (en) * | 1998-10-29 | 2000-05-15 | 김영환 | Method of formig polyside using plasma treatment |
-
1988
- 1988-10-31 JP JP27516088A patent/JPH02121328A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20000027678A (en) * | 1998-10-29 | 2000-05-15 | 김영환 | Method of formig polyside using plasma treatment |
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