JPH02113588A - Formation of electric circuit - Google Patents

Formation of electric circuit

Info

Publication number
JPH02113588A
JPH02113588A JP26525088A JP26525088A JPH02113588A JP H02113588 A JPH02113588 A JP H02113588A JP 26525088 A JP26525088 A JP 26525088A JP 26525088 A JP26525088 A JP 26525088A JP H02113588 A JPH02113588 A JP H02113588A
Authority
JP
Japan
Prior art keywords
grooves
metal
electric circuit
substrate
good conductivity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26525088A
Other languages
Japanese (ja)
Inventor
Michitoshi Ito
井藤 三千寿
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Nippon Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Steel Corp filed Critical Nippon Steel Corp
Priority to JP26525088A priority Critical patent/JPH02113588A/en
Publication of JPH02113588A publication Critical patent/JPH02113588A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/045Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by making a conductive layer having a relief pattern, followed by abrading of the raised portions
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE:To form an electric circuit having a good accuracy without using a masking plate by a method wherein a metal having a good conductivity is subjected to plasma spray coating on a ceramic substrate formed with grooves to correspond to a wiring pattern in a reduced pressure and the metal having a good conductivity adhered on parts other than the grooves is removed. CONSTITUTION:Grooves 2 to correspond to a wiring pattern are formed in advance on a ceramic substrate 1. Then, after a metal having a good conductivity is subjected to plasma spray coating on the substrate 1 by a plasma spray coating gun 3 in a reduced pressure, the metal having a good conductivity adhered on parts other than the grooves is removed by a grinding wheel to form an electric circuit. As the flame spraying is executed in a reduced pressure in such a way, the adhesion of the substrate with the metal having a good conductivity is improved more significantly than that, which is performed by an atmospheric flame spraying method, and moreover, the generation of oxidation during the flame spraying can be prevented and a solderability is also improved in a degree identical with that with a normal metal. Thereby, the wiring pattern of a good accuracy is formed without using a mask.

Description

【発明の詳細な説明】 [発明の技術分野] 本発明は電気部品の電気回路形成方法に関する。[Detailed description of the invention] [Technical field of invention] The present invention relates to a method for forming an electric circuit in an electric component.

[従来技術] 従来、電気回路の形成方法としては、銅張積層板を用い
たエツチング法、あるいは基板へのメツキ法が用いられ
ている。しかしながら、これら従来の電気回路形成方法
は湿式プロセスの為、工程が複雑で、毒性の強い処理液
の管理に手間がかかるという間′硬点がある。
[Prior Art] Conventionally, as a method for forming an electric circuit, an etching method using a copper-clad laminate or a plating method on a substrate has been used. However, since these conventional electric circuit forming methods are wet processes, the steps are complicated and the management of highly toxic processing liquids is time-consuming.

これらの問題点を回避する目的で、溶射法を用いて基板
に直接配線図形を形成する方法が、特開昭61−919
95号公報に開示されている。この方法によれば、配線
図形に対応する穴を形成したマスクを基板上にのせ、該
マスクの上から基板上に高導電性金属を溶射することに
よりプリント配線基板を製造するようにしたものである
In order to avoid these problems, a method of directly forming wiring patterns on a board using thermal spraying was proposed in Japanese Patent Laid-Open No. 61-919.
It is disclosed in Publication No. 95. According to this method, a printed wiring board is manufactured by placing a mask with holes corresponding to the wiring pattern on the board and spraying a highly conductive metal onto the board from above the mask. be.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、従来のマスクを用いたプリント配線基板
の製造方法では、マスクの製造コストが高くなるという
問題がある。すなわち、精度の良い配線図形を基板上に
形成するためには、マスクの変形を極力防止する必要が
ある。薄いマスクを使用した場合、溶射中のマスクの熱
変形は避けられず、精度の良い配線図形の形成が困難と
なる上、マスクの繰り返し使用ができずコストが高くな
る。
However, the conventional method of manufacturing a printed wiring board using a mask has a problem in that the manufacturing cost of the mask increases. That is, in order to form highly accurate wiring patterns on a substrate, it is necessary to prevent deformation of the mask as much as possible. When a thin mask is used, thermal deformation of the mask during thermal spraying is unavoidable, making it difficult to form highly accurate wiring patterns, and making it impossible to use the mask repeatedly, increasing costs.

又、マスクの熱変形を防止するためにマスクを厚くする
と、配線図形に対応する穴あけ加工工程が煩雑となり、
マスクの製造コストが高くなる。又、マスクを使う配線
基板の製造方法では、溶射後基板上からマスクを取り外
す際に、配線図形に対応する溶射皮膜が剥離するという
問題も生ずる。
Additionally, if the mask is made thicker to prevent thermal deformation, the process of drilling holes corresponding to the wiring diagram becomes complicated.
Mask manufacturing costs increase. Further, in the method of manufacturing a wiring board using a mask, there is a problem in that the thermal sprayed coating corresponding to the wiring pattern peels off when the mask is removed from the substrate after thermal spraying.

従って、本発明の目的はマスク板を用いることなく、セ
ラミック基板上に精度の良い電気回路を形成することに
ある。
Therefore, an object of the present invention is to form a highly accurate electric circuit on a ceramic substrate without using a mask plate.

(課題を解決するための手段) 本発明は、電気回路を形成するに際し、基板となるセラ
ミック板を製造する工程で、予めセラミック板上に配線
図形に対応する溝を形成する。溝の形成は、セラミック
板の焼成前、焼成後のいずれの時点でも良いが、最終焼
成前に溝を形成する方法が最も簡便である。
(Means for Solving the Problems) According to the present invention, when forming an electric circuit, a groove corresponding to a wiring pattern is formed in advance on a ceramic plate in the process of manufacturing a ceramic plate serving as a substrate. The grooves may be formed either before or after the ceramic plate is fired, but the easiest method is to form the grooves before the final firing.

本発明は、このようにして、予め配線図形に対応する溝
を形成したセラミック基板上に、良導電性金属を減圧中
でプラズマ溶射する第一工程と、前記溝以外に付着した
良導電性金属を除去する第二工程によって電気回路を形
成するようにしたものである。
In this way, the present invention comprises a first step of plasma spraying a highly conductive metal under reduced pressure onto a ceramic substrate on which grooves corresponding to the wiring pattern have been formed in advance, and a highly conductive metal adhered to areas other than the grooves. An electric circuit is formed by the second step of removing.

〔作 用] 本発明について、先ず第一工程について説明する。[For production] Regarding the present invention, first, the first step will be explained.

第一工程では前述のように、予め配線図形に対応する溝
を形成したセラミック基板上に、溶射が行われるが、該
溶射は得られる電気回路の電気的特性、ハンダ付性、密
着性を良好に保持するため、減圧中のプラズマ溶射法で
実施される。大気中のプラズマ溶射法では、溶射中の酸
化によって溝に溶射した金属の抵抗値が1Ω/ C(!
1以上と太き(なり、電気回路としては実用できない。
In the first step, as mentioned above, thermal spraying is performed on a ceramic substrate on which grooves corresponding to the wiring pattern have been formed in advance, and the thermal spraying improves the electrical characteristics, solderability, and adhesion of the resulting electrical circuit. This is done by plasma spraying under reduced pressure to maintain the temperature. In atmospheric plasma spraying, oxidation during spraying reduces the resistance of the metal sprayed into the grooves to 1Ω/C (!
1 or more, it is too thick (and cannot be used as an electrical circuit).

又ハンダ付性も不良である。Moreover, the solderability is also poor.

溶射を減圧中で行う本発明の方法によれば、大気溶射法
に比べ基板と導電性金属の密着性は飛躍的に改善される
。又溶射中の酸化が防止できるのでハンダ付性も通常の
金属と同程度に良好となる。
According to the method of the present invention in which thermal spraying is carried out under reduced pressure, the adhesion between the substrate and the conductive metal is dramatically improved compared to atmospheric thermal spraying. Furthermore, since oxidation during thermal spraying can be prevented, the solderability is as good as that of ordinary metals.

本発明の実施に当たって使用する減圧プラズマ溶射法は
150mmHg以下、好ましくは50 mml’g以下
で実施される。溶射に用いる原料粉末の粒径は75〜5
ミクロン、好ましくは25〜5ミクロンである。
The reduced pressure plasma spraying method used in carrying out the present invention is carried out at a pressure of 150 mmHg or less, preferably 50 mml'g or less. The particle size of the raw material powder used for thermal spraying is 75-5.
microns, preferably 25-5 microns.

本発明で最終的に電気回路となる溶射層は、セラミック
基板上に形成した溝の形状に一致するので、セラミック
基板上に溝を形成する時点で、目的に応じた幅、深さ、
断面形状に形成する。溝の断面形状は直角形、長方形、
三角形、半円形等任意の形状とすることができる。
In the present invention, the sprayed layer that ultimately becomes the electric circuit matches the shape of the groove formed on the ceramic substrate, so when forming the groove on the ceramic substrate, the width, depth, and
Form into a cross-sectional shape. The cross-sectional shape of the groove is rectangular, rectangular,
It can be of any shape such as a triangle or a semicircle.

本発明において使用するセラミック基板は、ガラス、ア
ルミナ、シリカ、部分安定化ジルコニアその他のセラミ
ックが使用できる。
The ceramic substrate used in the present invention can be made of glass, alumina, silica, partially stabilized zirconia, or other ceramics.

又、本発明で用いる良導電性金属は金、銀、銅その他の
金属が使用できるが、銅の使用がコスト的に有利である
Further, the highly conductive metal used in the present invention may be gold, silver, copper, or other metals, but copper is advantageous in terms of cost.

次に、第二工程について説明する。該工程は第一工程終
了後、前記溝以外に付着した良導電性金属を除去する方
法より成るが、該方法は、砥石あるいはサンドペーパー
等の研磨により機械的に除去する方法が最も簡便である
Next, the second step will be explained. This step consists of removing the highly conductive metal adhering to areas other than the grooves after the first step, but the simplest method is to remove it mechanically by polishing with a grindstone or sandpaper. .

本発明は上述の2工程によって基板上に電気回路を形成
するものである。
The present invention forms an electric circuit on a substrate through the two steps described above.

本発明の方法によれば、マスクを使う従来の回路形成方
法に比べ、溶射後の研磨加工によって導電部の膜厚均一
性が確保できる。更に、例えば溝を三角形とした場合、
研磨量を増すことで線径を細くできる等、溝の断面形状
の選択と研磨工程との組合わせによって、導電部の線径
、厚みを任意に変化させることもできる。
According to the method of the present invention, the uniformity of the film thickness of the conductive portion can be ensured by polishing after thermal spraying, compared to the conventional circuit forming method using a mask. Furthermore, for example, if the groove is triangular,
The wire diameter and thickness of the conductive portion can be changed arbitrarily by selecting the cross-sectional shape of the groove and combining the polishing process, such as increasing the amount of polishing to reduce the wire diameter.

尚、本発明はプリント配線基板のごとき平板の回路形成
に限定されるものではなく、円形の溝付フェライトコア
に銅線を埋め込み接着して製造されているロータリート
ランス等、セラミック板上に形成する電気回路部品に適
用できる。
Note that the present invention is not limited to circuit formation on a flat plate such as a printed wiring board, but can also be formed on a ceramic board, such as a rotary transformer manufactured by embedding and bonding copper wire into a circular grooved ferrite core. Applicable to electrical circuit components.

〔実施例] 第1図及び第2図において、予め配線図形に対応する溝
2を形成したアルミナ基板1に30mm1gの減圧チャ
ンバー4内で銅粉末を溶射した。上記溝2は幅0.8鵬
、深さ0.15mmの直角断面形状をしており、又溶射
に用いた銅粉末の粒径は5〜25ミクロンであった。ア
ルミナ基板l上に一様に厚さ200ミクロンの溶射皮膜
5を溶射した後、砥石6の研削によって溝以外に付着し
た銅皮膜を除去してプリント配線基板7を得た。
[Example] In FIGS. 1 and 2, copper powder of 30 mm and 1 g was thermally sprayed in a vacuum chamber 4 onto an alumina substrate 1 in which a groove 2 corresponding to a wiring pattern was formed in advance. The groove 2 had a right-angled cross section with a width of 0.8 mm and a depth of 0.15 mm, and the particle size of the copper powder used for thermal spraying was 5 to 25 microns. After a thermal spray coating 5 having a thickness of 200 microns was uniformly sprayed onto the alumina substrate l, the copper coating adhering to areas other than the grooves was removed by grinding with a grindstone 6 to obtain a printed wiring board 7.

この様にして得られたプリント配線基板7の溝内の銅溶
射皮膜は非常にち密で、かつ酸化もなく、電気抵抗測定
の結果は、0.01Ω/ cmと優れ、ハンダ付性も良
好であった。
The sprayed copper coating in the grooves of the printed wiring board 7 thus obtained is very dense and free of oxidation, and the electrical resistance measurement results are excellent at 0.01Ω/cm, with good solderability. there were.

〔発明の効果〕〔Effect of the invention〕

以上説明したごと(、本発明によれば従来の湿式プロセ
スによる回路形成法のごとく複雑な工程を必要とせず、
製造工程、設備を大幅に簡略化できる上、回路形成に要
する時間も短縮できる。又、マスク板を用いる溶射法に
比べてマスク板を製作する工程を省略できる。更に本発
明の方法で形成した電気回路は電気抵抗性に優れ、ハン
ダ付性も通常の金属と同程度である等、優れた効果を有
する。
As explained above (according to the present invention, there is no need for complicated steps like the conventional wet process circuit forming method,
The manufacturing process and equipment can be greatly simplified, and the time required for circuit formation can also be shortened. Furthermore, compared to the thermal spraying method that uses a mask plate, the process of manufacturing a mask plate can be omitted. Further, the electric circuit formed by the method of the present invention has excellent electrical resistance and solderability comparable to that of ordinary metals, and has other excellent effects.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明方法の実施例を示す説明図である。 第2図(a)〜(d)は本発明の工程を示す説明図であ
る。 1・・・基板、     2・・・溝、3・・・プラズ
マ溶射ガン、 4・・・減圧チャンバー、5・・・溶射皮膜、6・・・
研削砥石、   7・・・プリント配線基板。
FIG. 1 is an explanatory diagram showing an embodiment of the method of the present invention. FIGS. 2(a) to 2(d) are explanatory diagrams showing the steps of the present invention. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Groove, 3... Plasma spray gun, 4... Decompression chamber, 5... Thermal spray coating, 6...
Grinding wheel, 7...Printed wiring board.

Claims (1)

【特許請求の範囲】[Claims] 配線図形に対応する溝を形成したセラミック基板上に良
導電性金属を、減圧中でプラズマ溶射する第一工程と、
前記溝以外に付着した良導電性金属を除去する第二工程
からなることを特徴とする電気回路形成方法。
A first step of plasma spraying a highly conductive metal under reduced pressure onto a ceramic substrate with grooves corresponding to the wiring pattern;
A method for forming an electric circuit, comprising a second step of removing highly conductive metal adhering to areas other than the grooves.
JP26525088A 1988-10-22 1988-10-22 Formation of electric circuit Pending JPH02113588A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26525088A JPH02113588A (en) 1988-10-22 1988-10-22 Formation of electric circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26525088A JPH02113588A (en) 1988-10-22 1988-10-22 Formation of electric circuit

Publications (1)

Publication Number Publication Date
JPH02113588A true JPH02113588A (en) 1990-04-25

Family

ID=17414618

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26525088A Pending JPH02113588A (en) 1988-10-22 1988-10-22 Formation of electric circuit

Country Status (1)

Country Link
JP (1) JPH02113588A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06140742A (en) * 1992-10-29 1994-05-20 Canon Inc Printed-circuit board and manufacture thereof
US20110052828A1 (en) * 2009-09-03 2011-03-03 Randy Allen Normann Method for high-temperature ceramic circuits

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06140742A (en) * 1992-10-29 1994-05-20 Canon Inc Printed-circuit board and manufacture thereof
US20110052828A1 (en) * 2009-09-03 2011-03-03 Randy Allen Normann Method for high-temperature ceramic circuits

Similar Documents

Publication Publication Date Title
US4532152A (en) Fabrication of a printed circuit board with metal-filled channels
JP2011518336A (en) MEMS probe card and manufacturing method thereof
JP2005012811A (en) Method of manufacturing microwave circuit
US20110123931A1 (en) High-precision ceramic substrate preparation process
US20200294837A1 (en) Ceramic-circuit composite structure and method for making the same
JPH02113588A (en) Formation of electric circuit
JP2006324566A (en) Chip
JP2003188198A5 (en)
JPH07283499A (en) Compound board for electronic parts
US4936010A (en) Method of forming dielectric layer on a metal substrate having improved adhesion
US5040292A (en) Method of forming dielectric layer on a metal substrate having improved adhesion
GB1187916A (en) Multilayer Printed Circuit Board and Method for Manufacturing Same.
JPH11220256A (en) Manufacturing method of ceramic wiring board
US7022251B2 (en) Methods for forming a conductor on a dielectric
JPH02202073A (en) Electronic component
JP2005026403A (en) Process for forming external electrode of chip electronic component
JPH06224538A (en) Manufacture of ceramic circuit board
JP2001144128A (en) Printing method of conductor
JPH06204645A (en) Manufacture of ceramic circuit board
JPH03283589A (en) Forming method for pattern of board
JPH05129458A (en) Ceramic substrate and manufacture thereof, and ceramic wiring board using said ceramic substrate
JP2003289214A (en) Small-sized antenna and manufacturing method
JPS6432656A (en) Manufacture of substrate for loading semiconductor element
JPH0799378A (en) Resistor thin film layer formation of printed board
JP2849163B2 (en) Manufacturing method of electronic circuit board